Patents Assigned to STMicroelectronic S.A.
  • PROTECTION OF MEMORY AREAS
    Publication number: 20130138975
    Abstract: A method for loading a program, contained in at least a first memory, into a second memory accessible by an execution unit, in which the program is in a cyphered form in the first memory, a circuit for controlling the access to the second memory is configured from program initialization data, instructions of the program, and at least initialization data being decyphered to be transferred into the second memory after configuration of the circuit.
    Type: Application
    Filed: January 28, 2013
    Publication date: May 30, 2013
    Applicant: STMicroelectronics S.A.
    Inventor: STMicroelectronics S.A.
  • Method and device for selecting images in a sequence of iris images received in a stream
    Patent number: 8442339
    Abstract: A method for selecting images from a set of images (according to sharpness and contrast criteria), comprising pre-selecting images by a simplified sharpness and/or contrast analysis of each image in the set of images, and of selecting images by a finer analysis of the sharpness and/or contrast of each pre-selected image. This method is particularly useful to perform an identification by recognition of the iris.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: May 14, 2013
    Assignees: STMicroelectronics S.A., Universite Paul Cezanne Aix-Marseille III
    Inventors: Lionel Martin, William Ketchantang, Stéphane Derrode
  • ELECTRONIC DEVICE FOR PROTECTING FROM ELECTROSTATIC DISCHARGE
    Publication number: 20130113017
    Abstract: A protection device includes a triac and triggering units. Each triggering unit is formed by a MOS transistor configured to operate at least temporarily in a hybrid operating mode and a field-effect diode. The field-effect diode has a controlled gate that is connected to the gate of the MOS transistor.
    Type: Application
    Filed: September 27, 2012
    Publication date: May 9, 2013
    Applicant: STMicroelectronics S.A.
    Inventor: STMicroelectronics S.A.
  • Method for forming a back-side illuminated image sensor
    Patent number: 8436440
    Abstract: A method for manufacturing a back-side illuminated image sensor, including the steps of: forming, inside and on top of an SOI-type silicon layer, components for trapping and transferring photogenerated carriers and isolation regions; forming a stack of interconnection levels on the silicon layer and attaching, on the interconnect stack, a semiconductor handle; removing the semiconductor support; forming, in the insulating layer and the silicon layer, trenches reaching the isolation regions; depositing a doped amorphous silicon layer, more heavily doped than the silicon layer, at least on the walls and the bottom of the trenches and having the amorphous silicon layer crystallize; and filling the trenches with a reflective material.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: May 7, 2013
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.
    Inventors: Michel Marty, François Leverd
  • High-k heterostructure
    Patent number: 8426261
    Abstract: A method for preparing a multilayer substrate includes the step of deposing an epitaxial ?-Al2O3 Miller index (001) layer on a Si Miller index (001) substrate.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: April 23, 2013
    Assignees: STMicroelectronics S.A., Centre National de la Recherche Scientifique, Ecole Centrale de Lyon
    Inventors: Clément Merckling, Mario El-Kazzi, Guillaume Saint-Girons, Guy Hollinger
  • Digital predistorter for variable supply amplifier
    Patent number: 8411792
    Abstract: An adaptive predistorter for applying a predistortion gain to an input signal to be amplified by a power amplifier having a variable supply voltage, the predistorter including: a predistortion gain block adapted to apply a complex gain to a complex input signal; a first table implemented in a first memory and including a 2-dimensional array of cells storing complex gain values, the first table adapted to output the complex gain values based on an amplitude of the input signal and the value of the variable supply voltage of the power amplifier; and a second table implemented in a second memory and including a 2-dimensional array of cells storing gain update values for updating the complex gain values of the first table, the gain update values being generated based on an output of the power amplifier.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics S.A.
    Inventor: Vincent Pinon
  • Non-deterministic number generation
    Patent number: 8411859
    Abstract: A method for determining the entropy of a noise source providing a bit flow, a method and a device for generating a bit flow, including parallelizing the bit flow to obtain first words over a first number of bits, applying to the successive words a compression function, and evaluating a second number of bits over which the compression function provides its results, the second number representing the number of useful bits in the first words.
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Yannick Teglia, Pierre-Yvan Liardet
  • Image noise correction
    Patent number: 8411939
    Abstract: An image noise correction method is provided. For at least one target pixel having a determined pixel value, for each pixel in a window of pixels surrounding the target pixel, a weighting factor for the pixel is estimated based on the value of the target pixel and at least one pixel value in the window. An average of pixel values for the pixels in the window is calculated, with each pixel value being weighted by the weighting factor corresponding to the pixel. A new value is assigned to the target pixel based on the average of pixel values that is calculated. Also provided is an image noise correction device.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Grégory Roffet, Frédérique Crete
  • Photodiode with interfacial charge control and associated process
    Patent number: 8410570
    Abstract: A photodiode includes a first doped layer and a second doped layer that share a common face. A deep isolation trench has a face contiguous with the first and second doped layers. A conducting layer is in contact with a free face of the second doped layer. A protective layer is provided at an interface with the first doped layer and second doped layer. This protective layer is capable of generating a layer of negative charge at the interface. The protective layer may further be positioned within the second doped layer to form an intermediate protective structure.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: April 2, 2013
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Jorge Regolini, Michael Gros-Jean
  • Phase-shift amplifier
    Patent number: 8405462
    Abstract: A cascode amplifier comprising at least two phase-shift stages controllable between an input transistor having a control terminal connected to an input terminal of the amplifier, and an output terminal of the amplifier.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: March 26, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Baudouin Martineau, Olivier Richard
  • METHOD FOR DEPOSITING A SILICON OXIDE LAYER OF SAME THICKNESS ON SILICON AND ON SILICON-GERMANIUM
    Publication number: 20130072032
    Abstract: A method for depositing a silicon oxide layer on a substrate including a silicon region and a silicon-germanium region, including the steps of: forming a very thin silicon layer having a thickness ranging from 0.1 to 1 nm above silicon-germanium; and depositing a silicon oxide layer on the substrate.
    Type: Application
    Filed: July 27, 2012
    Publication date: March 21, 2013
    Applicants: STMicroelectronics S.A., International Business Machines Corporation, STMicroelectronics (Crolles 2) SAS
    Inventors: Didier Dutartre, Nicolas Breil, Yves Campidelli, Olivier Gourhant
  • Protection of memory areas
    Patent number: 8392726
    Abstract: A method for loading a program, contained in at least a first memory, into a second memory accessible by an execution unit, in which the program is in a cyphered form in the first memory, a circuit for controlling the access to the second memory is configured from program initialization data, instructions of the program, and at least initialization data being decyphered to be transferred into the second memory after configuration of the circuit.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: March 5, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Albert Martinez, William Orlando
  • Method for a DMA-compatible peripheral
    Patent number: 8386662
    Abstract: The invention relates to a method for organizing the registers of a peripheral in memory, the peripheral including at least one control register to be addressed in memory to store configuration data of the peripheral, one transmission register to be addressed in memory to store data to be transmitted from the memory to the peripheral, and one reception register to be addressed in memory to store data to be transmitted from the peripheral to the memory, the method including: duplicating, within a data memory range, the transmission/reception register to different contiguous addresses; and implementing in memory the control registers at contiguous addresses at the level of a memory range adjacent to the memory range where the transmission/reception register has been duplicated.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: February 26, 2013
    Assignee: STMicroelectronics S.A.
    Inventor: Andre Roger
  • Wide-band signal processor
    Patent number: 8379740
    Abstract: A signal processor for processing a digital input signal including samples sampled at a sampling frequency, the signal processor comprising a plurality of filters arranged to divide the digital input signal into a first signal in a first frequency band below a first cut-off frequency, and a second signal in a second frequency band above a second cut-off frequency; first frequency shifting circuitry arranged to shift the second signal to a frequency band below the first cut-off frequency; decimation circuitry arranged to decimate the first signal and the shifted second signal; and processing circuitry arranged to process the decimated first and second signals.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: February 19, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Michel Menu, Ivan Bourmeyster
  • Equalizer adapting circuit
    Patent number: 8374232
    Abstract: A channel equalizer having a filter arranged to filter an input signal, the filter including a plurality of taps, each tap generating an output signal based on a coefficient, an input for receiving the coefficients and an output for outputting a filtered signal; and coefficient generating circuitry including a graduation unit arranged to receive the input signal and an error signal indicating an error in the filtered signal, to accumulate gradient values relating to each of the coefficients based on a plurality of error values of the error signal, each of the gradient values indicating a required change in one of the coefficients, and to sequentially output the gradient values; and coefficient update unit arranged to sequentially update each of the filter coefficients in turn, based on the gradient values.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: February 12, 2013
    Assignee: STMicroelectronics S.A.
    Inventor: Philippe Graffouliere
  • Analog FIR filter
    Patent number: 8369817
    Abstract: An analog finite impulse response (AFIR) filter including at least one variable transconductance block having an input for receiving an input voltage and being adapted to sequentially apply each of a plurality of transconductance levels to the input voltage during at least one of a plurality of successive time periods to generate an output current at an output of the variable transconductance block, the at least one variable transconductance block including a plurality of fixed transconductance blocks each receiving the input voltage and capable of being independently activated to supply the output current; and a capacitor coupled to the output of the variable transconductance block to receive the output current and provide an output voltage of the filter.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: February 5, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Eoin Ohannaidh, Stéphane Le Tual, Loïc Joet
  • Scrambling of a calculation performed according to an RSA-CRT algorithm
    Patent number: 8369519
    Abstract: A method and a circuit for scrambling an RSA-CRT algorithm calculation by an electronic circuit, in which a result is obtained from two modular exponentiation calculations, each providing a partial result, and from a recombination step, and in which a first step adds a digital quantity to at least one first partial result before said recombination step; and a second step cancels the effects of this quantity after the recombination step.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: February 5, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Pierre-Yvan Liardet, Yannick Teglia
  • Soft output viterbi decoder architecture
    Patent number: 8370726
    Abstract: A soft output Viterbi algorithm (SOVA) decoder arranged to decode symbols received over a transmission channel, the symbols indicating a state transition between two states of a plurality of states that determines a decoded data value, the SOVA decoder comprising a reliability memory unit including at least four stages of logic units, each logic unit including a single buffer and at least four stages including a plurality of full stages comprising a separate logic unit corresponding to each of the plurality of states; and a plurality of compact stages including half or less than half the number of logic units than the number of the plurality of states, each logic unit corresponding to two of the plurality of states.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: February 5, 2013
    Assignee: STMicroelectronics S.A.
    Inventor: Vincent Heinrich
  • Protection of a static datum in an integrated circuit
    Patent number: 8359478
    Abstract: A method and a system for protecting a static digital datum contained in a first element of an electronic circuit, intended to be exploited by a second element of this circuit, in which: on the side of the first element, the static datum is converted into a dynamic data flow by at least one first linear shift feedback register representing a different polynomial according to the value of the static datum; the dynamic flow is transmitted to the second element; and on the side of the second element, the received dynamic flow is decoded by at least one second shift register representing at least one of the polynomials that has been used by the first element.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: January 22, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Loïc Bonizec, Stéphane Chesnais
  • Secured coprocessor comprising an event detection circuit
    Patent number: 8359481
    Abstract: A coprocessor includes a calculation unit for executing at least one command, and a securization device. The securization device includes an error detection circuit for monitoring the execution of the command so as to detect any execution error, putting the coprocessor into an error mode by default as soon as the execution of the command begins, and lifting the error mode at the end of the execution of the command if no error has been detected, an event detection circuit for monitoring the appearance of at least one event to be detected, and a masking circuit for masking the error mode while the event to be detected does not happen, and declaring the error mode to the outside of the coprocessor if the event to be detected happens while the coprocessor is in the error mode. Application in particular but not exclusively to coprocessors embedded in integrated circuits for smart cards.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: January 22, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Frederic Bancel, Nicolas Berard