Abstract: The present disclosure is directed to a plurality of waffle gate parallel transistors having a shared gate on a surface of a semiconductor substrate. The shared gate has connected lines that form a plurality of frames, lines of each of the frames being over the perimeter of a respective source or drain region. The shared gate includes frames of a first size and shape and frames of a second size and shape, such as squares, rectangles and octagons. The frames having the first size and shape are each over a respective source region and the frames having the second size and shape are each over a respective drain region. Each of the frames having a first size and shape share at least one side with one of the frames having the second size and shape.
Type:
Grant
Filed:
May 26, 2017
Date of Patent:
September 3, 2019
Assignee:
STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
Inventors:
Patrik Vacula, Milos Vacula, Miroslav Husak
Abstract: A device to read a variable resistor has an analog to digital converter (ADC), a first switch and a second switch. The ADC has a first ADC input, a second ADC input and an ADC output. The first switch selectively couples a first voltage indicative of a voltage across a first resistance to the first ADC input. The second switch selectively couples a second voltage indicative of a voltage across a second resistance to the second ADC input. The ADC outputs a signal indicative of a value of the second resistance.
Abstract: A programmable digital-to-analog converter includes an analog circuit that converts a binary word into a value of analog voltage and a digital circuit that supplies the binary word starting from a maximum value decremented by a decrement value.
Abstract: A method and apparatus for compensating and calibrating a bio-impedance measurement device are provided. In the method and apparatus, a memory stores a plurality of compensation parameters and a first detection channel receives a first detection signal, compensates the first detection signal using a first compensation parameter of the plurality of compensation parameters. In the method and apparatus, a second detection channel receives a second detection signal and a third detection signal and compensates the second and third detection signals using second and third compensation parameters of the plurality of compensation parameters and the compensated first detection signal. The impedance measurement device generates a first output signal representative of a first impedance measurement and a second output signal representative of a second impedance measurement based on the compensated first, second and third detection signals.
Type:
Grant
Filed:
December 15, 2016
Date of Patent:
September 3, 2019
Assignee:
STMicroelectronics S.r.l.
Inventors:
Marco Passoni, Alessia Cagidiaco, Stefano Rossi
Abstract: A circuit includes a voltage converter converting source voltage to supply voltage at a first node as a function of a feedback voltage at a feedback node. A first output path is coupled between first and second node nodes. Feedback circuitry couples the second node to the feedback node when a voltage at the second node exceeds a first overvoltage, in a first mode of operation. The feedback circuitry couples the second node to the feedback node when the voltage at the second node exceeds a second overvoltage less than the first overvoltage, in a second mode of operation. Impedance circuitry is coupled between the first node and a third node and generates an auxiliary supply voltage and an auxiliary ground voltage when the circuit is in both the first and second modes, the auxiliary supply voltage being less than the supply voltage in both the first and second modes.
Abstract: An image sensing device includes an interconnect layer and a number of grid array contacts arranged on a bottom side of the interconnect layer. An image sensor integrated circuit (IC) is carried by the interconnect layer and has an image sensing surface. A number of electrical connections are coupled between the image sensor IC and an upper side of the interconnect layer. A transparent plate overlies the image sensing surface of the image sensor IC. A cap is carried by the interconnect layer and has an opening overlying transparent plate and the image sensing surface. The cap has an upper wall spaced above the interconnect layer and the image sensor IC to define an internal cavity and the cap defines an air vent coupled to the internal cavity.
Abstract: Embodiments are directed towards a reconfigurable stream switch formed in an integrated circuit. The stream switch includes a plurality of output ports, a plurality of input ports, and a plurality of selection circuits. The output ports each have an output port architectural composition, and each is arranged to unidirectionally pass output data and output control information. The input ports each have an input port architectural composition, and each is arranged to unidirectionally receive first input data and first input control information. Each one of the selection circuits is coupled to an associated one of the output ports. Each selection circuit is further coupled to all of the input ports such that each selection circuit is arranged to reconfigurably couple its associated output port to no more than one input port at any given time.
Type:
Grant
Filed:
February 2, 2017
Date of Patent:
September 3, 2019
Assignees:
STMICROELECTRONICS S.R.L., STMICROELECTRONICS INTERNATIONAL N.V.
Abstract: A sensor device for an electronic apparatus is provided with: a sensing structure generating a first detection signal; and a dedicated integrated circuit, connected to the sensing structure, detecting, as a function of the first detection signal, a first event associated to the electronic apparatus and generating a first interrupt signal upon detection of the first event. The dedicated integrated circuit detects the first event as a function of a temporal evolution of the first detection signal, and in particular as a function of values assumed by the first detection signal within one or more successive time windows, and of a relation between these values.
Abstract: The present disclosure relates to a memory cell comprising a vertical selection gate extending in a trench made in a substrate, a floating gate extending above the substrate, and a horizontal control gate extending above the floating gate, wherein the floating gate also extends above a portion of the vertical selection gate over a non-zero overlap distance. Application mainly to the production of a split gate memory cell programmable by hot-electron injection.
Type:
Grant
Filed:
March 7, 2018
Date of Patent:
September 3, 2019
Assignee:
STMicroelectronics (Rousset) SAS
Inventors:
Francesco La Rosa, Stephan Niel, Arnaud Regnier, Julien Delalleau
Abstract: A touch screen controller includes drive circuitry driving force lines with a force signal in a touch data sensing mode and not driving the force lines in a noise sensing mode, sense circuitry sensing touch data at the sense lines in the touch data sensing mode and sensing noise data at the sense lines during the noise sensing mode. Processing circuitry: a) samples the noise data, b) performs trigonometric manipulations of the noise data to produce imaginary noise data and real noise data, and c) determines a noise magnitude value of the noise data as a function of the imaginary noise data and the real noise data. In the noise sensing mode, (a)-(c) are performed for each of a plurality of possible sampling frequencies to be used in the touch data sensing mode in order to determine which sampling frequency is to be used in the touch data sensing mode.
Type:
Application
Filed:
May 8, 2019
Publication date:
August 29, 2019
Applicant:
STMicroelectronics Asia Pacific Pte Ltd
Abstract: An integrated circuit includes a power supply terminal, a reference terminal, and a signal terminal. A first protection device is coupled between the signal terminal and the power supply terminal, the first protection device including a first MOS transistor. A second protection device is coupled between the signal terminal and the reference terminal, the second protection device including a second MOS transistor. Gates of the MOS transistors are directly or indirectly coupled to the reference terminal. Substrates of the MOS transistors are coupled to the reference terminal via a common resistor.
Abstract: Individual electronic units are formed by cutting a collective assembly. A collective support plate is provided which includes electronic chips. A collective cover plate is provided which includes ribs defining recesses. The collective assembly is formed by mounting the collective cover plate to the collective support plate in a manner where the electronic chips are located in the recesses and the ribs are located between electronic chips. A bead of glue is interposed between ends of the ribs and the surface of the collective support plate. After the glue is hardened, a cutting operation is performed on the collective assembly by cutting through the ribs and the collective support plate to produce the individual electronic units.
Abstract: Control over the operation of an electrically-controlled motor is supported by an interface circuit between the electrically-controlled motor and a near-field radio frequency communication controller. The interface circuit includes a first circuit that receives at least one control set point through a near-field radio frequency communication issued by the near-field radio frequency communication controller. A second circuit of the interface generates one or more electric signals in pulse width modulation based on the control set point.
Type:
Application
Filed:
February 21, 2019
Publication date:
August 29, 2019
Applicants:
STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Rousset) SAS
Inventors:
Gwenael MAILLET, Jean-Louis LABYRE, Gilles BAS
Abstract: A first generator produces a first signal that is supplied to an energy storage circuit. Energy transfer circuitry coupled to the energy storage circuit transfers energy stored in the energy storage circuit to an output node. A driver circuit coupled to the energy transfer circuitry switches the energy transfer circuitry between a state where energy from the first signal is stored in the energy storage circuit and a state where energy stored in the energy storage circuit section is delivered to the output node. A voltage at the energy storage circuit varies between an upper value and a lower value around a voltage setting point. A second generator, which is a scaled-down replica of the first generator, produces a second signal that is indicative of an open-circuit voltage of the first generator. The driver circuit uses the second signal to set the voltage setting point.
Abstract: A vertical transistor includes two portions of a gate conductor that extend within a layer of insulator. An opening extending through the later of insulator includes source, channel and drain regions form by epitaxy operations. A thickness of the portions of the gate conductor decreases in the vicinity of the channel region.
Abstract: An integrated circuit includes a substrate having at least one first domain and at least one second domain that is different from the at least one first domain. A trap-rich region is provided in the substrate at the locations of the at least one second domain only. Locations of the at least one first domain do not include the trap-rich region.
Abstract: An electromagnetic interposer circuit is attachable to an article that is also equipped with an anti-counterfeit and anti-theft/tracking electromagnetic marker. The interposer circuit includes a first interface for exchanging electrical signals with the marker at a first, shorter, communication range and a second interface coupled to the first interface for exchanging electromagnetic signals with a reader at a second, longer, communication range. The first and second interfaces exchange signals with the marker and the reader, respectively, over a radiofrequency bandwidth that includes a first frequency band and a second frequency band. A filter circuit block within the interposer circuit between the first interface and the second interface operates to block the transfer of signals between the first interface and the second interface over the first frequency band.
Type:
Application
Filed:
February 21, 2019
Publication date:
August 29, 2019
Applicant:
STMicroelectronics S.r.l.
Inventors:
Alessandro FINOCCHIARO, Giovanni GIRLANDO
Abstract: A MEMS pressure sensor includes a resistive sensing bridge with a first sensing resistor and a second sensing resistor, each having variable resistance values in response to change in a sensed physical variable. An oscillator generates an oscillation signal with a frequency or period that is a function of an oscillator control signal. A sensor reference module generates the oscillator control signal as a function of the resistance value of a resistor coupled therewith. This sensor reference module is couplable with the first sensing resistor or second sensing resistor. A processing circuit coupled to the oscillator provides a sensor signal indicative of the frequency or period of the oscillation signal. The sensor signal has first and second values with the sensor reference module coupled with the first sensing resistor and with the second sensing resistor, respectively, the first and second values being thus jointly indicative of the physical variable sensed.
Abstract: A method for manufacturing a HEMT transistor comprising the steps of: providing a wafer comprising a semiconductor body including a heterojunction structure formed by semiconductor materials that include elements of Groups III-V of the Periodic Table, and a dielectric layer on the semiconductor body; etching selective portions of the wafer, thus exposing a portion of the heterojunction structure; forming an interface layer by a surface reconstruction process, of a semiconductor compound formed by elements of Groups III-V of the Periodic Table, in the exposed portion of the heterojunction structure; and forming a gate electrode, including a gate dielectric and a gate conductive region, on said interface layer.
Type:
Grant
Filed:
June 27, 2018
Date of Patent:
August 27, 2019
Assignee:
STMICROELECTRONICS S.R.L.
Inventors:
Ferdinando Iucolano, Andrea Severino, Maria Concetta Nicotra, Alfonso Patti
Abstract: A method estimates an ego-motion of an apparatus between a first image and a second image of a succession of images captured by the apparatus, in a SLAM type algorithm containing a localization part including the ego-motion estimating and a mapping part. The ego-motion comprises a 3D rotation of the apparatus and a position variation of the apparatus in the 3D space, and the ego-motion estimating comprises performing a first part and performing a second part after having performed the first part, the first part including estimating the 3D rotation of the apparatus and the second part including, the 3D rotation having been estimated, estimating the position variation of the apparatus in the 3D space.
Type:
Grant
Filed:
December 16, 2016
Date of Patent:
August 27, 2019
Assignee:
STMICROELECTRONICS SA
Inventors:
Manu Alibay, Stéphane Auberger, Bogdan-Florin Stanciulescu