Abstract: An optical detection sensor functions as a proximity detection sensor that includes an optical system and a selectively transmissive structure. Electromagnetic radiation such as laser light can be emitted through a transmissive portion of the selectively transmissive structure. A reflected beam can be detected to determine the presence of an object. The sensor is formed by encapsulating the transmissive structure in a first encapsulant body and encapsulating the optical system in a second encapsulant body. The first and second encapsulant bodies are then joined together. In a wafer scale assembling the structure resulting from the joined encapsulant bodies is diced to form optical detection sensors.

Abstract: A microelectromechanical device, in particular a non-volatile memory module or a relay, comprising: a mobile body including a top region and a bottom region; top electrodes facing the top region; and bottom electrodes, facing the bottom region. The mobile body is, in a resting condition, at a distance from the electrodes. The latter can be biased for generating a movement of the mobile body for causing a direct contact of the top region with the top electrodes and, in a different operating condition, a direct contact of the bottom region with the bottom electrodes. In the absence of biasing, molecular-attraction forces maintain in stable mutual contact the top region and the top electrodes or, alternatively, the bottom region and the bottom electrodes.

Abstract: Bipolar transistors and MOS transistors are formed in a common process. A semiconductor layer is arranged on an insulating layer. On a side of the bipolar transistors: an insulating region including the insulating layer is formed; openings are etched through the insulating region to delimit insulating walls; the openings are filled with first epitaxial portions; and the first epitaxial portions and a first region extending under the first epitaxial portions and under the insulating walls are doped. On the side of the bipolar transistors and on a side of the MOS transistors: gate structures are formed; second epitaxial portions are made; and the second epitaxial portions covering the first epitaxial portions are doped.

Abstract: An electronic component includes a semiconductor layer having a first surface coated with a first insulating layer and a second surface coated with an interconnection structure. A laterally insulated conductive pin extends through the semiconductor layer from a portion of conductive layer of the interconnection structure all the way to a contact pad arranged at the level of the first insulating layer.

Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.

Abstract: A substrate of the silicon on insulator type includes a semi-conducting film disposed on a buried insulating layer which is disposed on an unstressed silicon support substrate. The semi-conducting film includes a first film zone of tensile-stressed silicon and a second film zone of tensile-relaxed silicon. Openings through the buried insulating layer permit access to the unstressed silicon support substrate under the first and second film zones. An N channel transistor is formed from the first film zone and a P channel transistor is formed from the second film zone. The second film zone may comprise germanium enriched silicon forming a compressive-stressed region.

Abstract: A memory includes error correction circuitry that receives a data packet, outputs a correctable error flag indicating presence or absence of a correctable error in the data packet, and outputs an uncorrectable error flag indicating presence or absence of an uncorrectable error in the data packet. A response manager, operating in availability mode, generates output indicating that a correctable error was present if the correctable error flag indicates presence thereof, and generates an output indicating that an uncorrectable error was present if the uncorrectable error flag indicates presence thereof. In a coverage mode, the response manager generates an output indicating that a correctable error was potentially present but should be treated as an uncorrectable error if the correctable error flag indicates presence of the correctable error, and generates an output indicating that an uncorrectable error was present if the uncorrectable error flag indicates presence thereof.

Abstract: A voltage regulator includes two input pairs of opposite type transistors, p-type and n-type, to provide a soft-start functionality for gradually increasing the voltage regulator's output voltage from zero, or a voltage below the thresholds of the n-type transistors, to an operational voltage. The voltage regulator operates in a soft-start mode during which a variable input voltage signal is ramped up to allow the output voltage to reach the operational voltage, and a normal-operation mode during which the operational voltage is maintained.

Abstract: A PNP transistor is manufactured in parallel with the manufacture of NPN, NMOS, and PMOS transistors. A first semiconductor layer is deposited on a P-type doped semiconductor substrate and divided into first, second, and third regions, with the third region forming the base. An insulating well is deeply implanted into the substrate. First and second third wells, respectively of N-type and P-type are formed to extend between the second region and third region and the insulating well. A third well of P-type is formed below the third region to provide the collector. Insulating layers are deposited over the third region and patterned to form an opening. Epitaxial growth of a second P-type doped semiconductor layer is performed in the opening to provide the emitter.

Abstract: A power supply voltage detector circuit monitors a ramping supply voltage and selectively enables a voltage divider for operation to divide the ramping supply voltage in response to the ramping supply voltage exceeding a first threshold. Additionally, a variable resistance of the voltage divider is changed in response to the ramping supply voltage exceeding a second threshold. A voltage output from the voltage divider is used to generate a bandgap voltage used as a reference voltage in comparison operations for controlling enabling of the voltage divider and selection of the variable resistance.

Abstract: A method for managing the operation of an object capable of contactless communication with a reader magnetically coupled to the object includes a phase for transmission of information from the object to the reader and includes a modulation of the impedance of a load connected across the terminals of the antenna of the object. Prior to the transmission phase, a monitoring phase includes a monitoring of the level of amplitude modulation of a modulated test signal present at the antenna of the object and resulting from a test modulation of the impedance of the load and a capacitive modification of the impedance of the load if this level is lower than a threshold.

Abstract: A sequence of images is processed to generate optical flow data including a list of motion vectors. The motion vectors are grouped based on orientation into a first set of moving away motion vectors and a second set of moving towards motion vectors. A vanishing point is determined as a function of the first set of motion vectors and a center position of the images is determined. Pan and tilt information is computed from the distance difference between the vanishing point and the center position. Approaching objects are identified from the second set as a function of position, length and orientation, thereby identifying overtaking vehicles. Distances to the approaching objects are determined from object position, camera focal length, and pan and tilt information. A warning signal is issued as a function of the distances.

Abstract: A method for controlling an apparatus, includes steps of: determining distance measurements of an object in a first direction, using distance sensors defining between them a second direction different from the first direction, assessing a first inclination of the object in relation to a second direction based on the distance measurements, and determining a first command of the apparatus according to the inclination assessment.

Abstract: A method for producing an integrated circuit pointed element is disclosed. An element has a projection with a concave part directing its concavity towards the element. The element includes a first etchable material. A zone is formed around the concave part of the element. The zone includes a second material that is less rapidly etchable than the first material for a particular etchant. The first material and the second material are etched with the particular etchant to form an open crater in the concave part and thus to form a pointed region of the element.

Abstract: An optoelectronic device may include a package having a component for sending/receiving optical signals along a first direction, and a chip of semiconductor material housed within the package. The chip may have a main surface and a portion exposed on the main surface for sending/receiving the optical signals along a second direction different from the first direction. The optoelectronic device may further include a component for deflecting the optical signals between the first direction and the second direction, the component being mounted on the main surface.

Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.

Abstract: A back-side illuminated image sensor includes memory regions formed in a semiconductor wafer. Each memory region is located between two opaque walls which extend into the semiconductor wafer. An opaque screen is arranged at the rear surface of the memory region and in electrical contact with the opaque walls.

Abstract: A near-field communication device operates to transmit data by near-field communications techniques to another device. The near-field communication device includes a memory that stores a message to be transmitted in an ASCII format. The message is retrieved from the memory and transmitted using the near-field communications techniques in an ASCII format.

Abstract: A semiconductor substrate of an integrated circuit is protected by a coating. The semiconductor includes a front face and a rear face. To detect a breach of the integrity of a semiconductor substrate of an integrated circuit from the rear face, an opening of the coating facing the rear face of the substrate is detected. In response thereto, an alarm is generated. The detection is performed by making resistance measurements with respect to the semiconductor substrate and comparing the measured resistance to a nominal resistive value of the semiconductor substrate.

Abstract: A 90° hybrid inductive-capacitive coupling stage includes two first stage terminals capable of forming two stage inputs or two stage outputs and two second stage terminals capable of respectively forming two stage outputs or two stage inputs. The coupling stage is advantageously modular having a first stage axis of symmetry and a second stage axis of symmetry orthogonal to each other with neighboring inductive metal tracks being overlaid in at least one crossing region to form both an inductive circuit and a capacitive circuit. The metal tracks are coupled to the first stage terminals and to the second stage terminals such that the two first stage terminals are situated on one side of the first stage axis of symmetry and the two second stage terminals are situated on the other side of the first stage axis of symmetry.