Patents Assigned to STMicroelectronics AS
  • ELECTRONIC SYSTEM HAVING INCREASED COUPLING BY USING HORIZONTAL AND VERTICAL COMMUNICATION CHANNELS
    Publication number: 20190244948
    Abstract: An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.
    Type: Application
    Filed: April 19, 2019
    Publication date: August 8, 2019
    Applicant: STMicroelectronics S.r.l.
    Inventor: Alberto PAGANI
  • Bipolar transistor and method of manufacturing the same
    Patent number: 10374069
    Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening having sidewalls lined with an insulating sheath. A portion of the insulating sheath adjacent the base region is removed and a base contact region is formed by epitaxial material grown from a portion of the base region exposed by removal of the portion of the insulating sheath.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: August 6, 2019
    Assignee: STMicroelectronics SA
    Inventor: Pascal Chevalier
  • High-voltage switching circuit, corresponding device and method
    Patent number: 10374600
    Abstract: First and second comparators receive input signals of opposed polarities and drive operation of a switch in response thereto. A first current generator supplies a first current to the switch which, in response to the control of the first and second comparators, applies the first current, alternatively, to a first node or a second node. A second current generator sinks a second current from the first node and a third current generator sinks a third current from the second node. A logic circuit has inputs coupled to the first node and the second node, respectively, receives respective switching signals having fast switching wavefronts and delayed switching wavefronts. The output of logic circuit is configured for switching between a first state and a second state with switching between the first state and the second state triggered by the fast switching wavefronts of the respective switching signals.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: August 6, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ignazio Bruno Mirabella, Agatino Antonino Alessandro
  • Integrated device and method for driving lighting loads with a brightness compensation
    Patent number: 10375774
    Abstract: An integrated device for driving a lighting load, such as a LED, has a first memory element, configured to store a nominal duty-cycle at a nominal supply voltage. An actual voltage acquisition element is configured to detect an actual supply voltage. A processing unit is coupled to the first memory element and to the actual voltage acquisition element and configured to calculate a voltage compensated duty-cycle. A driver unit is coupled to the processing unit and is configured to be supplied according to the voltage compensated duty-cycle.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: August 6, 2019
    Assignees: STMicroelectronics S.r.l., STMicroelectronics Application GMBH
    Inventors: Manuel Gaertner, Sergio Lecce, Giovanni Luca Torrisi
  • Driver circuit, corresponding device and method
    Patent number: 10374603
    Abstract: In one embodiment, a (pre)driver circuit includes first and a second output terminal for driving an electronic switch that includes a control terminal and a current path through the switch. The arrangement can operate in one or more first driving configurations (e.g., for PMOS), with the first and second output terminals are coupled to the current path and the control electrode of the electronic switch, respectively, and one or more second driving configurations (e.g., for NMOS, both HS and LS), wherein the first and second output terminals of the driver circuit are coupled to the control electrode and the current path of the electronic switch, respectively.
    Type: Grant
    Filed: February 19, 2018
    Date of Patent: August 6, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Daniele Zella, Vanni Poletto, Mauro Foppiani
  • Integrated electronic device for detecting ultraviolet radiation
    Patent number: 10371572
    Abstract: An integrated electronic device for detecting the composition of ultraviolet radiation includes a cathode region formed by a semiconductor material with a first type of conductivity. A first anode region and a second anode region are laterally staggered with respect to one another and are set in contact with the cathode region. The cathode region and the first anode region form a first sensor. The cathode region and the second anode region form a second sensor. In a spectral range formed by the UVA band and by the UVB band, the first and second sensors have, respectively, a first spectral responsivity and a second spectral responsivity different from one another.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: August 6, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Massimo Cataldo Mazzillo, Antonella Sciuto, Paolo Badalà
  • COMMON-MODE FILTER
    Publication number: 20190238110
    Abstract: A filtering circuit includes at least two common-mode filters that are electrically coupled in series and magnetically coupled. The first common-mode filter includes first and second spiral inductors that are positively magnetically coupled and electrically isolated from each other. The second common-mode filter includes third and fourth spiral inductors that are positively magnetically coupled and electrically isolated from each other. The first and third spiral inductors are electrically connected in series and negatively magnetically coupled. Likewise, the second and fourth spiral inductors are electrically connected in series and negatively magnetically coupled.
    Type: Application
    Filed: January 28, 2019
    Publication date: August 1, 2019
    Applicant: STMicroelectronics (Tours) SAS
    Inventor: Joel CONCORD
  • METHOD FOR BIASING COLUMNS OF A PIXEL ARRAY AND ASSOCIATED DEVICE
    Publication number: 20190238779
    Abstract: A method is disclosed for operating an imaging device having a matrix of pixels arranged in rows and columns. A polarization voltage is generated on a gate of a main MOS transistor that is connected as diode. The main MOS transistor is coupled between a power supply voltage and a ground circuit. Prior to reading the pixels of a row of the matrix, a plurality of first capacitors are charged with the polarization voltage. The first capacitors are coupled between the gate of the main transistor and a ground node. Upon reading the pixels of the row, the first capacitors are discharged on respective gates of auxiliary transistors coupled between the columns and the ground node so as to switch on the auxiliary transistors and deliver a substantially identical polarization current to each column.
    Type: Application
    Filed: October 19, 2018
    Publication date: August 1, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Nicolas Moeneclaey
  • JUNCTION REGION BETWEEN TWO WAVEGUIDES AND ASSOCIATED METHOD OF PRODUCTION
    Publication number: 20190235166
    Abstract: A photonic integrated device includes a first waveguide and a second waveguide. The first and second waveguides are mutually coupled at a junction region which includes a bulge region. The bulge region is defined two successive etching operations using two distinct etch masks, where the first etching operation is a partial etch and the second etching operation is a complete etch.
    Type: Application
    Filed: April 3, 2019
    Publication date: August 1, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventor: Charles BAUDOT
  • METHOD FOR PROGRAMMING A SPLIT-GATE MEMORY CELL AND CORRESPONDING MEMORY DEVICE
    Publication number: 20190237141
    Abstract: A split-gate memory cell includes a state transistor possessing a control gate and a floating gate and a selection transistor possessing a selection gate. The split-gate memory cell is programmed by applying, during a programming duration, a first voltage to the control gate, a second voltage to a drain of the state transistor and a third voltage to the selection gate of the selection transistor. The third voltage is transitioned during the programming duration between a first value and a second value greater than the first value.
    Type: Application
    Filed: January 24, 2019
    Publication date: August 1, 2019
    Applicants: STMicroelectronics (Rousset) SAS, STMicroelectronics (Crolles 2) SAS
    Inventors: Francesco LA ROSA, Marc MANTELLI, Stephan NIEL, Arnaud REGNIER
  • STANDARD INTEGRATED CELL WITH CAPACITIVE DECOUPLING STRUCTURE
    Publication number: 20190237589
    Abstract: A standard integrated cell includes a semiconductor region with a functional domain for logic circuits including a transistor and an adjacent continuity domain that extends out to an edge of the standard integrated cell. The edge is configured to be adjacent to another continuity domain of another standard integrated cell. The standard integrated cell further includes at capacitive element. This capacitive element may be housed in the continuity domain, for example at or near the edge. Alternatively, the capacitive element may be housed at a location which extends around a substrate region of the transistor.
    Type: Application
    Filed: January 28, 2019
    Publication date: August 1, 2019
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Abderrezak MARZAKI
  • Smart bulb system
    Patent number: 10364946
    Abstract: Disclosed herein is a lighting system including a bulb. The bulb includes a phosphor plate, and a scanning projector to emit a beam of collimated light and scan the beam of collimated light across the phosphor plate to thereby cause emission of light by portions of the phosphor plate impinged upon by the beam of collimated light. Control circuitry wirelessly receives configuration data and modulates the beam of collimated light during scanning so that the scanning forms a projection pattern on the phosphor plate. A control system is spaced apart from the bulb and processes the initial configuration data, and wirelessly sends the configuration data to the control circuitry of the bulb. A mobile wireless communications device wirelessly sends initial configuration data to the control system.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: July 30, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Guido Marco Bertoni, Massimo Ratti
  • Method and system for analyzing skin lesions
    Patent number: 10362985
    Abstract: A method can be used for analyzing digital images of skin lesions. The images include pixels distributed over a lesion area. Sets of values including a first discrimination value indicative of a weighted average of the image pixels with weighing at the border of the lesion, a second discrimination value indicative of skewness and kurtosis of the distribution of the image pixels, a third discrimination value indicative of the ratio of symmetry and gray-level power of the distribution of the image pixels and calculated. A total additive score of the values in the sets of values is provided and compared with a total score threshold. The first, second and third discrimination values are compared with respective first, second and third discrimination threshold values. An output classification for the image analyzed is provided as a function of the results of the comparing.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: July 30, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Rundo, Giuseppe Luigi Banna
  • Integrated micro-electromechanical device of semiconductor material having a diaphragm, such as a pressure sensor and an actuator
    Patent number: 10364143
    Abstract: An integrated micro-electromechanical device includes a first body of semiconductor material having a first face and a second face opposite the first surface, with the first body including a buried cavity forming a diaphragm delimited between the buried cavity and the first face. The diaphragm is monolithic with the first body. At least one first magnetic via extends between the second face and the buried cavity of the first body. A first magnetic region extends over the first face of the first body. A first coil extends over the second face of the first body and is magnetically coupled to the first magnetic via.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: July 30, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alberto Pagani, Alessandro Motta
  • Integrated electronic device with transceiving antenna and magnetic interconnection
    Patent number: 10366969
    Abstract: An embodiment of an integrated electronic device having a body, made at least partially of semiconductor material and having a top surface, a bottom surface, and a side surface, and a first antenna, which is integrated in the body and enables magnetic or electromagnetic coupling of the integrated electronic device with a further antenna. The integrated electronic device moreover has a coupling region made of magnetic material, which provides, in use, a communication channel between the first antenna and the further antenna.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: July 30, 2019
    Assignee: STMicroelectronics S.r.l
    Inventors: Alberto Pagani, Giovanni Girlando
  • Process for manufacturing a microelectronic device having a black surface, and microelectronic device
    Patent number: 10364145
    Abstract: A roughened silicon surface is formed by a process including repetitively performed roughening cycles. Each roughening cycles including a step for depositing a non-planar polymeric layer over an area of a silicon body and a step for plasma etching the polymeric layer and the area of the silicon body etch in a non-unidirectional way. As a result, a surface portion of the silicon body is removed, in a non-uniform way, to a depth not greater than 10 nm.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: July 30, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Somaschini, Pietro Petruzza
  • Probe card for a magnetically-actuable device and test system including the probe card
    Patent number: 10364147
    Abstract: A probe card fits in a system for testing a micro-electro-mechanical device having an element sensitive to a magnetic field. The probe card is formed by a PCB having a through-opening and probe tips for electrically contacting the micro-electro-mechanical device. A housing structure is received within the through-opening. The housing structure includes a planar peripheral region surrounding seats that protrude and extend at least partly into the through-opening. Magnetic elements are arranged in the seats, with the magnetic elements configured to generate a test magnetic field for testing operation of the micro-electro-mechanical device.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: July 30, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Rossi, Sergio Mansueto Reina, Giacomo Calcaterra
  • Compact non-volatile memory device
    Patent number: 10366757
    Abstract: A non-volatile memory cell includes a selection transistor having an insulated selection gate embedded in a semiconducting substrate region. A semiconducting source region contacts a lower part of the insulated selection gate. A state transistor includes a floating gate having an insulated part embedded in the substrate region above an upper part of the insulated selection gate, a semiconducting drain region, and a control gate insulated from the floating gate and located partially above the floating gate. The source region, the drain region, the substrate region, and the control gate are individually polarizable.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: July 30, 2019
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Julien Delalleau
  • Method for operating a laser projector to have a uniform scan pattern
    Patent number: 10365476
    Abstract: Mirror control circuitry described herein is for controlling a first micro-mirror of a micro-mirror apparatus that scans across a target area in a scan pattern. The mirror control circuitry includes a processor that determines a mechanical angle of the first micro-mirror for a given instant in time during scanning of the first micro-mirror between upper and lower rotational limits, the mechanical angle being such to maintain the scan pattern as being uniform while the micro-mirror apparatus scans across the target area between the upper and lower rotational limits. The processor also generates a driving signal for the first micro-mirror as a function of the determined mechanical angle for the first micro-mirror at the given instant in time.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: July 30, 2019
    Assignee: STMicroelectronics Ltd
    Inventors: Guy Amor, Offir Duvdevany
  • Oscillating structure with piezoelectric actuation, system and manufacturing method
    Patent number: 10365475
    Abstract: An oscillating structure with piezoelectric actuation includes first and second torsional elastic elements constrained to respective portions of a fixed supporting body and defining an axis of rotation. A mobile element is positioned between, and connected to, the first and second torsional elastic elements by first and second rigid regions. A first control region is coupled to the first rigid region and includes a first piezoelectric actuator. A second control region is coupled to the second rigid region and includes a second piezoelectric actuator. The first and second piezoelectric actuators are configured to cause local deformation of the first and second control regions to induce a torsion of the first and second torsional elastic elements.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: July 30, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Carminati, Massimiliano Merli, Sebastiano Conti