Abstract: In order to verify the authenticity of a product associated with a host device, the product contains, in segments of a non-volatile memory, several different functions stored in ciphered fashion. The host device sends a control signal for selecting and activating one of those ciphered functions. The product then deciphers and executes the function. The result of the function execution is then communicated back to host device when a decision on product authenticity is made.

Abstract: A device includes a thermally deformable assembly accommodated in a cavity of the interconnection part of an integrated circuit. The assembly can bend when there is a variation in temperature, so that its free end zone is displaced vertically. The assembly can be formed in the back end of line of the integrated circuit.

Abstract: An embodiment method includes storing, in each of a first plurality of memory locations of a memory, an address of another of the first plurality of memory locations, and reading, from a bus signal received at the memory, an address of a first one of the first plurality of memory locations. The method further includes reading data stored in the first one of the first plurality of memory locations, and determining, using the read data, whether a read error has occurred.

Abstract: The present disclosure is directed to a ceramic substrate that includes a plurality of contact pads, a plurality of electrical traces, and a microelectromechanical die. Contacts on the die are coupled to the plurality of contact pads through the plurality of electrical traces. The substrate also includes a plurality of memory bits formed directly on the substrate. Each memory bit is coupled between a first one of the contact pads and a second one of the contact pads.

Abstract: A method of forming a via to an underlying layer of a semiconductor device is provided. The method may include forming a pillar over the underlying layer using a sidewall image transfer process. A dielectric layer is formed over the pillar and the underlying layer; and a via mask patterned over the dielectric layer, the via mask having a mask opening at least partially overlapping the pillar. A via opening is etched in the dielectric layer using the via mask, the mask opening defining a first lateral dimension of the via opening in a first direction and the pillar defining a second lateral dimension of the via opening in a second direction different than the first direction. The via opening is filled with a conductor to form the via. A semiconductor device and via structure are also provided.

Abstract: An electronic device includes a touch screen controller. The touch screen controller is configured to asynchronously measure a capacitance between a sense line and a drive line of a sensing layer with respect to a horizontal sync signal of a display layer. In addition, the touch screen controller is also configured to disconnect from the sense line for a given period of time following a rising edge of the horizontal sync signal so as to reduce capacitive coupling of display noise from the horizontal sync signal to the sensing layer.

Abstract: Disclosed herein is a control circuit for a movable mirror. The control circuit includes driving circuitry configured to drive the movable mirror with a drive signal to effectuate oscillating of the movable mirror, opening angle determination circuitry configured to determine an opening angle of the movable mirror, and amplitude control circuitry. The amplitude control circuitry is configured to a) first cause the driving circuitry to generate the drive signal as having an upper threshold drive amplitude, and b) then later cause the driving circuitry to generate the drive signal as having a nominal drive amplitude, as a function of the opening angle of the movable mirror being equal to a desired opening angle.

Abstract: A thermo-electric generator includes a semiconductor membrane with a phononic structure containing at least one P-N junction. The membrane is suspended between a first support designed to be coupled to a cold thermal source and a second support designed to be coupled to a hot thermal source. The structure for suspending the membrane has an architecture allowing the heat flux to be redistributed within the plane of the membrane.

Abstract: An automatic adjustment of a piece of equipment of a motor vehicle is performed in response to detecting the presence of at least one person on at least one seat of the motor vehicle or detecting the absence of a person on a front passenger seat of the motor vehicle. The automatic adjustment of the at least one piece of equipment as a function of the result of the detection.

Abstract: A micro-electro-mechanical device formed in a monolithic body of semiconductor material accommodating a first buried cavity; a sensitive region above the first buried cavity; and a second buried cavity extending in the sensitive region. A decoupling trench extends from a first face of the monolithic body as far as the first buried cavity and laterally surrounds the second buried cavity. The decoupling trench separates the sensitive region from a peripheral portion of the monolithic body.

Abstract: Color signals to be displayed on a colored display surface and having a first gamut in a color space, are subjected to radiometric compensation. An embodiment includes displaying on the colored surface a set of control points of a known color, acquiring via a camera the control points as displayed on the colored surface and evaluating at least one second color gamut of the control points displayed on the colored surface. The second color gamut(s) is/are misaligned with respect to the first color gamut due to the display surface being a colored surface. The method may also include evaluating as an intersection gamut, the misalignment of the second color gamut(s) with respect to the first color gamut, calculating the color transformation operator(s) as a function of the misalignment evaluated, and applying the color transformation operator(s) to the color signals for display on the colored display surface.

Abstract: An electrical protection device including an input line, an output terminal, and a power transistor coupled between the input line and the output terminal A sensing transistor is connected between the input line and the output terminal and has a body terminal. A control stage is coupled to respective control terminals of the power transistor and of the sensing transistor and is configured to limit a first current of the power transistor to a protection value. A body-driving stage is coupled to the body terminal and is configured to bias the body terminal of the sensing transistor as a function of an operating condition of the power transistor.

Abstract: A first differential amplifier output drives a first winding of a stepper motor and a second differential amplifier output drives a second winding of the stepper motor. Inputs of the first and second differential amplifiers receive input drive signals generated by either a digital to analog converter or a pulse width modulator, where the input drive signals are phase offset sinusoids. Current flowing through a stepper motor winding is sensed to generate a current sense signal. A stall sensing circuit processes the current sense signal to determine whether the stepper motor has stalled by: taking a first derivative of the current sense signal to generate a first derivative signal; taking a second derivative of the current sense signal to generate a second derivative signal; and processing one or more of the current sense signal, the first derivative signal and the second derivative signal to detect a stepper motor stall condition.

Abstract: An autocorrective writing to a multiport static random access memory device is performed on at least one multiport static random access memory cell circuit. A first datum is written to the multiport static random access memory cell circuit and a second datum stored in the circuit is read from the multiport static random access memory cell subsequent to writing. The first and second data are compared. In response to the results of that comparison, an operation to rewriting the first datum to the circuit along with application of a write assist mechanism is selectively performed.

Abstract: A back-side illuminated pixel including a semiconductor substrate of a first conductivity type coated, on the front side of the pixel, with a three-layer assembly successively including a first layer of the second conductivity type, an insulating layer, and a second semiconductor layer. The three-layer assembly is interrupted in a central portion of the pixel by a transfer region of the first conductivity type laterally delimited by an insulated conductive wall extending from the front surface, Transistors are formed in the second semiconductor layer.

Abstract: A synchronous retention flip-flop circuit includes a first circuit module powered by an interruptible power source and a second circuit module powered by a permanent power source. The first circuit module includes a first latch circuit and a second latch circuit which are configured to store at least one datum while the interruptible power source is supplying power. A transmission circuit operates to deliver the at least one datum to the second circuit module before an interruption of the interruptible power source. The second circuit module preserves the at least one datum during the interruption. Following an end of the interruption, a restoring circuit transfers the at least one datum from the second circuit module to the first circuit module via a single one of the first and second latch circuits.

Abstract: An embodiment described herein includes a method for producing a wafer of a first semiconductor material. Said first semiconductor material has a first melting temperature. The method comprises providing a crystalline substrate of a second semiconductor material having a second melting temperature lower than the first melting temperature, and exposing the crystalline substrate to a flow of first material precursors for forming a first layer of the first material on the substrate. The method further comprising bringing the crystalline substrate to a first process temperature higher than the second melting temperature, and at the same time lower than the first melting temperature, in such a way the second material melts, separating the second melted material from the first layer, and exposing the first layer to the flow of the first material precursor for forming a second layer of the first material on the first layer.

Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference formed by a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.

Abstract: A method for use in manufacturing semiconductor devices such as, e.g., semiconductor power devices includes providing: a semiconductor die provided with bonding pads, a lead frame for the semiconductor die, a wire bonding layout including electrically conductive wires coupling bonding pads of the semiconductor die with leads in the lead frame. One or more bonding pads of the semiconductor die is/are coupled to a respective lead in the lead frame via a plurality of wires with a plurality of mutually insulated testing lands in the respective lead, so that the plurality of wires are coupled to respective testing lands. The electrical connection between such a bonding pad and the respective lead may be tested by testing the individual electrical connections between the bonding pad and the plurality of testing lands.

Abstract: In one example, a method of compensating resistance in an integrated circuit includes providing a four terminal resistor in a semiconductor substrate. The resistor includes a first resistor and a second resistor coupled in series, a first terminal at a first end of the resistor, a second terminal at a second end of the resistor, a test terminal at a node connecting the first resistor and the second resistor, and a tuning terminal. The first resistor has a first conductivity type and the second resistor has a second conductivity type opposite to the first conductivity type. The first resistor includes a first portion extending along a first direction and a second portion extending along a second direction perpendicular to the first direction. The method further includes computing a voltage to be applied at the tuning terminal to compensate the difference between the resistance of the first and the second resistors.