Patents Assigned to STMicroelectronics AS
  • Patent number: 10134759
    Abstract: A method for making a semiconductor device may include forming, above a substrate, a plurality of fins, forming a first semiconductor material on sides of a first group of the fins, and forming a second semiconductor material on sides of a second group of the fins. The method may further include forming a dielectric layer overlying the plurality of fins to define first and second groups of nanowires within the dielectric layer, with the first group of nanowires including the first semiconductor material and the second group of nanowires including the second semiconductor material.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: November 20, 2018
    Assignees: STMICROELECTRONICS, INC., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nicolas Loubet, James Kuss
  • Patent number: 10134894
    Abstract: Circuit module designs that incorporate dual gate field effect transistors are implemented with fully depleted silicon-on-insulator (FD-SOI) technology. Lowering the threshold voltages of the transistors can be accomplished through dynamic secondary gate control in which a back-biasing technique is used to operate the dual gate FD-SOI transistors with enhanced switching performance. Consequently, such transistors can operate at very low core voltage supply levels, down to as low as about 0.4 V, which allows the transistors to respond quickly and to switch at higher speeds. Performance improvements are shown in circuit simulations of an inverter, an amplifier, a level shifter, and a voltage detection circuit module.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: November 20, 2018
    Assignee: STMicroelectronics International N.V.
    Inventors: Anand Kumar, Ankit Agrawal
  • Patent number: 10135733
    Abstract: A receiver circuit extracts data from a serial data signal. The serial data signal contains a data packet having a first format with a first number of bits or a second format with a second number of bits based on a selection signal. The second format comprises the bits of the first format followed by one or more additional bits. The receiver circuit has at least one shift register having a total number of bits equal or greater than the number of bits of the second format and a switching circuit that selectively connects the serial data signal to one of the shift register serial inputs as a function of the selection signal. When the first format is selected and the respective bits received, the bits are stored in given positions of the one or more shift registers. The switching circuit also, when the second format is selected and the respective bits received, stores the bits of the first format included at the beginning of the second format in the same given positions of the one or more shift registers.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: November 20, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Francesco Pappalardo, Giuseppe Notarangelo
  • Patent number: 10132934
    Abstract: A detection device is formed in a body of semiconductor material having a first face, a second face, and a cavity. A detection area formed in the cavity, and a gas pump is integrated in the body and configured to force movement of gas towards the detection area. A detection system of an optical type or a detector of alpha particles is arranged at least in part in the detection area.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: November 20, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Sara Loi, Alberto Pagani
  • Patent number: 10135365
    Abstract: A piezoelectric transducer includes: an anchorage; a beam of semiconductor material, extending in cantilever fashion from the anchorage in a main direction parallel to a first axis and having a face parallel to a first plane defined by the first axis and by a second axis perpendicular to the first axis; and a piezoelectric layer on the face of the beam. A cross-section of the beam perpendicular to the first axis is asymmetrical and is shaped so that the beam presents deformations out of the first plane in response to forces applied to the anchorage and oriented according to the first axis.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: November 20, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Procopio, Attilio Frangi
  • Patent number: 10135451
    Abstract: In some embodiments, a phase locked loop includes a voltage-controlled oscillator whose output is fed back to a first input of a phase comparator via a fractional divider controlled by a delta-sigma modulator. The method of doubling the frequency of the initial reference signal of the phase locked loop involves generating, from the initial reference signal and the output signal furnished by the voltage-controlled oscillator, a secondary reference signal having edges of a first type synchronized with each of the rising and falling edges of the initial reference signal and edges of a second type between the edges of the first type, and a furnishing of the secondary reference signal at a second input of the phase comparator operating on the edges of the first type.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: November 20, 2018
    Assignee: STMicroelectronics SA
    Inventors: Marc Houdebine, Sebastien Dedieu
  • Patent number: 10136156
    Abstract: An appropriate motion vector to assign to a pixel in a digital video frame is performed by a comparison of motion vectors of particular surrounding pixels. Direction of at least one of color transition or color brightness transition in the digital video frame is detected to detect direction of object boundaries in the digital video frame. The particular surrounding pixels are selected and grouped (filtered) according to the detected object boundary direction at each pixel. A comparison of the motion vectors of the surrounding pixels then provides information on which group of pixels to assign a current pixel being processed based in part on how close the motion vectors of the surrounding groups match a group pixels to which the pixel being processed belongs.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: November 20, 2018
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Anatoliy Vasilevich Tsyrganovich
  • Patent number: 10133290
    Abstract: A circuit for balancing a voltage across a semiconductor element series-connected with other semiconductor elements of the same type may include a comparator configured to compare data representative of a voltage across the semiconductor element with a reference voltage, and a resistive element of adjustable value and configured to be controlled by the comparator.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: November 20, 2018
    Assignee: STMICROELECTRONICS (TOURS) SAS
    Inventors: Bertrand Rivet, David Jouve
  • Publication number: 20180330998
    Abstract: A strip or portions of a strip of silicon-germanium is made by first producing a strip of silicon suspended above a substrate. At least a portion of the strip of silicon is with a layer of silicon-germanium. Germanium enrichment of the portion of the strip of silicon is accomplished through a thermal oxidation. The resulting silicon oxide formed during the thermal oxidation is then removed.
    Type: Application
    Filed: May 8, 2018
    Publication date: November 15, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventor: Loic GABEN
  • Publication number: 20180331580
    Abstract: Radiofrequency energy that is captured by a radiofrequency power harvester is stored in a storage capacitance. One or more user circuits are supplied with energy stored in the storage capacitance. The harvester operates in alternated charge and burst phases with captured radiofrequency energy stored in the storage capacitance in the charge phases and supplied to the user circuits in the burst phases to perform user circuit tasks. In response to detection of completion of the user circuit tasks in a burst phase, the harvester causes operation to shift to the next charge phase.
    Type: Application
    Filed: May 9, 2018
    Publication date: November 15, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventors: Roberto LAROSA, Giulio ZOPPI
  • Publication number: 20180331400
    Abstract: A lithium-metal or lithium-ion battery includes a stack of a cathode layer made of LiCoO2, an anode layer and an electrolyte layer made of LiPON positioned between anode and cathode layers. An encapsulating layer covers the stack. The battery further includes an interface layer made of a material that is able to capture oxygen generated during charge/discharge cycles of the battery. This interface layer is placed under the encapsulating layer.
    Type: Application
    Filed: May 10, 2018
    Publication date: November 15, 2018
    Applicant: STMicroelectronics (Tours) SAS
    Inventor: Delphine GUY-BOUYSSOU
  • Publication number: 20180329721
    Abstract: A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a leaving of a stand-by mode of operation. A signal intercepting unit intercepts the external signal and transmitting it with a delay to the unit for managing.
    Type: Application
    Filed: July 3, 2018
    Publication date: November 15, 2018
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Nicolas Froidevaux, Jean-Michel Gril-Maffre, Jean-Pierre Leca
  • Publication number: 20180329064
    Abstract: A scanning emitter generates a transmit light signal at a first scan position, and a reflection of that transmit light signal is received at a sensor array including columns, wherein each column includes photosensitive pixels. Each photosensitive pixel in the sensor array generates a photo signal in response reception of the reflection of the transmit light signal. Over an evaluation time and for each individual column in the sensor array, a count is made as to the number of times the photosensitive pixels in the column generate photo signals. A light profile histogram is produced from the column counts. The light profile histogram is then processed to detect an optical misalignment between the scanning emitter and the sensor array.
    Type: Application
    Filed: May 9, 2017
    Publication date: November 15, 2018
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Pascal Mellot
  • Publication number: 20180331221
    Abstract: Longitudinal trenches extend between and on either side of first and second side-by-side strips. Transverse trenches extend from one edge to another edge of the first strip to define tensilely strained semiconductor slabs in the first strip, with the second strip including portions that are compressively strained in the longitudinal direction and/or tensilely strained in the transverse direction. In the first strip, N-channel MOS transistors are located inside and on top of the semiconductor slabs. In the second strip, P-channel MOS transistors are located inside and on top of the portions.
    Type: Application
    Filed: May 10, 2018
    Publication date: November 15, 2018
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Remy BERTHELON, Francois ANDRIEU
  • Publication number: 20180329069
    Abstract: A Global Navigation Satellite System (GNSS) receiver includes a Temperature Compensated Crystal Oscillator (TCCO) circuit. A micro jump of the TCCO circuit is detected by monitoring wide band phase values and carrier to noise ratio estimate values for each tracking channel of the tracking modules for the GNSS receiver. In response to a detected micro-jump, a frequency correction is calculated and applied to numerically controlled oscillators of phase/frequency lock loop circuits within tracking modules.
    Type: Application
    Filed: May 15, 2018
    Publication date: November 15, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventors: Domenico DIGRAZIA, Fabio PISONI
  • Publication number: 20180330961
    Abstract: A planarization structure is formed with a planar upper face enclosing a relief projecting from a planar substrate. The process used deposits a layer of a first material over the reliefs and then forms a layer of a second material with a planar upper face. This second material may be etched selectively with respect to the first material. The second layer is processed so that the protuberances of the first material are uncovered. A planarizing is then performed on the first material as far as the layer of the second material by selective chemical-mechanical polishing with respect to the second material.
    Type: Application
    Filed: May 14, 2018
    Publication date: November 15, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventor: Loic GABEN
  • Publication number: 20180329540
    Abstract: A capacitive sensing system includes a capacitive sensing panel with drive lines and sense lines. Each drive line includes a drive circuit. A code generator operates to generate modulation codes. A drive controller generates drive signals wherein each drive signal is modulated by one of the modulation codes. The generated drive signals are applied to the drive lines through the drive circuits. The drive controller operates to simultaneously generate the drive signals for application to a corresponding group of drive lines during a drive period. Separate groups of drive lines are sequentially driven with the same drive signals during drive periods that only partially overlap.
    Type: Application
    Filed: July 23, 2018
    Publication date: November 15, 2018
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventor: Kien Beng Tan
  • Publication number: 20180331332
    Abstract: Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.
    Type: Application
    Filed: July 10, 2018
    Publication date: November 15, 2018
    Applicant: STMicroelectronics (Tours) SAS
    Inventor: Ludovic Fallourd
  • Patent number: 10128761
    Abstract: The present disclosure is directed to a primary-controlled high power factor quasi resonant converter. The converter converts an AC power line input to a DC output to power a load, generally a string of LEDs, and may be compatible with phase-cut dimmers. The power input is fed into a transformer being controlled by a power switch. The power switch is driven by a controller having a shaping circuit. The shaping circuit uses a current generator, switched resistor and capacitor to produce a reference voltage signal. The controller drives the power switch based on the voltage reference signal, resulting in a sinusoidal input current in a primary winding of the transformer, resulting in high power factor and low total harmonic distortion for the converter.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: November 13, 2018
    Assignee: STMicroelectronics S.R.L.
    Inventors: Giovanni Gritti, Claudio Adragna
  • Patent number: 10128057
    Abstract: A supercapacitor including: a shell; a chamber in the shell; a first electrode and a second electrode on respective walls of the chamber; and a separator arranged between the first electrode and the second electrode through the chamber. The separator includes a first perforated membrane and a second perforated membrane, which is movable with respect to the first membrane between a first position, in which the first membrane and the second membrane are separate and a second position, in which the first membrane and the second membrane are in contact and coupled for rendering the separator impermeable.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: November 13, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Mario Giovanni Scurati, Marco Morelli, Fulvio Vittorio Fontana