Abstract: A method includes acquiring magnetic data from a magnetometer, processing the magnetic data to perform robust calibration, and generating optimum calibration parameters using a calibration status indicator. To that end, the method includes generating a calibration status indicator as a function of time elapsed since a last calibration and variation in total magnetic field in previously stored magnetic data, detecting anomalies, and extracting a sparse magnetic data set using comparison between the previously stored magnetic data and the magnetic data. Calibration parameters are generated for the magnetometer using a calibration method as a function of the magnetic data set. The calibration parameters are stored based on performing a validation and stability check on the calibration parameters, and weighted with the previously stored calibration parameters to produce weighted calibration parameters.

Abstract: A logic built-in self-test (LBIST) circuit implements a pipeline scan enable launch on shift (LOS) feature. A first scan chain flip-flop has a scan enable input configured to receive a first scan enable signal. A logic circuit has a first input coupled to a data output of the first scan chain flip-flop and a second input coupled to receive the first scan enable signal. A second scan chain flip-flop has a scan input coupled to a scan output of the first scan chain flip-flop. A scan enable input of the second scan chain flip-flop is coupled to receive a second scan enable signal generated at an output of the logic circuit. The first and second scan chain flip-flops are clocked by a same clock signal.

Abstract: A touch screen controller is for a drive line emitting a periodic signal and capacitively intersecting sense lines. A selection circuit, for each of a number of portions of the periodic signal equal to a number of the sense lines, couples a first subset of the sense lines to a first output path, and couples a second subset of the sense lines to a second output path, the second subset being sense lines not included in the first subset. Processing circuitry, for each portion of the periodic signal, measures a capacitance of the first output path, measures a capacitance of the second output path, and sums the capacitance of the first output path and the capacitance of the second output path. The processing circuitry determines a capacitance between each sense line of the first and second subsets and the drive line as a function of the sums.

Abstract: A method is for making a semiconductor device. The method may include forming fins above a substrate, each fin having an upper fin portion including a first semiconductor material and a lower fin portion including a dielectric material. The method may include forming recesses into sidewalls of each lower fin portion to expose a lower surface of a respective upper fin portion, and forming a second semiconductor layer surrounding the fins including the exposed lower surfaces of the upper fin portions. The second semiconductor layer may include a second semiconductor material to generate stress in the first semiconductor material.

Abstract: An image sensor device may include an array of image sensing pixels arranged in rows and columns. Each image sensing pixel may include an image sensing photodiode, a first source follower transistor coupled to the image sensing photodiode, and a switch coupled to the image sensing photodiode. Each image sensor device may include a second source follower transistor coupled to the switch, and a row selection transistor coupled to the first and second source follower transistors.

Abstract: Disclosed herein is a mirror controller for an oscillating mirror. The mirror controller includes a processor configured to receive a mirror sense signal from the oscillating mirror and to determine a phase error between the mirror sense signal and a mirror drive signal. The processor determines the phase error by sampling the mirror sense signal at a first time, sampling the mirror sense signal at a second time at which the mirror sense signal is expected to be equal to the mirror sense signal as sampled at the first time, and generating the phase error as a function of a difference between the sample of the mirror sense signal at the second time and the sample of the mirror sense signal at the first time.

Abstract: Electrostatic discharge (ESD) protection is provided by a circuit including a resistor having a first terminal and a second terminal, a zener diode having a cathode terminal directly connected to said first terminal and an anode terminal directly connected to a third terminal, and a clamp diode having a cathode terminal directly connected to said second terminal and an anode terminal directly connected to said third terminal.

Abstract: A triac has a vertical structure formed from a silicon substrate having an upper surface side. A main metallization on the upper surface side has a first portion resting on a first region of a first conductivity type formed in a layer of a second conductivity type. A second portion of the main metallization rests on a portion of the layer. A gate metallization on the upper surface side rests on a second region of the first conductivity type formed in the layer in the vicinity of the first region. A porous silicon bar formed in the layer at the upper surface side has a first end in contact with the gate metallization and a second end in contact with the main metallization.

Abstract: A self-supporting thin-film battery is manufacture by forming on the upper surface of a support substrate a vertical active stack having as a lower layer a metal layer having formed therein a first contact terminal of a first polarity of the battery and having formed therein as an upper layer a metal layer having a second contact terminal of a second polarity of the battery. A support film is then bonded to an upper surface of the upper layer. The lower layer is the separated from the substrate by projecting a laser beam through the substrate from a lower surface thereof to impinge on the lower layer.

Abstract: A transistor is fabricated by growing an epitaxial layer of semiconductor material on a semiconductor layer and forming an opening extending through the epitaxial layer at the gate location. This opening provides, from the epitaxial layer, a source epitaxial region on one side of the opening and a drain epitaxial region on an opposite side of the opening. The source epitaxial region and a first portion of the semiconductor layer underlying the source epitaxial region are annealed into a single crystal transistor source region. Additionally, the drain epitaxial region and a second portion of the semiconductor layer underlying the drain epitaxial region are annealed into a single crystal transistor drain region. A third portion of the semiconductor layer between the transistor source and drain regions forms a transistor channel region. A transistor gate electrode is then formed in the opening above the transistor channel region.

Abstract: An image sensor chip includes a semiconductor layer intended to receive illumination on a back face and comprising a matrix of pixels on a front face. An interconnection structure is arranged on the front face and a carrier is attached to the interconnection structure with a first face of the carrier facing the front face. An annular trench, arranged on a perimeter of the image sensor chip, extends from a second face of the carrier through an entire thickness of the carrier and into the interconnection structure. A via opening, arranged within the annual trench, extends from the second face of the carrier through the entire thickness of the carrier to reach a metal portion of the interconnection structure. The via opening an annual trench are lined with an insulating layer. The via opening include a metal conductor making an electrical connection to the metal portion.

Abstract: An alternating current (AC) drive signal having a first frequency and a high logic level at a boosted supply voltage is applied to drive a capacitive sensing line of a capacitive touch panel. The boosted supply voltage is generated by boosting an input voltage. The voltage boosting is effectuate by a charge pump circuit operating synchronous to assertion of the AC drive signal with a charge transfer time that is adaptable to different capacitive load conditions.

Abstract: An electronic device includes a substrate, an optical sensor coupled to the substrate, and an optical emitter coupled to the substrate. A lens is aligned with the optical emitter and includes an upper surface and an encapsulation bleed stop groove around the upper surface. An encapsulation material is coupled to the substrate and includes first and second encapsulation openings therethrough aligned with the optical sensor and the lens, respectively.

Abstract: A method for real-time quantitative detection of single-type, target nucleic acid sequences amplified using a PCR in a microwell, comprising introducing in the microwell a sample comprising target nucleic acid sequences, magnetic primers, and labelling probes; performing an amplification cycle to form labelled amplicons; attracting the magnetic primers to a surface through a magnetic field to form a layer including labelled amplification products and free magnetic primers; and detecting the labelled amplification products in the layer with a surface-specific reading method.

Abstract: A method can be used to make a semiconductor device. A number of projecting regions are formed over a first semiconductor layer that has a first conductivity type. The first semiconductor layer is located on an insulating layer that overlies a semiconductor substrate. The projecting regions are spaced apart from each other. Using the projecting regions as an implantation mask, dopants having a second conductivity type are implanted into the first semiconductor layer, so as to form a sequence of PN junctions forming diodes in the first semiconductor layer. The diodes vertically extend from an upper surface of the first semiconductor layer to the insulating layer.

Abstract: A reference clock signal of at least one module clock signal associated with each module is delivered. A measurement period is generated and a module whose consumption is to be determined is selected. The frequency of the at least one module clock signal associated with the selected module reduced during the measurement period. A measurement of a first consumption of the device is made in the measurement period. A measurement of a second consumption of the device is made outside the measurement period. The consumption of the selected module is determined from the first and measured first and second consumptions.

Abstract: Disclosed herein is a digital to analog converter including a first dynamic latch receiving a data signal and an inverse of the data signal. The first dynamic latch is clocked by a clock signal and configured to generate first and second quad switching control signals as a function of the data signal and the inverse of the data signal. A second dynamic latch receives the data signal and the inverse of the data signal, is clocked by an inverse of the clock signal, and is configured to generate third and fourth quad switching control signals as a function of the data signal and the inverse of the data signal. A quad switching bit cell is configured to generate an analog representation of the data signal as a function of the first, second, third, and fourth quad switching signals.

Abstract: A device is provided for jamming electromagnetic radiation liable to be emitted by at least one portion of an interconnect region located above at least one zone of an integrated electronic circuit produced in and on a semiconductor substrate. The device includes an antenna located above the at least one zone of the circuit and generating circuit coupled to the antenna and configured to generate an electrical signal having at least one pseudo-random property to pass through the antenna.

Abstract: Described herein is a transceiver circuit for a capacitive micromachined ultrasonic transducer (CMUT), provided with: a transmitter stage, which generates excitation pulses for a first node of the CMUT transducer during a transmitting phase, a second node of the CMUT transducer being coupled to a biasing voltage; a receiver stage that is selectively coupled to the first node during a receiving phase and has an amplification stage; a switching stage that couples the receiver stage to the first node during the receiving phase and decouples the receiver stage from the first node during the transmitting phase. The amplification stage is provided with a charge amplifier that has an input terminal and is biased as a function of a biasing voltage; and the switching stage is coupled to the same biasing voltage thereby minimizing an injection of charge into the input terminal upon switching from the transmitting phase to the receiving phase.

Abstract: A method can be used for reducing a memory operation time in a non-volatile memory device having a memory array with a number of memory cells. The method includes performing a first execution of the memory operation on a set of memory cells by applying a first biasing configuration, storing information associated to the first biasing configuration, and performing a second execution, subsequent to the first execution, of the memory operation on the same set of memory cells by applying a second biasing configuration that is determined according to the stored information associated to the first biasing configuration.