Abstract: The present disclosure is directed to a semiconductor die on a tapeless leadframe and covered in encapsulant. The semiconductor package includes leads formed from the leadframe and electrically coupled to the semiconductor die, the leads being accessible through electrical contacts embedded in the encapsulant. Openings between the leads and the leadframe are formed from etching recesses from opposing sides of the leadframe. The resulting openings have non-uniform sidewalls. The leadframe is further electrically or thermally coupled to electrical contacts embedded in the encapsulant. The embedded electrical contacts forming a land grid array.

Abstract: A structure protects a SLIC telephone line interface against overvoltages lower than a negative threshold or higher than a positive threshold. The structure includes at least one thyristor connected between each conductor of the telephone line and a reference potential. For all of the included thyristors, a metallization corresponding to the main electrode on the gate side is in contact, by its entire surface, with a corresponding semiconductor region. Furthermore, the gate of each thyristor is directly connected to a voltage source defining one of the thresholds.

Abstract: The present disclosure is directed to a plurality of waffle gate parallel transistors having a shared gate on a surface of a semiconductor substrate. The shared gate has connected channels that form a plurality of squares, lines of each of the squares over the perimeter of a respective source or drain region of the plurality of waffle gate parallel transistors. The shared gate includes squares of a first size and shape and a second size and shape. The squares having the first size and shape are each over a respective source region and the squares having the second size and shape are each over a respective drain region. Each of the squares having a first size and shape share at least one side with one of the squares having the second size and shape.

Abstract: A probe card for integrated circuit testing includes a printed circuit support and a probe head having a first surface mounted to a surface of the printed circuit support. A flexible substrate is positioned adjacent to a second surface of the probe head and includes at least one flexible extension which extends beyond an edge of the probe head and includes a bend to make contact with the surface of the printed circuit support. The flexible substrate further includes a test antenna configured to support a wireless communications channel with an integrated circuit under test. The integrated circuit under test includes at least one conductive structure that extends in the peripheral portion on different planes of metallizations to form an integrated antenna that is coupled for communication and/or power transfer to the test antenna.

Abstract: A switching amplifier, such as a Class D amplifier, includes a current sensing circuit. The current sensing circuit is formed by replica loop circuits that are selectively coupled to corresponding output inverter stages of the switching amplifier. The replica loop circuits operated to produce respective replica currents of the output currents generated by the output inverter stages. A sensing circuitry is coupled to receive the replica currents from the replica loop circuits and operates to produce an output sensing signal as a function of the respective replica currents.

Abstract: A diffractive optical element (DOE) is designed to implement both a collimation function with respect to an input divergent beam and a beam shaping function with respect to an output divergent beam. The phase designs of the collimation function and the beam shaping function are independently produced in the phase domain. These phase designs are then combined using a phase angle addition of the individual functions and wrapped between 0 and 2? radians. The diffractive surface of the DOE is then defined from the wrapped phase angle addition of the individual functions.

Abstract: An alternating current (AC) drive signal having a first frequency and a high logic level at a boosted supply voltage is applied to drive a capacitive sensing line of a capacitive touch panel. The boosted supply voltage is generated by boosting an input voltage. The voltage boosting is effectuate by a charge pump circuit operating synchronous to assertion of the AC drive signal with a charge transfer time that is adaptable to different capacitive load conditions.

Abstract: The lighting of a person via incident light radiation is controlled to address dazzling. The light radiation originates from a source of light and passes through a medium of variable and controllable opacity. The position of the source of light relative to the person can vary. A zone of the eyes of the person and a position of the zone of the eyes relative to the medium is detected. A incidence of dazzling of the zone of the eyes is detected. In response to the detection, the direction of incidence of the light radiation is determined. From this determination, from the position of the zone of the eyes, a region of said medium is identified that has a projection on the face of the person which includes said zone of the eyes. The opacity of the region of the medium is then modified in a controlled manner to preclude dazzling.

Abstract: A level shifting circuit has an input configured to receive an input signal, wherein the input signal has symmetrical maximum and minimum voltages. The level shifting circuit further includes an output configured to provide an output signal, wherein the output signal has asymmetrical maximum and minimum voltages. The output signal is generated in response to the input signal. The output signal is applied to drive a gate terminal of a SiC MOSFET.

Abstract: A demodulator circuit receives an envelope signal for comparison against a switched reference signal that is generated as a function of the envelope signal and as a function of an output signal of the demodulator circuit. The switched reference signal is filtered by an RC filter prior to comparison. The output signal is dependent on a difference between the filtered switched reference signal and the envelope signal.

Abstract: Disclosed herein is a sensor chip including at least one sensing device and a control circuit. The control circuit is configured to receive configuration data as input, and acquire data from the at least one sensing device in accordance with the configuration data. The control circuit classifies a context of the at least one sensing device relative to its surroundings based on analysis of the acquired data in accordance with the configuration data.

Abstract: A semiconductor device includes a layered package having a semiconductor die embedded therein, the semiconductor die coupled with a thermally-conductive element. The layered package includes, e.g., PCB boards with an intermediate layer having the semiconductor die arranged therein, and a pair of outer layers, with the thermally-conductive element including a thermally-conductive inlay in one of the outer layers.

Abstract: Image processing circuitry processes image frames in a sequence of image frames, for example, to identify objects of interest. The processing includes filtering motion vectors associated with a current image frame, grouping the filtered motion vectors associated with the current image frame into a set of clusters associated with the current image frame, and selectively merging clusters in the set of clusters associated with the current image frame. At least one of the filtering, the grouping and the merging may be based on one or more clusters associated with one or more previous image frames in the sequence of image frames. Motion vectors included in merged clusters associated with a previous frame may be added to filtered motion vectors before grouping the motion vectors in the current frame.

Abstract: A current mirror includes an input transistor and an output transistor, wherein the sources of the input and output transistor are connected to a supply voltage node. The gates of the input and output transistors are connected through a switch. A first current source is coupled to the input transistor to provide an input current. A copy transistor has a source connected to the supply node and a gate connected to the gate of the input transistor at a mirror node. A second current source is coupled to the copy transistor to provide a copy current. A source-follower transistor has its source connected to the mirror node and its gate connected to the drain of the copy transistor. Charge sharing at the mirror node occurs in response to actuation of the switch and the source-follower transistor is turned on in response thereto to discharge the mirror node.

Abstract: Resources of multiple systems are managed in a computer device. A first processing system having a set of dedicated resources also has a resource manager to manage at least one of the resources. The first processing system is prevented from directly accessing the resources without authorization. A second processing system, connected to the set of dedicated resources, has a supervisor application to grant control to individual resources to the resource manager of the first processing system. A computer program is executed in the first processing system. The supervisor application grants control of at least one resource to the resource manager of the first processing system in a way that is transparently to the computer program executing in the first processing system.

Abstract: A method for transferring messages from a producer element to a consumer element uses a memory shared between the producer element and the consumer element, and a hardware queue including several registers designed to contain addresses of the shared memory. The method includes the steps of storing each message for the consumer element in the shared memory in the form of a node of a linked list, including a pointer to a next node in the list, the pointer being initially void, writing successively the address of each node in a free slot of the queue, whereby the node identified by each slot of the queue is the first node of a linked list assigned to the slot, and when the queue is full, writing the address of the current node in memory, in the pointer of the last node of the linked list assigned to the last slot of the queue, whereby the current node is placed at the end of the linked list assigned to the last slot of the queue.

Abstract: A method of manufacturing a vertical conduction semiconductor device comprising the steps of: forming a recess in a monocrystalline silicon substrate; forming a silicon oxide seed layer in the recess; carrying out an epitaxial growth of silicon on the substrate, simultaneously growing a polycrystalline silicon region in the seed layer and a monocrystalline silicon region in surface regions of the substrate, which surround the seed layer; and implanting dopant species in the polycrystalline silicon region to form a conductive path in order to render the second conduction terminal electrically accessible from a front side of the vertical conduction semiconductor device.

Abstract: An embodiment is a system including a first wireless charging pad coupled to a wireless charging system and an energy source, the first wireless charging pad being configured to transmit an energy by a magnetic field. The system further includes a second wireless charging pad coupled to a second system, the second wireless charging pad configured to receive at least a portion of the energy from the first wireless charging system for operating the second system. Further embodiments include a least one of an electronic compass configured to provide alignment data of the first and second wireless charging pads, and an interface configured to receive the alignment data and affect an alignment of the first and second wireless charging pads.

Abstract: A proximity detector device may include a first interconnect layer including a first dielectric layer, and first electrically conductive traces carried thereby, an IC layer above the first interconnect layer and having an image sensor IC, and a light source IC laterally spaced from the image sensor IC. The proximity detector device may include a second interconnect layer above the IC layer and having a second dielectric layer, and second electrically conductive traces carried thereby. The second interconnect layer may have first and second openings therein respectively aligned with the image sensor IC and the light source IC. Each of the image sensor IC and the light source IC may be coupled to the first and second electrically conductive traces. The proximity detector device may include a lens assembly above the second interconnect layer and having first and second lenses respectively aligned with the first and second openings.

Abstract: The present disclosure is directed to a leadframe package having a side solder ball contact and methods of manufacturing the same. A plurality of solder balls are coupled to recesses in a leadframe before encapsulation and singulation. After singulation, a portion of each solder ball is exposed on sidewalls of the package. This ensures that the sidewalls of the leads are solder wettable, which allows for the formation of stronger joints when the package is coupled to a substrate. This increased adhesion reduces resistance at the joints and also mitigates the effects of expansion of the components in the package such that delamination is less likely to occur. As a result, packages with a side solder ball contact have increased life cycle expectancies.