Abstract: MEMS device having a support region elastically carrying a suspended mass through first elastic elements. A tuned dynamic absorber is elastically coupled to the suspended mass and configured to dampen quadrature forces acting on the suspended mass at the natural oscillation frequency of the dynamic absorber. The tuned dynamic absorber is formed by a damping mass coupled to the suspended mass through second elastic elements. In an embodiment, the suspended mass and the damping mass are formed in a same structural layer, for example of semiconductor material, and the damping mass is surrounded by the suspended mass.

Abstract: An address decoder, for a non-volatile memory device provided with a memory array having memory cells arranged in word lines (WL) and bit lines (BL), each memory cell being having a memory element and an access element with a MOS transistor for enabling access to the memory element. Source terminals of the MOS transistors of the access elements of the memory cells of a same word line are connected to a respective source line. The address decoder has a row-decoder circuit and a column-decoder circuit, for selecting and biasing the word lines and the bit lines, respectively, of the memory array with row-driving signals (VWL) and column-driving signals (VBL), respectively. The address decoder has a source-decoder circuit for generating source-driving signals (VSL) for biasing the source lines of the memory array, on the basis of the logic combination of the row-driving signals of associated word lines.

Abstract: The pressure in the combustion chamber of an electronically controlled spark plug ignition engine may be estimated in real time mode without specific sensors by processing sensed ionization current data to calculate features of the current waveform proven to be correlated to the pressure inside the engine cylinders and correlating them on the basis of a look up table of time invariant correlation coefficients generated through a calibration campaign of tests on a test engine purposely equipped with sensors. A mathematical model of the electrical and physical spark plug ignition system and combustion chamber of the engine is refined during calibration by iteratively testing the interactive performance of correlation coefficients of related terms of a mathematical expression of the model and comparing the expressed pressure value with the real pressure value as measured by a sensor.

Abstract: Embodiments of the present disclosure are directed to optical packages having a package body that includes a light protection coating on at least one surface of a transparent material. The light protection coating includes one or more openings to allow light to be transmitted to the optical device within the package body. In one embodiment, the light protection coating and the openings allow substantially perpendicular radiation to be directed to the optical device within the package body. In one exemplary embodiment the light protection coating is located on an outer surface of the transparent material. In another embodiment, the light protection coating is located on an inner surface of the transparent material inside of the package body.

Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.

Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.

Abstract: An oscillating structure includes first and second torsional elastic elements that define an axis of rotation and a moving element that is interposed between the first and second torsional elastic elements. The moving element, the first torsional elastic element and the second torsional elastic element lie in a first plane and are not in direct contact with one another. A coupling structure mechanically couples the moving element, the first torsional elastic element and the second torsional elastic element together. The moving element, the first torsional elastic element and the second torsional elastic element lie in a second plane different from the first plane. Oscillation of the moving element occurs as a result of a twisting of the first and second torsional elastic elements.

Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.

Abstract: A circuit with galvanic isolation includes a series of n cascaded transformers including a first transformer and a last transformer in the series. A transmitter is coupled to the primary winding of the first transformer in the series of cascaded transformers, the transmitter being configured for supplying to the primary winding a transmission signal as a function of an input signal. A receiver is coupled to the secondary winding of the last transformer of the series of cascaded transformers and is configured for receiving at the secondary winding a reception signal transmitted over the series of cascaded transformers. A predistortion module is configured for applying to the transmission signal a predistortion including an (n?1)-fold integration, where n is the number of cascaded transformers, of a transmission signal that would be supplied to the input of a sole transformer present in a single-transformer solution.

Abstract: An embodiment circuit includes a first voltage-controlled delay line (VCDL), a second VCDL, and a first flip-flop. The first VCDL includes a first input terminal configured to receive a first input voltage, and a second input terminal configured to receive a clock signal. The second VCDL includes a first input terminal configured to receive a second input voltage, and a second input terminal configured to receive the clock signal. The first flip-flop includes a reset pin coupled to an output terminal of the first VCDL, and a clock pin coupled to an output terminal of the second VCDL.

Abstract: A digital processor, such as, e.g., a divider in a PID controller, performs a mathematical operation such as division (or multiplication) involving operands represented by strings of bit signals and an operator to produce an operation result. The processor is configured by identifying first and second power-of-two approximating values of the operator as the nearest lower and nearest higher power-of-two values to the operator. The operation is performed on the input operands by means of the first and second power-of-two approximating values of the operator by shifting the bit signals in the operands by using the first and second power-of-two approximating values in an alternated sequence to produce: first approximate results by using the first power-of-two approximating value, second approximate results by using the second power-of-two approximating value. The average of the first and second approximate results is representative of the accurate result of the operation.

Abstract: A non-volatile memory of a complementary type includes sectors of memory cells, with each cell formed by a direct memory cell and a complementary memory cell. Each sector is in a non-written condition when the corresponding memory cells are in equal states and is in a written condition wherein each location thereof stores a first logic value or a second logic value when the memory cells of the location are in a first combination of different states or in a second combination of different states, respectively. A sector is selected and a determination is made as to a number of memory cells in the programmed state and a number of memory cells in the erased state. From this information, the condition of the selected sector is identified from a comparison between the number of memory cells in the programmed state and the number of memory cells in the erased state.

Abstract: Cantilever probes are produced for use in a test apparatus of integrated electronic circuits. The probes are configured to contact corresponding terminals of the electronic circuits to be tested during a test operation. The probe bodies are formed of electrically conductive materials. On a lower portion of each probe body that, in use, is directed to the respective terminal to be contacted, an electrically conductive contact region is formed having a first hardness value equal to or greater than 300 HV; each contact region and the respective probe body form the corresponding probe.

Abstract: A method for indexing electronic devices includes: forming first chips in a first wafer, forming second chips in a second wafer, forming the electronic devices by coupling each first chip with a corresponding second chip, and forming an index on each electronic device. The index is indicative of a position of the corresponding first chip in the first wafer. The step of forming an index includes forming a first portion of the index on the first chip, and forming a second portion of the index on the second chip.

Abstract: A semiconductor substrate has a back face and a front face and includes a semiconductor well that is electrically isolated from the semiconductor substrate. A device is configured to detect a thinning of the semiconductor substrate from the back face. The device includes at least one trench that extends within the semiconductor well between two peripheral locations from the front face down to a location situated at a distance from a bottom of the semiconductor well. The trench is electrically isolated from the semiconductor well. A detection circuit is configured to measure a physical quantity representative of well electrical resistance between two contact areas respectively situated on either side of the at least one first trench.

Abstract: Synchronization points are inserted into a program code to be monitored, and are associated with different branches resulting from execution of an indirect branch instruction. The synchronization points can be accessed by the monitored program code for the purpose of identifying which branch to use during execution of the indirect branch instruction of the monitored program code.

Abstract: An apparatus for the thermal testing of electronic devices may include a universal base board for coupling to an electronic driver unit for receiving electrical signals therefrom, and a plurality of test boards arranged on the base board. Each test board may include a holder for receiving a device under test and routing thereto electrical signals from the electronic driver unit as well as an adaptation board to the base board. Each test board may include a respective electrically powered heating element for heating the electronic device received thereat.

Abstract: A time-of-flight detection pixel includes a photosensitive area and at least two assemblies. Each assembly includes: a charge storage area; a transfer transistor configured to control charge transfer from the photosensitive area to the charge storage area; and readout circuit configured to non-destructively measure a quantity of charges stored in the charge storage area.

Abstract: A phase change memory includes an L-shaped resistive element having a first part that extends between a layer of phase change material and an upper end of a conductive via and a second part that rests at least partially on the upper end of the conductive via and may further extend beyond a peripheral edge of the conductive via. The upper part of the conductive via is surrounded by an insulating material that is not likely to adversely react with the metal material of the resistive element.

Abstract: A tunneling field effect transistor is formed from a fin of semiconductor material on a support substrate. The fin of semiconductor material includes a source region, a drain region and a channel region between the source region and drain region. A gate electrode straddles over the fin at the channel region. Sidewall spacers are provided on each side of the gate electrode. The source of the transistor is made from an epitaxial germanium content source region grown from the source region of the fin and doped with a first conductivity type. The drain of the transistor is made from an epitaxial silicon content drain region grown from the drain region of the fin and doped with a second conductivity type.