Abstract: A semiconductor device, such as a semiconductor power device, includes: a semiconductor die having a semiconductor die front surface, a package formed onto the semiconductor die, the package having a portion facing the front surface of the semiconductor die, and a thermally-conductive layer including graphene over the front portion of the package facing the front surface of the semiconductor die.

Abstract: An apparatus includes a camera module configured to generate at least one image and a ToF SPAD based range detecting module configured to generate at least one distance determination to an object within a field of view of the camera module. A processor receives the at least one image from the camera module output and receives the at least one distance determination from the ToF SPAD based range detecting module. This data is processed by the processor to determine a depth map.

Abstract: The present disclosure is directed to a system and method to remove common mode noise projected onto a touch sensor array from a display. The system is configured to activate two rows of electrodes at the same time, while coupling remaining rows of electrodes to ground. A first one of the two activated rows is used for detection of a touch and a second one of the two activated rows is used to detect common mode noise from the display. The common mode noise detected by the second row is removed from signals received from a plurality of columns of the touch sensor array.

Abstract: A method can be used for transmission of at least one packet of at least one bit over a serial link capable of taking two different states respectively associated with the two possible logical values of the at least one transmitted bit. Starting from a transmission start time of the at least one bit and up to the expiration of a first portion of a bit time associated with the at least one bit, the link is placed in one of its states depending on the logical value of the at least one bit. Upon the expiration of the first portion of this bit time, a first additional transition is generated over the link so as to place the link in its other state up to the expiration of the bit time.

Abstract: A circuit includes a first input terminal, a second input terminal, a third input terminal and an output terminal. A first summation node adds signals at the first and third input terminals. A second summation node subtracts signals at the second and third input terminals. A selector selects between the added signals and subtracted signals in response to a selection signal. The output of the selector is integrated to generate an integrated signal. The integrated signal is compared by a comparator to a threshold, the comparator generating an output signal at the output terminal having a first level and a second level. Feedback of the output signal produces the selection signal causing the selector to select the added signals in response to the first level of the output signal and causing the selector to select the subtracted signals in response to the second level of the output signal.

Abstract: Disclosed herein is an electronic device including a substrate, with an active layer stack on the substrate. A cover is on the active layer stack and has a surface area greater than that of the active layer so as to encapsulate the active layer stack. A conductive pad layer is on the cover. At least one conductive via extends between the active layer stack and the conductive pad layer.

Abstract: A decoding logic method is arranged to execute a zero-overhead loop in an embedded digital signal processor (DSP). In the method, instruction data is fetched from a memory, and a plurality of instruction tokens, which are derived from the instruction data, are stored in a token buffer. A first portion of one or more instruction tokens from the token buffer are passed to a first decode module, which may be an instruction decode module, and a second portion of the one or more instruction tokens from the token buffer are passed to a second decode module, which may be a loop decode module. The second decode module detects a special loop instruction token, and based on the detection of the special loop instruction token, a loop counter is conditionally tested. Using the first decode module, at least one instruction token of an iterative algorithm is assembled into a single instruction, which is executable in a single execution cycle.

Abstract: The receiver for a satellite positioning system includes at least one receive channel with an input stage configured to receive a satellite signals having different constellation frequencies belonging to one frequency band or to different frequency bands. The receive channel further includes a frequency transposition stage connected to the input stage (EE) and including a controllable local oscillator device configured to deliver different frequency transposition signals respectively adapted to the different constellation frequencies. A processing stage of the receive channel is connected to the frequency transposition stage and includes a control circuit configured to control the local oscillator device to sequentially and cyclically deliver the different frequency transposition signals.

Abstract: A memory device includes an array of phase-change memory cells and a word line. The memory device includes a control circuit, a first pull-up MOSFET and a second pull-up MOSFET connected in series between a first power-supply node set at a first supply voltage and the word line, a first pull-down MOSFET and a second pull-down MOSFET connected in series between the word line and a second power-supply node set at a reference potential, and a biasing MOSFET connected between the word line and a third power-supply node set at a second supply voltage higher than the first supply voltage. The first and second pull-up MOSFETs and the first and second pull-down MOSFETs have breakdown voltages lower than the breakdown voltage of the biasing MOSFET.

Abstract: An electronic device disclosed herein includes a first integrated circuit die having formed therein photodiodes and readout circuitry for the photodiodes, with the readout circuitry including output pads exposed on a surface of the first integrated circuit die. A second integrated circuit die has formed therein storage capacitor structures for the photodiodes and digital circuitry for performing image processing on data stored in the storage capacitor structures, with the storage capacitor structures including input pads exposed on a surface of the second integrated circuit die. The first and second integrated circuit die are in a face to face arrangement such that the output pads of the first integrated circuit die face the input pads of the second integrated circuit die. An interconnect couples the output pads of the first integrated circuit die to the input pads of the second integrated circuit die.

Abstract: An amplifier circuit a differential input stage coupled to a first input and to a second input between which a differential input voltage is present. A converter stage is coupled to the input stage to convert the differential input voltage into a converted voltage. An output stage is coupled to the converter stage and generates, starting from the converted voltage, an output voltage on a single output of the amplifier circuit. A biasing stage is coupled to the input stage and to the output stage to supply a biasing current. A chopper module reduces a contribution of offset and noise associated with the output voltage. The chopper module is coupled to the input stage, converter stage, and to the biasing stage. The chopper module includes an input chopper stage, a converter chopper stage, and a biasing chopper stage that operate jointly under control of a chopper signal.

Abstract: A method of verifying integrity of communications between a master circuit and a slave circuit includes updating a first cyclic multibit signature based on each transaction sent by the master circuit to the slave circuit. A second cyclic multibit signature is updated based on each transaction received by the slave circuit. One or more bits based on the second cyclic multibit signature are compared with corresponding bits based on the first cyclic multibit signature, with a number of the one or more bits being less than a total number of bits of the second cyclic signature. Error conditions are detected and responded based on the comparing.

Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An en encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.

Abstract: Multicast transmissions do not allow for individual receivers to acknowledge that data was received by each receiver in the network. This is not acceptable for isochronous systems that require specific levels of QoS for each device. A multimedia communications protocol supports using multicast transmissions (one-to-many) in multimedia isochronous systems. A transmitter establishes a Multi-ACKed Multicast protocol within which a group of receiving devices can acknowledge the multicast transmission during a multi-acknowledgment period.

Abstract: An ultrasonic probe includes: an ultrasonic transducer; an amplification stage; a bias circuit, which determines a bias voltage on an input terminal of the amplification stage; and a selector having an intermediate node, a high-voltage switch between the intermediate node and the transducer, and a first low-voltage switch between the intermediate node and the input terminal. A control unit controls the high-voltage switch and the first low-voltage switch so as to alternately couple and decouple the amplification stage and the transducer. A precharge circuit determines a precharge voltage on the intermediate node as a function of the bias voltage, before the amplification stage and the transducer are coupled.

Abstract: A vertical channel semiconductor device including: a semiconductor body including a substrate having a first conductivity type and a front layer having a second conductivity type; a first portion of trench and a second portion of trench; and, within the first and second portions of trench, a corresponding conductive region and a corresponding insulating layer. The first and second portions of trench delimit laterally a first semiconductor region and a second semiconductor region, the first semiconductor region having a maximum width greater than the maximum width of the second semiconductor region. The device further includes an emitter region having the first conductivity type, which extends in the front layer and includes: a full portion, which extends in the second semiconductor region; and an annular portion, which extends in the first semiconductor region. The annular portion laterally surrounds a top region having the second conductivity type.

Abstract: An electronic device determines an estimate ({circumflex over (q)}) of angular position as a function of an accelerometric signal (acc) supplied by an accelerometric sensor and as a function of at least one between a gyroscopic signal (gyro) supplied by a gyroscopic sensor and a magnetic signal (mag) supplied by a magnetic-field sensor. A processing module implements a complementary filter, which is provided with a first processing block, a second processing block, and a combination block. The first processing block receives the acceleration signal (acc) and an input signal (mag?) indicative of the magnetic signal (mag) and generates a geomagnetic quaternion (qAccMag). The second processing block receives a signal indicative of the gyroscopic signal (gyro) and generates a gyroscopic quaternion (qGyro).

Abstract: A converter includes an inductor configured to receive an input signal and output configured to supply an electrical load with an output signal. The converter operates to charge the inductor until a maximum pre-set current value is reached during a first operating condition in which the electrical load is not supplied. Next, the converter actively supplies the electrical load by partially discharging the inductor during a first time interval of a second operating condition. Then, the converter passively supplies the electrical load by the residual charge of the inductor during a second time interval, subsequent to the first time interval, of the second operating condition, by discharging the inductor completely.

Abstract: A circuit for biasing non-volatile memory cells includes a dummy decoding path between a global bias line and a biasing node, a reference current generator coupled to the dummy decoding path and configured to supply a reference current, a biasing stage configured to set a cell bias voltage on the biasing node, and a compensation stage configured to compensate a current absorption of the biasing stage at the biasing node so that the reference current will flow through the dummy decoding path.

Abstract: A method for making a photolithography mask for formation of electrically conducting contact pads between tracks of a metallization level and electrically active zones of integrated circuits formed on a semiconductor wafer includes forming a first mask region including first opening zones intended for the formation of the contact pads. The first opening zone has a first degree of opening that is below a threshold. A second mask region including additional opening zones is formed, with the overall degree of opening of the mask being greater than or equal to the threshold.