Abstract: An analog multiplexer includes inputs and one output. A switching circuit is coupled between each input and the output. Each switching circuit includes an NMOS switching module, having an on state and an off state, and a control module supplied by a first supply voltage and operating to reduce leakage currents of the NMOS switching module when in the off state. The control module further operates to make the first NMOS switching module bidirectional irrespective of voltages present at the input and at the output.

Abstract: A first differential amplifier output drives a first winding of a stepper motor and a second differential amplifier output drives a second winding of the stepper motor. Inputs of the first and second differential amplifiers receive input drive signals generated by either a digital to analog converter or a pulse width modulator, where the input drive signals are phase offset sinusoids. Current flowing through a stepper motor winding is sensed to generate a current sense signal. A stall sensing circuit processes the current sense signal to determine whether the stepper motor has stalled by: taking a first derivative of the current sense signal to generate a first derivative signal; taking a second derivative of the current sense signal to generate a second derivative signal; and processing one or more of the current sense signal, the first derivative signal and the second derivative signal to detect a stepper motor stall condition.

Abstract: A probe card fits in a system for testing a micro-electro-mechanical device having an element sensitive to a magnetic field. The probe card is formed by a PCB having a through-opening and probe tips for electrically contacting the micro-electro-mechanical device. A housing structure is received within the through-opening. The housing structure includes a planar peripheral region surrounding seats that protrude and extend at least partly into the through-opening. Magnetic elements are arranged in the seats, with the magnetic elements configured to generate a test magnetic field for testing operation of the micro-electro-mechanical device.

Abstract: The invention relates to a method for serial data transmission, comprising the steps consisting in computing the running disparity (RD) of a bit stream that is being transmitted; when the running disparity reaches a threshold (T), computing a point disparity on a subsequent frame (S) of the stream; if the point disparity has the same sign as the threshold, inverting the states of the bits of the frame in the transmitted bit stream; and inserting into the transmitted bit stream a polarity bit having a state signalling the inversion.

Abstract: A comparator circuit including: a first node and a second node, which receive a first current and a second current, respectively; a first current mirror, which includes a first load transistor and a first output transistor; and a second current mirror, which includes a second load transistor and a second output transistor.

Abstract: A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference current.

Abstract: An integrated sensor device including a first die, housing a sensor element to detect a quantity external to the sensor device and transduce the external quantity into an electrical sensing signal; a second die mechanically coupled to the first die so that the first and second dies are stacked on one another along one and the same axis; and at least one heater of a resistive type integrated in the first die and/or in the second die, having a first conduction terminal and a second conduction terminal configured to couple respective first and second conduction terminals of a signal generator for causing an electric current to flow, in use, between the first and second conduction terminals of the heater and generate heat by the Joule effect. It is possible to carry out calibration in temperature of the sensor element.

Abstract: An electroacoustic MEMS transducer, having a substrate of semiconductor material; a through cavity in the substrate; a back plate carried by the substrate through a plate anchoring structure, the back plate having a surface facing the through cavity; a fixed electrode, extending over the surface of the back plate; a membrane of conductive material, having a central portion facing the fixed electrode and a peripheral portion fixed to the surface of the back plate through a membrane anchoring structure; and a chamber between the membrane and the back plate, peripherally delimited by the membrane anchoring structure.

Abstract: A system and method for synchronizing two devices in communication with each other. When communication between the two devices is to be established, a synchronization process may be invoked. In an embodiment, a first device may initiate sending synchronization signals having rising edge and falling edge pairs. The second device may include a controller configured to receive the synchronization signals. However, noise may inhibit the ability of the controller to correctly receive and/or interpret the synchronization signals. Noise may cause detection components to falsely detect noise as a synchronization signal or may cause detection components to miss detection of an actual synchronization signal. A window generator may be used to generate comparison windows for the controller to detect synchronization signals.

Abstract: In manufacturing a lithium battery, a plasma deposition of a layer of LiPON is made on a structure that includes an anode contact zone and a cathode contact zone. Before making the deposition of layer of LiPON, a conductive portion is deposited to short the anode contact zone to the cathode contact zone. After the deposition of the layer of LiPON in completed, the conductive portion is cut to sever the short between the anode and cathode contact zones.

Abstract: An integrated circuit includes a high-voltage MOS (HV) transistor and a capacitor supported by a semiconductor substrate. A gate stack of the HV transistor includes a first insulating layer over the semiconductor layer and a gate electrode formed from a first polysilicon. The capacitor includes a first electrode made of the first polysilicon and a second electrode made of a second polysilicon and at least partly resting over the first electrode. A first polysilicon layer deposited over the semiconductor substrate is patterned to form the first polysilicon of the gate electrode and first electrode, respectively. A second polysilicon layer deposited over the semiconductor substrate is patterned to form the second polysilicon of the second electrode. Silicon oxide spacers laterally border the second electrode and the gate stack of the HV transistor. Silicon nitride spacers border the silicon oxide spacers.

Abstract: A triangular-voltage generator has an input terminal that receives a power supply voltage and an output terminal that supplies a triangular-wave voltage having a repetition period. An operational amplifier in an integrator configuration has a first input, a second input and an output coupled to the output terminal. The second input receives a reference voltage as a function of the power supply voltage. The first input is selectively and alternately connected to the input terminal during a first half-period of the repetition period and to a reference terminal during a second half-period of the repetition period.

Abstract: A circuit can be used in a speaker system. The circuit includes an amplifier with an output configured to be coupled to a speaker. An offset comparator has an input coupled the output of the amplifier and is configured to provide an offset control signal. A digital circuit has a first input coupled to an output of the offset comparator, a second input configured to receive an amplifier control signal, a third input configured to receive a play control signal, and an output configured to provide a forced mute signal that can be used to control the amplifier.

Abstract: A polyphase decimation FIR filter apparatus including a modulo integrator circuit configured to integrate input samples and to provide integrated input samples; and a polyphase FIR filter circuit configured to process the integrated input samples, the polyphase FIR filter circuit including a plurality of multiplier accumulator circuits, each configured to accumulate products of coefficients and respective integrated signal samples, wherein each of the multiplier accumulator circuits receives a subset of FIR filter coefficients, wherein the FIR filter coefficients are derived as the nth difference of original filter coefficients, where n is a number of integrators in the integrator circuit, and wherein the FIR filter circuit is configured to perform computation operations with modulo arithmetic.

Abstract: A method controls a power switch and senses a primary current through a transformer primary winding coupled to the power switch and deactivates the switch responsive to the sensed primary current reaching a current sensed reference. A demagnetization mode is initiated responsive to deactivating the power switch. During this mode a first capacitance is charged with a first charging current to generate the current sensed reference. The first charging current is based on a bias signal. A second capacitance is charged with a second charging current to generate the bias signal. The second charging current is based on a compensation signal. A third charging current generates a comparison signal, the third charging current based on the current sensed reference. The compensation signal is based on a difference between the comparison signal and an internal reference and the power switch activated based on a secondary current in a secondary transformer winding.

Abstract: In an HEMT device, a gate region is formed in a wafer having a channel layer, a barrier layer, and a passivation layer, overlying each other. Drain and source electrodes are formed in the wafer, on different sides of the gate region. A dielectric layer is formed over the gate region and over the passivation layer. Selective portions of the dielectric layer are removed by a plurality of etches so as to form one or more cavities between the gate region and the drain electrode. The one or more cavities have a plurality of steps at an increasing distance from the wafer moving from the gate region to the drain electrode. The cavity is then filled with conductive material to form a field plate coupled to the source electrode, extending over the gate region, and having a surface facing the wafer and having a plurality of steps.

Abstract: Satellite controller circuitry includes a connection (i.e. coaxial or single wire with ground), with a control unit receiving a data message and generating a response message as output, and transmitter circuitry transmitting the response message. The transmitter circuitry has a first transistor having a first conduction terminal coupled to the connection, a second conduction terminal coupled to ground, and a control terminal coupled to receive output from the control unit, a second transistor having a first conduction terminal coupled to the connection, a second conduction terminal coupled to ground, and a control terminal coupled to receive the output from the control unit. The first and second transistors are configured such that a second current flowing through the first conduction terminal of the second transistor is in a non-unity ratioed relationship, or in a unity ratioed relationship, with a first current flowing through the first conduction terminal of the first transistor.

Abstract: A first clock signal and second clock signal are generated by first and second clock circuits, respectively. A multiplexer selects between the first clock signal and second clock signal to produce a scan clock signal. A non-scan flip flop clocks a data input through to a data output in response to the second clock signal. A scan chain includes a scan flip flop configured to capture the data output from the non-scan flip flop in response to the scan clock signal. The logic state of the captured data in the scan flip flop of the scan chain is indicative of whether the second clock circuit has a stuck-at fault condition (for example, with respect to any one or more included buffer circuits).

Abstract: Cryptographic circuitry masks sensitive data values. The masking includes extracting unique combinations of random mask values from one or more sets of random mask values. Each sensitive data value is masked using a respective unique combination. The unique combinations have a combination class greater than or equal to a determined integer corresponding to a protection-level against side-channel attacks, and a number of unique combinations greater than or equal to a number of the sensitive data values. A number of random mask values in the one or more sets of random mask values is based on the number of unique combinations and the class of the plurality of unique combinations.

Abstract: A memory sense amplifier is configurable on command between a current-sensing mode and a voltage-sensing mode. The sense amplifier is intended, in its current-sensing configuration, to read a datum stored in a memory cell connected to the amplifier, and is intended, in its voltage-sensing configuration, to read a datum stored in a bit-line latch connected to the amplifier.