Abstract: A method for activation of a payment card includes accessing a remote computer server of a card issuer to input card activation information, storing a unique code in the payment card having a contactless readable interface and in the remote computer server, the unique code corresponding to the payment card, and reading the unique code by a user terminal having a corresponding contactless interface, the user interface configured to connect over a communication network to access messages directed to the cardholder. The method also includes sending the unique code from the user terminal to the remote computer server, and upon verification of the unique code at the remote computer server, generating and sending an activation code to the user terminal and supplying access to an activation code input mask corresponding to the payment card.

Abstract: A semiconductor substrate includes a doped region. A premetallization dielectric layer extends over the semiconductor substrate. A first metallization layer is disposed on a top surface of the premetallization dielectric layer. A metal contact extends from the first metallization layer to the doped region. The premetallization dielectric layer includes sub-layers, and the first metal contact is formed by sub-contacts, each sub-contact formed in one of the sub-layers. Each first sub-contact has a width and a length, wherein the lengths of the sub-contacts forming the metal contact are all different from each other.

Abstract: An electronic component, such as an integrated circuit, includes at least one circuit having coupled therewith electrical connections including a lead frame of electrically conductive material. The lead frame is produced by an additive process of conductive material, e.g., by 3D printing, by forming a three-dimensional structure of leads having overlapping surfaces with a gap therebetween.

Abstract: A method of controlling a current flowing through a load including the steps of: applying a first transfer function representative of the load to a first voltage to obtain a second voltage; applying the second voltage to a first terminal of a circuit for generating the current; sampling a third voltage between first and second terminals of the load; comparing the third voltage with the second voltage; and determining the current to be supplied to the load according to the result of the comparison.

Abstract: A circuit generates a number of oscillations. The circuit includes a first branch with at least one delay line introducing symmetrical delays on rising edges and on falling edges and at least one asymmetrical delay element introducing different delays on rising edges and on falling edges. The circuit further includes a second branch looped back on the first branch and including at least one delay line introducing symmetrical delays on rising edges and on falling edges.

Abstract: A low voltage to high voltage (LV2HV) conversion circuit has an input configured to receive an input signal (at a relatively low voltage) and an output configured to generate an output signal (at a relatively high voltage). The LV2HV conversion circuit includes a voltage to current conversion circuit referenced to the relatively low voltage and configured to convert a voltage of the input signal to a first current, wherein a magnitude of the first current is dependent on said voltage of the input signal and a gain setting value. A current mirroring circuit mirrors the first current and outputs a second current. A current to voltage conversion circuit converts the second current to a voltage of the output signal. The current mirroring circuit and current to voltage conversion circuit are referenced to the relatively high voltage.

Abstract: The method for processing signals originating for example from several proximity sensors for the recognition of a movement of an object, comprises first respective samplings of the said signals delivered by the sensors so as to obtain a first set of first date-stamped samples, the generation, from the first set of first date-stamped samples, of new sampling times comprising a start of movement time, an end of movement time, and times regularly spaced between the start of movement time and the end of movement time, a re-sampling of the signal delivered by each sensor between the start of movement time and the end of movement time at the said new sampling times using the first samples, in such a manner as to generate a second set of second date-stamped samples, and a processing of the said second set of date-stamped samples by a movement recognition algorithm.

Abstract: An integrated electronic detector operates to detecting a variation in potential on an input terminal. The detector includes a MOS transistor having a drain forming an output. Variation in drain current is representative of the variation in potential. A bipolar transistor has a base forming the input terminal and a collector electrically connected to the gate of the MOS transistor. The detector has a first configuration in which the bipolar transistor is conducting and the MOS transistor is turned off. The detector has a second configuration in which the bipolar transistor is turned off and the MOS transistor is in a sub-threshold operation. Transition of the detector from the first configuration to the second configuration occurs in response to the variation in potential.

Abstract: A Schmitt trigger circuit having an input coupled to a current summing junction. A trickle current source generates a trickle current applied to the current summing junction. A bandgap current source generates a bandgap current applied to the current summing junction (wherein the bandgap current is fixed when a supply voltage exceeds a threshold). A variable current source generates a variable current applied to the current summing junction (wherein the variable current varies dependent on the supply voltage). At the current summing junction, the variable current is offset against the trickle and bandgap currents with respect to generating a voltage that is sensed at the Schmitt trigger circuit input.

Abstract: A semiconductor chip includes a plurality of superposed semiconductor levels. The semiconductor levels include a plurality of elementary circuits coupled to a common input node. Sensing circuits are coupled to elementary elements of different levels. The outputs of the sensing circuits are used to generate a number, which serves as an identification number of the semiconductor chip.

Abstract: Described herein is a modular system for a system for electrically stimulating a biological tissue, which includes: a first device (32) including a number of electrodes (45), which in use contact the biological tissue; and a second device (34) including an electronic control circuit (55), which transmits stimulation signals. The second device may be operatively coupled in a releasable way to the first device, in such a way that the first device receives the stimulation signals transmitted by the second device.

Abstract: A driver circuit is configured to pass a current. The circuit includes a first transistor connected in series with the laser diode, and configured to regulate the current. A voltage regulator is configured to provide an input to a gate of the first transistor so as to regulate the current in dependence upon a regulator input and a feedback input at the voltage regulator.

Abstract: A non-volatile memory cell includes a selection transistor having an insulated selection gate embedded in a semiconducting substrate region. A semiconducting source region contacts a lower part of the insulated selection gate. A state transistor includes a floating gate having an insulated part embedded in the substrate region above an upper part of the insulated selection gate, a semiconducting drain region, and a control gate insulated from the floating gate and located partially above the floating gate. The source region, the drain region, the substrate region, and the control gate are individually polarizable.

Abstract: An embodiment of a video-surveillance method comprising: activating a video camera for acquiring, for a surveillance system comprising the aforesaid video camera, a digital video sequence of images of a scene to be surveyed, detecting given events and transmitting to a remote center images of the aforesaid digital video sequence of images acquired according to the result of the aforesaid operation of event detection. An embodiment includes: executing an operation of extraction of key frames on the aforesaid digital video sequence of images for composing a visual storyboard, detecting given events on the basis of data supplied by one or more event sensors for generating an event signal, controlling operating states assumed by the aforesaid key-frame-extraction operation as a function of the values assumed by the aforesaid event signal, and transmitting the aforesaid visual storyboard to the aforesaid remote center.

Abstract: An electronic device includes a single-photon avalanche diode (SPAD) array and readout circuitry coupled thereto. The readout circuitry generates a depth map having a first resolution, and a signal count map having a second resolution greater than the first resolution. The depth map corresponds to distance observations to an object. The signal count map corresponds to intensity observation sets of the object, with each intensity observation set including intensity observations corresponding to a respective distance observation in the depth map. An upscaling processor is coupled to the readout circuitry to calculate upscaling factors for each intensity observation set so that each distance observation has respective upscaling factors associated therewith. The depth map is then upscaled from the first resolution to the second resolution based on the respective upscaling factors.

Abstract: A method for forming fins includes growing a SiGe layer and a silicon layer over a surface of a bulk Si substrate, patterning fin structures from the silicon layer and the SiGe layer and filling between the fin structures with a dielectric fill. Trenches are formed to expose end portions of the fin structures. A first region of the fin structures is blocked off. The SiGe layer of the fin structures of a second region is removed by selectively etching the fin structures from the end portions to form voids, which are filled with dielectric material. The silicon layer of the fin structures is exposed. The SiGe layer in the first region is thermally oxidized to drive Ge into the silicon layer to form SiGe fins on an oxide layer in the first region and silicon fins on the dielectric material in the second region.

Abstract: A switching regulator includes circuitry for reducing conductive emissions caused when the regulators switch from one transistor switch to the other. The switching regulator includes at least one switch with a diode connected from the source to the drain of at least one of the transistor switches. When the regulator switches from one transistor switch to the other, the circuitry initiates turning on the switch with a relatively small, current-limited signal, waits for the diode across the recently turned off switch to complete reverse recovery, and then quickly turns the new switch fully on.

Abstract: A circuit with Miller compensation effect includes a first stage and a second stage, with a first terminal for receiving a bias current and a second terminal that can be coupled to ground, wherein the first stage includes a differential stage coupled via a coupling line to the second stage. The second stage includes a transistor with a Miller compensation network, which is set between the first terminal of the second stage and the control terminal of the aforesaid transistor. A compensation-control transistor, which is coupled to the second terminal of said differential stage, can be activated for coupling the aforesaid second terminal to ground, the compensation-control transistor having its control terminal coupled to the aforesaid coupling line between the first and second stages.

Abstract: An integrated circuit includes a power supply terminal, a reference terminal, and a signal terminal. A first protection device is coupled between the signal terminal and the power supply terminal, the first protection device including a first MOS transistor. A second protection device is coupled between the signal terminal and the reference terminal, the second protection device including a second MOS transistor. Gates of the MOS transistors are directly or indirectly coupled to the reference terminal. Substrates of the MOS transistors are coupled to the reference terminal via a common resistor.

Abstract: The present invention relates to a memory device comprising a first electrode (27), a second electrode (28) and an active portion that can change conductive state, positioned between a first face of the first electrode (27) and a first face of the second electrode (28). The first electrode (27) comprises an upper portion forming the first face of the first electrode (27). At least one out of the upper portion and the active portion that can change conductive state comprises a porous layer (15).