Patents Assigned to STMicroelectronics AS
  • Publication number: 20180174964
    Abstract: A pad forms a connection terminal suitable for coupling circuit elements integrated in a chip to circuits outside the chip itself. At least one inductor is provided for use in the reception/transmission of electromagnetic waves or for supplying the chip with power or both. The connection pad and inductor are combined in a structure which reduces overall occupied area. A magnetic containment structure surrounds the structure to contain a magnetic field of the inductor.
    Type: Application
    Filed: February 9, 2018
    Publication date: June 21, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Publication number: 20180173336
    Abstract: Disclosed herein is a touch screen controller for controlling touch sensing in a touch screen display, the touch screen display having a display layer controlled as a function of horizontal sync and vertical sync signals and a capacitive touch array comprised of drive lines and sense lines. The touch screen controller includes a driver and control circuitry. The control circuitry is configured to cause the driver to generate a driving signal on the drive lines during assertion of the horizontal sync signal, and cause the driver to generate the driving signal on the drive lines during assertion of the vertical sync signal. Analog touch sensing circuitry is configured to generate analog touch data as a function of signals on the sense lines resulting from generation of the drive signal on the drive lines.
    Type: Application
    Filed: December 16, 2016
    Publication date: June 21, 2018
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Baranidharan Karuppusamy, Chaochao Zhang, Kusuma Adi Ningrat
  • Publication number: 20180173357
    Abstract: The present disclosure provides a capacitive sensing structure for detecting a force touch in a touchscreen application. Performance uniformity of the force touch sensor is improved by providing a capacitive force touch structure having dot-pattern sensing electrodes of varying thickness, wherein the variation in electrode thickness corresponds to a relative displacement potential of portions of the sensing electrode. This variation in thickness improves performance uniformity of the force sensor by compensating for the displacement potential (i.e., flexibility) of the sensing electrodes so that a force touch applied to the touch surface is measured consistently regardless of the location of the force touch on the touch surface.
    Type: Application
    Filed: December 20, 2016
    Publication date: June 21, 2018
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Dylan Park, John Serge Georges Nankoo
  • Patent number: 10003174
    Abstract: An optical emitting circuit includes an array of M optical sources distributed in N groups, where N is lower than M. A controller is configured to generate N periodic square wave control signals that are successively mutually phase shifted by pi/N and that all have the same period, and to cyclically activate/deactivate all the optical sources of the N groups using the control signals. The optical emitting circuit is configured so that each group is activated when a corresponding control signal is in its first state and deactivated when the corresponding control signal is in its second state. The number of optical sources in each group and the order of the groups in the sequence of activations/deactivations are chosen so as to generate an optical signal having an amplitude that sinusoidally varies in steps.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: June 19, 2018
    Assignee: STMICROELECTRONICS (ALPS) SAS
    Inventor: Xavier Branca
  • Patent number: 10001829
    Abstract: An electronic device includes an appended module coupled to a core having a standby state comprising a first power supply circuit, a first clock and a circuit that recognizes multiple vocal commands timed by the first clock. The appended module includes a second power supply circuit independent of the first power supply circuit, a second clock independent of the first clock and having a frequency lower than that of the first clock, digital unit timed by the second clock including a sound capture circuit that delivers a processed sound signal, and a processing unit configured in order, in the presence of a parameter of the processed sound signal greater than a threshold, to analyze the content of the processed sound signal and to deliver, when the content of the sound signal comprises a reference pattern, an activating signal to the core that can take it out of its standby state.
    Type: Grant
    Filed: September 12, 2015
    Date of Patent: June 19, 2018
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Jonathan Cottinet, Jean Claude Bini
  • Patent number: 10001453
    Abstract: An integrated electronic device 1 for detecting at least one parameter related to humidity and/or presence of water and/or acidity/basicity of an environment surrounding the device is described. Such device 1 comprises a separation layer 14 from the surrounding environment, comprising at least one portion of insulating material 14, and further comprises a first conductive member 11 and a second conductive member 12, made of an electrically conductive material, arranged inside the separation layer 14, with respect to the surrounding environment, and separated from the surrounding environment by the separation layer 14. The device 1 also comprises a measurement module 15, having two measurement terminals 151, 152, electrically connected with the first 11 and the second 12 conductive members, respectively; the measurement module 15 is configured to provide an electric potential difference between the first 11 and the second 12 conductive members.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: June 19, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alberto Pagani, Bruno Murari
  • Patent number: 10002990
    Abstract: A light-emitting device may include a semiconductor body having a first conductivity type, with a front side and a back side. The light-emitting device may also include a porous-silicon region which extends in the semiconductor body at the front side, and a cathode region in direct lateral contact with the porous-silicon region. The light-emitting device may further include a barrier region of electrically insulating material, which extends in direct contact with the cathode region at the bottom side of the cathode region so that, in use, an electric current flows in the semiconductor body through lateral portions of the cathode region.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: June 19, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Morelli, Fabrizio Fausto Renzo Toia, Giuseppe Barillaro, Marco Sambi
  • Patent number: 10002906
    Abstract: The array of diodes comprises a matrix plane of diodes arranged according to columns in a first direction and according to rows in a second direction orthogonal to the first direction. The said diodes comprise a cathode region of a first type of conductivity and an anode region of a second type of conductivity, the said cathode and anode regions being superposed and disposed on an insulating layer situated on top of a semiconductor substrate.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: June 19, 2018
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Francesco La Rosa, Stephan Niel, Arnaud Regnier
  • Patent number: 10003956
    Abstract: A method is provided for performing a management of a multi-subscription SIM module. The multi-subscription SIM module includes at least one memory adapted to store at least a first and a second profile associated with a respective first and a second mobile network operator. The memory includes a volatile portion. The operation of storing includes installing or updating profiles by downloading one or more downloaded profiles from a remote host. The management includes selecting one or more enabled profiles including an application to be executed and allocating a partition of the volatile portion of the memory to the one or more enabled profile.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: June 19, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Amedeo Veneroso
  • Patent number: 10002938
    Abstract: Energy bands of a thin film containing molecular clusters are tuned by controlling the size and the charge of the clusters during thin film deposition. Using atomic layer deposition, an ionic cluster film is formed in the gate region of a nanometer-scale transistor to adjust the threshold voltage, and a neutral cluster film is formed in the source and drain regions to adjust contact resistance. A work function semiconductor material such as a silver bromide or a lanthanum oxide is deposited so as to include clusters of different sizes such as dimers, trimers, and tetramers, formed from isolated monomers. A type of Atomic Layer Deposition system is used to deposit on semiconductor wafers molecular clusters to form thin film junctions having selected energy gaps. A beam of ions contains different ionic clusters which are then selected for deposition by passing the beam through a filter in which different apertures select clusters based on size and orientation.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: June 19, 2018
    Assignee: STMICROELECTRONICS, INC.
    Inventor: John H. Zhang
  • Patent number: 10002672
    Abstract: A memory device includes a memory array with memory cells arranged in rows and columns and with word lines and bit lines. A dummy structure includes a dummy row of dummy cells and a dummy word line. A first pre-charging stage biases a word line of the memory array. An output stage includes a plurality of sense amplifiers. Each sense amplifier generates a corresponding output signal representing a datum stored in a corresponding memory cell pre-charged by the first pre-charging stage. A second pre-charging stage biases the dummy word line simultaneously with the word line biased by the first pre-charging stage. The output stage includes an enable stage, which detects a state of complete pre-charging of an intermediate dummy cell.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: June 19, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giovanni Campardo, Salvatore Polizzi
  • Patent number: 10001530
    Abstract: A method reading a magnetic-field sensor provided with at least one first magnetoresistive element envisages generation of an output signal, indicative of a magnetic field, as a function of a detection signal supplied by the magnetic-field sensor. The reading method envisages: determining an offset signal present in the output signal; generating at least one compensation quantity as a function of the offset signal; and feeding back the compensation quantity at input to the reading stage so as to apply a corrective factor at input to the reading stage as a function of the compensation quantity, such as to reduce the value of the offset signal below a given threshold.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: June 19, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Fabio Bottinelli, Carlo Alberto Romani, Carmela Marchese
  • Publication number: 20180166659
    Abstract: An electronic device includes a flexible conductive member having a first length, and a battery substrate having a second length shorter or equal than the first length. There is an active battery on the battery substrate. An adhesive layer couples the active battery and the battery substrate to the flexible conductive member such that the active battery and the flexible conductive member are electrically coupled, and such that the flexible substrate encapsulates the active battery and the upper portion of the battery substrate without an intervening layer. The flexible conductive member includes an insulating flexible base layer having a conductive via formed therein. Upper and lower metallized layers are formed on the insulating flexible base layer and are electrically coupled to one another by the conductive via.
    Type: Application
    Filed: February 9, 2018
    Publication date: June 14, 2018
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Alexis Durand, Franck Dosseul
  • Publication number: 20180166477
    Abstract: Disclosed herein is an electronic device including an integrated circuit substrate, with a pixel array area within the integrated circuit substrate. A first deep trench isolation structure is formed in the integrated circuit substrate about a perimeter of the pixel array area. First, second, third, and fourth pixels are within the pixel array area and spaced apart from one another. A storage capacitor area is within the integrated circuit substrate and interior to the first deep trench isolation structure. A second deep trench isolation structure is formed in the integrated circuit substrate about a perimeter of the storage capacitor area. The second deep trench isolation structure may serve to electrically isolate the storage capacitor area from the first, second, third, and fourth pixels.
    Type: Application
    Filed: December 12, 2016
    Publication date: June 14, 2018
    Applicant: STMicroelectronics (Research & Development) Limited
    Inventor: Jeffrey M. Raynor
  • Publication number: 20180167567
    Abstract: A photodiode produces photogenerated charges in response to exposure to light. An integration period collects the photogenerated charges. Collected photogenerated charges in excess of an overflow threshold are passed to an overflow sense node. Remaining collected photogenerated charges are passed to a sense node. A first signal representing the overflow photogenerated charges is read from the overflow sense node. A second signal representing the remaining photogenerated charges is read from the sense node.
    Type: Application
    Filed: December 13, 2016
    Publication date: June 14, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Pierre Emmanuel Marie Malinge, Frederic Lalanne
  • Publication number: 20180166128
    Abstract: A memory array has word lines and bit lines. A row decoder is operable to decode a row address and select a corresponding word line. A read-write clock generator is operable to generate a hold clock signal. An address clock generator receives a read address, a write address, a dual port mode control signal, a read chip select signal, and a write chip select signal. When operating in dual port mode, and when operating in a read mode, the address clock generator applies a read delay to the read address and outputs the read address, as delayed, to the row pre-decoder as the address in response to the hold clock signal.
    Type: Application
    Filed: December 12, 2016
    Publication date: June 14, 2018
    Applicant: STMicroelectronics International N.V.
    Inventors: Harsh Rawat, Abhishek Pathak
  • Publication number: 20180166127
    Abstract: A memory circuit includes a wordline, memory cells connected to the wordline and a wordline driver circuit. The memory circuit further includes a read assist circuit including an n-channel pull-down transistor having a source-drain path connected between the wordline and a ground node. A bias circuit applies a biasing voltage to the gate terminal of the n-channel pull-down transistor that is modulated responsive to process, voltage and temperature conditions in order to provide controlled word line underdrive.
    Type: Application
    Filed: December 12, 2016
    Publication date: June 14, 2018
    Applicant: STMicroelectronics International N.V.
    Inventor: Abhishek Pathak
  • Publication number: 20180166469
    Abstract: A transistor includes an active region supported by a substrate and having a source region, a channel region and a drain region. A gate stack extends over the channel region and a first sidewall surrounds the gate stack. A raised source region and a raised drain region are provided over the source and drain regions, respectively, of the active region adjacent the first sidewall. A second sidewall peripherally surrounds each of the raised source region and raised drain region. The second sidewall extends above a top surface of the raised source region and raised drain region to define regions laterally delimited by the first and second sidewalls. A conductive material fills the regions to form a source contact and a drain contact to the raised source region and raised drain region, respectively.
    Type: Application
    Filed: February 7, 2018
    Publication date: June 14, 2018
    Applicant: STMicroelectronics, Inc.
    Inventor: John Hongguang Zhang
  • Publication number: 20180166318
    Abstract: A semiconductor wafer suitable for fabricating an SOI substrate is provided by: producing a first layer of polycrystalline semiconductor on a top side of a semiconductor carrier; then forming an interface zone on a top side of the first layer, wherein the interface zone has a structure different from a crystal structure of the first layer; and then producing a second layer of polycrystalline semiconductor on the interface zone.
    Type: Application
    Filed: February 9, 2018
    Publication date: June 14, 2018
    Applicant: STMicroelectronics SA
    Inventors: Didier Dutartre, Herve Jaouen
  • Publication number: 20180167016
    Abstract: A system in package encloses a sensor and motor driver circuit. In an implementation, the sensor is an integrated circuit micro-electro-mechanical-systems (MEMS) sensor and the driver circuit is a motor driver circuit. Non-motor winding data information is sensed by the MEMS sensor and processed for the purpose of characterizing known fault patterns for motors; characterizing normal operation of the motor; and evaluating continued operation of the motor to detect abnormal motor behavior and instances of motor fault. The motor is driven using PWM control and the information output by the MEMS sensor is sampled at sampling times having a fixed timing relationship relative to the PWM control signals.
    Type: Application
    Filed: February 9, 2017
    Publication date: June 14, 2018
    Applicant: STMicroelectronics, Inc.
    Inventors: Cheng Peng, Robert Krysiak