Abstract: An electronic device includes a support and a component in the form of an integrated circuit chip having a rear face mounted above a front face of the support and a front face opposite its rear face. A block is provided for at least partially encapsulating the component above the front face of the support. The device also includes at least one thermal dissipation member having a flexible sheet having at least two portions folded onto one another while forming at least one fold between them, these portions facing one another at least partly.

Abstract: The thinning of a semiconductor substrate of an integrated circuit from a back face is detected using the measurement of a physical quantity representative of the resistance between the ends of two electrically-conducting contacts situated at an interface between an insulating region and an underlying substrate region. The two electrically-conducting contacts extend through the insulating region to reach the underlying substrate region.

Abstract: A phase or frequency locked-loop circuit includes an oscillator configured to generate an output clock signal having a frequency set by an oscillator control signal. A modulator circuit receives a first signal and a second signal and is configured to generate a control signal having a value modulated in response to the first and second signals. A filter circuit generates the oscillator control signal by filtering the control signal. A delta-sigma modulator circuit operates to modulate the second signal in response to a modulation profile. As a result, the output clock signal is a spread spectrum clock signal.

Abstract: A control circuit controls the operation of a brushless DC (BLDC) sensorless motor having a first terminal connected to a first winding, a second terminal connected to a second winding and a third terminal connected to a third winding. A driver circuit applies drive signals to the first and second terminals and places the third terminal in a high-impedance state. The drive signals include first drive signals at a first current amplitude and second drive signals at a second current amplitude different from the first current amplitude. A differencing circuit senses a first mutual inductance voltage at the third terminal in response to the first drive signals and senses a second mutual inductance voltage at the third terminal in response to the second drive signals. The differencing circuit further determines a difference between the first and second mutual inductance voltages and produces a difference signal that is used for zero-crossing detection and rotor position sensing.

Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.

Abstract: A power transistor supplying power to a load is coupled to a current limiter circuit including a differential amplifier that operates to detect a difference between a sense voltage, indicative of a load current, and a voltage reference. A control terminal of the power transistor is driven by a first output of the differential amplifier as a function of the detected difference. A voltage clamp circuit coupled to an input terminal generates a floating ground. A short-circuit protection circuit coupled to the floating ground and interposed between a second output of the differential amplifier and the control terminal of the power transistor provides a short-circuit protection for the first output of the differential amplifier. A reaction time circuit is coupled between the first and second outputs of the differential amplifier and a source terminal of the power transistor to limit a short-circuit current at the source terminal.

Abstract: A touch screen controller includes a current conveyor having first and second inputs and first and second outputs, the first input being coupled to a self capacitance sense line. A driver is coupled to the second input and periodically drives the second input between high and low voltages. The current conveyor forces its first input to a same voltage as its second input, and replicates a current flowing into its first input at its first and second outputs, such that when the driver drives the second input to the high voltage, a first current flows from the first input into the self capacitance sense line, and when the driver drives the second input to the low voltage, a second current flows from the self capacitance sense line into the first input, and the current conveyor replicates the second current to its first and second outputs.

Abstract: An electrostatically actuated oscillating structure includes a first stator subregion, a second stator subregion, a first rotor subregion and a second rotor subregion. Torsional elastic elements mounted to the first and second rotor subregions define an axis of rotation. A mobile element is coupled to the torsional elastic elements. The stator subregions are electrostatically coupled to respective regions of actuation on the mobile element. The stator subregions exhibit an element of structural asymmetry such that the electrostatic coupling surface between the first stator subregion and the first actuation region differs from the electrostatic coupling surface between the second stator subregion and the second actuation region.

Abstract: An image sensor includes a first semiconductor substrate supporting a photodiode and a source region of a transfer transistor. A first interconnect level on the first semiconductor substrate includes an interconnection dielectric layer on the first semiconductor substrate and interconnect line layers over the interconnection dielectric layer. A second semiconductor substrate that supports readout transistors is mounted over the first semiconductor substrate and first interconnect level. The first interconnect level further includes a first doped semiconductor material electrical connection in physical and electrical contact with the source region in the first semiconductor substrate that passes through the interconnection dielectric layer and the interconnect line layers to electrically connect to at least one transistor of the readout transistors.

Abstract: An optical detection sensor functions as a proximity detection sensor that includes an optical system and a selectively transmissive structure. Electromagnetic radiation such as laser light can be emitted through a transmissive portion of the selectively transmissive structure. A reflected beam can be detected to determine the presence of an object. The sensor is formed by encapsulating the transmissive structure in a first encapsulant body and encapsulating the optical system in a second encapsulant body. The first and second encapsulant bodies are then joined together. In a wafer scale assembling the structure resulting from the joined encapsulant bodies is diced to form optical detection sensors.

Abstract: A method of making a semiconductor device includes forming a fin mask layer on a semiconductor layer, forming a dummy gate over the fin mask layer, and forming source and drain regions on opposite sides of the dummy gate. The dummy gate is removed and the underlying fin mask layer is used to define a plurality of fins in the semiconductor layer. A gate is formed over the plurality of fins.

Abstract: An integrated detection structure has a first inertial mass and a second inertial mass, each of which is elastically anchored to a substrate and has a linear movement along a first horizontal axis, a first detection movement of rotation about a first axis of rotation parallel to a second horizontal axis and a second detection movement of translation along the second horizontal axis; driving electrodes cause linear movement of the inertial masses, in opposite directions of the first horizontal axis; a pair of flexural resonator elements and a pair of torsional resonator elements are elastically coupled to the inertial masses, the torsional resonator elements having a resonant movement of rotation about a second axis of rotation and a third axis of rotation, parallel to one another and to the first axis of rotation.

Abstract: A method is for treating a doped gallium nitride substrate of a first conductivity type, having dislocations emerging on the side of at least one of its surfaces. The method may include: a) forming, where each dislocation emerges, a recess extending into the substrate from the at least one surface; and b) filling the recesses with doped gallium nitride of the second conductivity type.

Abstract: An access point (AP) contends for a medium during a contention period in order to obtain exclusive control of the medium for a certain time period that may include one or more transmission opportunities. The AP and client stations (STAs) communicate during the time period using orthogonal frequency division multiple access (OFDMA) techniques with scheduled use (i.e., allocation) of sub-channels of the medium. The AP controls this scheduling for down-link and up-link communications by sending control signaling to inform the STAs of the resource allocation schedule which specifies STAs involved in the OFDMA communications along with the sub-channel identification bandwidth allocated to each STA. The control signaling may be a combination of physical layer (PHY) and medium access control layer (MAC) communicated information.

Abstract: A method that is for operating a serial protocol interface includes a communication device that is configured to exchange data over a communication link by sending output data on the communication link, and receiving input data on the communication link. The input data is synchronous with a clock signal generated at the communication device and propagated over the communication link. The method also includes initializing operation by sending the output data on the communication link at a first data rate, detecting a signal transition in the input data received on the communication link, and exchanging data over the communication link at a second data rate when the signal transition is detected, the second data rate being higher than the first data, with the exchanging of data at the second data rate synchronized as a function of the signal transition.

Abstract: An integrated circuit is produced on a bulk semiconductor substrate in a given CMOS technology and includes a semiconductor device for protection against electrostatic discharges. The semiconductor device has a doublet of floating-gate, thyristors coupled in parallel and head-to-tail. Each thyristor has a pair of electrode regions. The two thyristors respectively have two separate gates and a common semiconductor gate region. The product of the current gains of the two transistors of each thyristor is greater than 1. Each electrode region of at least one of the thyristors has a dimension, measured perpendicularly to the spacing direction of the two electrodes of the corresponding pair, which is adjusted so as to impart to the thyristor an intrinsic triggering voltage less than the breakdown voltage of a transistor to be protected, and produced in the CMOS technology.

Abstract: An electronic device includes a memory having memory locations being subject to transient faults and permanent faults, and a fault detection circuit coupled to the memory. The fault detection circuit is configured to read the memory locations at a first time, and determine a first fault count and fault map signature including the transient and permanent faults at the first time based upon reading the plurality of memory locations, and to store the first fault count and fault map signature. The fault detection circuit is configured to read the memory locations at a second time and determine a second fault count and fault map signature including the transient and permanent faults at the second time based upon reading the memory locations, and compare the stored first fault count and fault map signature with the second fault count and fault map signature to determine a permanent fault count.

Abstract: A charge sensing circuit generates a voltage in a sensing period that is indicative of sensed charge. The generated voltages are accumulated by an accumulator circuit over a number of sensing periods. A noise detection circuit senses when the voltage generated by the charge sensing circuit is outside of a boundary and generates a detection signal in response thereto. A control circuit, in response to the detection signal, controls the accumulator circuit to block accumulation of the voltages generated by the charge sensing circuit during at least the sensing period in which the detection signal is generated. An analog-to-digital converter circuit then converts an accumulated output voltage from the accumulator circuit to a digital value at the end of an accumulation time period that includes the sensing periods. The end of the accumulation time period is delayed by at least one sensing period in response to the detection signal.

Abstract: Contactless power transfer from a transmitter to a receiver is managed. A magnetic field is generated by the transmitter from a command at a control frequency for a switching resonant circuit. The receiver communicates information to the transmitter through modulation of the magnetic field. The modulation is detected by the transmitter so as to extract the information. An adjustment of the control frequency is then made according to the received information. The modulation detection involves detecting variations in the control frequency.

Abstract: A thermal control process for an electronic power device including a multi-junction integrated circuit may include defining a first and at least one second groups of junctions, with each group including one first and at least one second junctions, and associating a thermal detector with each group. A first group control may be executed which detects group electric signals representative of the temperature detected by the thermal detectors, processes the group electric signals with reference to a group critical thermal event, identifies a critical group when the corresponding group electric signal detects the critical group thermal event, and generates group deactivating signals suitable for selectively deactivating the first and the at least one second junctions of the identified critical group with respect to the remaining junctions of the integrated circuit.