Abstract: According to one mode of implementation it is proposed to automatically accelerate the write operation by deleting on the basis of the values of the data to be written and optionally on the basis of the values of the data present in the memory the erasure step or the programming step, so doing while optionally using a conventional write command. When the memory is equipped with an error-correcting code based on a Hamming code, a property of the latter makes it possible readily to implement this possible acceleration of the cycles of writings within the memory. This property is that according to which when all the bits of the bytes of a digital word grouping together n bytes are equal to zero, the check bits associated with these bytes are also all equal to zero.

Abstract: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.

Abstract: A spectral filter is manufactured using a process wherein a first rectangular bar is formed within a first layer made of a first material, said first rectangular bar being made of a second material having a different optical index. The process further includes, in a second layer over the first layer, a second rectangular bar made of the second material. The second rectangular bar is positioned in contact with the first rectangular bar. The second layer is also made of the first material.

Abstract: An embodiment circuit includes a first voltage divider coupled between a first voltage level and a ground potential. The circuit further includes an error amplifier having a first input terminal coupled to a node between a first resistive element and a second resistive element of the first voltage divider. The circuit further includes a second voltage divider coupled between a second voltage level and a reference voltage, wherein a second input terminal of the error amplifier is coupled to a node between a third resistive element and a fourth resistive element of the second voltage divider, and wherein an output voltage of the error amplifier is configured to control a potential difference between the first voltage level and the second voltage level.

Abstract: An integrated current sensor device includes a supporting structure of conductive material, arranged within a package, and an integrated circuit die including a first and second magnetic-field sensor elements that are arranged along a sensor axis. An electronic circuit operatively coupled to the first and second magnetic-field sensor elements performs a differential detection of electric current. The supporting structure defines a current path for the electric current. The current path includes: a first path portion extending at the first magnetic-field sensor element; a second path portion extending at the second magnetic-field sensor element; and a third path portion that connects the first and second path portions. The first path portion and the second path portion are arranged on opposite sides of the sensor axis, and the third path portion crosses the sensor axis along a transverse axis.

Abstract: A micro-electro-mechanical (MEMS) device is formed in a first wafer overlying and bonded to a second wafer. The first wafer includes a fixed part, a movable part, and elastic elements that elastically couple the movable part and the fixed part. The movable part further carries actuation elements configured to control a relative movement, such as a rotation, of the movable part with respect to the fixed part. The second wafer is bonded to the first wafer through projections extending from the first wafer. The projections may, for example, be formed by selectively removing part of a semiconductor layer. A composite wafer formed by the first and second wafers is cut to form many MEMS devices.

Abstract: In order to verify the authenticity of a product associated with a host device, the product contains, in segments of a non-volatile memory, several different functions stored in ciphered fashion. The host device sends a control signal for selecting and activating one of those ciphered functions. The product then deciphers and executes the function. The result of the function execution is then communicated back to host device when a decision on product authenticity is made.

Abstract: A MEMS device includes a fixed structure and suspended structure including an internal structure and a first arm and a second arm. Each arm has a first end fixed to the fixed structure and a second end fixed to the internal structure. The ends are angularly arranged at a distance apart. Piezoelectric actuators mounted to the arms are driven so as to cause deformation of the arm and produce a rotation of the internal structure. In a resting condition, each of the first and second arms has a respective elongated portion with a respective concavity. The internal structure extends in part within the concavities of the elongated portions of the first and second arms.

Abstract: The amount of power being output to the load is sensed by sampling the frequency of the pulse width modulation signal that is controlling the switch that is providing the power to the load. If the pulse width modulation signal has a high frequency, then it will be providing higher power to the load. As the power drawn by the load decreases, the frequency of the pulse width modulation power supply signal will decrease. By sensing and periodically sampling the frequency of the pulse width modulation signal that is providing power, the demand of the load can be quickly and accurately determined. As the power demand of the load decreases, the peak current that the power supply switch can provide also decreases. The permitted peak current dynamically changes to adapt to the power drawn by the load.

Abstract: The present disclosure relates to an image sensor including: a plurality of pixels, each including a first photodiode coupled to a first capacitive charge storage node by a first transistor, and a second photodiode coupled to a second capacitive charge storage node by a second transistor; and a control circuit configured so as to, during a phase of acquisition of a value representative of the illumination level of a pixel: acquire a first output value representative of the illumination level received by the first photodiode during a first uninterrupted integration period; and acquire a second output value representative of the illumination level received by the second photodiode during a second integration period divided into a plurality of separate sub-periods.

Abstract: A ringing peak detector module detects a ringing at the output of an inductive load driver including a bridge circuit containing high side and low side switches. A ringing peak detector receives differential feedback signals representative of the drain-source voltage of the low-side switch and detects a ringing peak of an oscillation of a current/voltage on the inductive load. A module compares said detected ringing peak with a maximum value and controls said driver by an error signal calculated as a function of the difference between said peak value and maximum value. The ringing peak detector module includes an input buffer module upstream of said peak detector circuit that shifts the differential feedback signals so a common mode of these signals is centered at a half-dynamic level of a supply voltage to provide correspondingly shifted voltages forming a shifted differential output corresponding to a steady state of the differential feedback signals.

Abstract: A circuit can be used, for example, with a multi-supply memory device. The circuit includes a first conductor and a second conductor. A first transistor has a current path coupled between the first conductor and the second conductor. A second transistor also has a current path coupled between the first conductor and the second conductor. A pulse generator circuit has an input coupled to a control terminal of the first transistor and an output coupled to a control terminal of the second transistor.

Abstract: A method is for making a semiconductor device. The method may include providing a lead frame having a recess, forming a sacrificial material in the recess of the lead frame, and mounting an IC on the lead frame. The method may include encapsulating the IC and the lead frame, removing portions of the lead frame to define lead frame contacts for the IC, and removing the sacrificial material to define for each lead frame contact a solder anchoring tab extending outwardly at a lower region and defining a sidewall recess between opposing portions of the solder anchoring tab and the encapsulation material.

Abstract: An inertial device that is integratable in a portable electronic device includes: an inertial sensor for generating at least one raw acceleration signal in response to accelerations caused by movements of walking and running of a user of the pedometer; and a processing unit, associated to the inertial sensor for counting a number of steps of the user of the pedometer on the basis of the raw acceleration signal. The inertial sensor and the processing unit are both encapsulated within a single package for integrated circuits, which can be coupled to a circuit board of an electronic device and is provided with at least one connection terminal for making the number of steps available to the outside world.

Abstract: Disclosed herein is an electronic device including a display layer generating display noise based on scanning thereof and a sensing layer including a plurality of sense lines. The display noise is capacitively coupled from the display layer to each of the plurality of sense lines of the sensing layer. A differential charge converter circuit has first and second differential inputs respectively coupled to corresponding ones of the plurality of sense lines, and first and second reference inputs. The first and second reference inputs of the differential charge converter circuit are coupled to voltage references during a reset period, and are decoupled from the voltage references during a scan period.

Abstract: The authenticity of a product associated with a host device is verified through a process. The product contains, in segments of a non-volatile memory, several different functions stored in ciphered fashion. The process involves, in a first phase, the sending by the host device of a control signal for executing a function, with the product functioning to decipher the function and store the unciphered function in the non-volatile memory. The process further involves, in a second phase, the sending by the host device of a control signal for causing execution of the deciphered function, with the product functioning to execute the function and send a result of this execution back to the host device. The host device evaluates the received result to verify product authenticity.

Abstract: Bipolar transistors and MOS transistors are formed in a common process. A semiconductor layer is arranged on an insulating layer. On a side of the bipolar transistors: an insulating region including the insulating layer is formed; openings are etched through the insulating region to delimit insulating walls; the openings are filled with first epitaxial portions; and the first epitaxial portions and a first region extending under the first epitaxial portions and under the insulating walls are doped. On the side of the bipolar transistors and on a side of the MOS transistors: gate structures are formed; second epitaxial portions are made; and the second epitaxial portions covering the first epitaxial portions are doped.

Abstract: CRC generation circuitry includes a lookup-table storing N-bit CRC values for M one-hot data frames. N AND gates for each bit of a M-bit data frame receive that bit of the M-bit data frame and a different bit of a N-bit CRC value from the lookup-table corresponding to a position of the bit in the M-bit data frame. N exclusive-OR gates each receive output from one of the N AND gates for each bit of the M-bit data frame. The N exclusive-OR gates generate a final N-bit CRC value for the M-bit data frame. The CRC value is therefore generated with a purely combinational circuit, without clock cycle latency. Area consumption is small due to the small lookup-table, which itself permits use of any generator polynomial, and is independent of the width of the received data frame. This device can also generate a combined CRC for multiple frames.

Abstract: A semiconductor nanolaser includes a rib formed by a stack of layers, in which stack central layers (33, 34, 35) forming an assembly of quantum wells are placed between a lower layer (32) of a first conductivity type and an upper layer (36) of a second conductivity type. Holes (42) are drilled right through the thickness of the rib, wherein the lower layer includes first extensions (38, 40) that extend laterally on either side of the rib, and that are coated with first metallizations (42, 44) that are located a distance away from the rib. The stack includes second extensions (45, 46) that extend longitudinally beyond said rib, and that are coated with second metallizations (47, 48).

Abstract: Disclosed herein is an electronic device including a sensing layer including a plurality of sense lines, and a plurality of single ended charge converter circuits each receiving input from a corresponding one of the plurality of sense lines. The electronic device also includes a plurality of current mirror circuits, each respectively mirroring output from one of the plurality of single ended charge converter circuits so as to produce two substantially identical outputs for each of the plurality of single ended charge converter circuits. There may be a plurality of subtractor circuits coupled to the plurality of current mirror circuits, with each of the plurality of subtractor circuits configured to output a voltage that is a function of a difference between outputs from two of the plurality of current mirror circuits associated with adjacent ones of the sense lines.