Abstract: A single chip integrated circuit (IC) package includes a die pad, and a spacer ring on the die pad defining a solder receiving area. A solder body is on the die pad within the solder receiving area. An IC die is on the spacer ring and is secured to the die pad by the solder body within the solder receiving area. Encapsulating material surrounds the die pad, spacer ring, and IC die. For a multi-chip IC package, a dam structure is on the die pad and defines multiple solder receiving areas. A respective solder body is on the die pad within a respective solder receiving area. An IC die is within each respective solder receiving area and is held in place by a corresponding solder body. Encapsulating material surrounds the die pad, dam structure, and plurality of IC die.

Abstract: A semiconductor device includes: a semiconductor die having first and second opposite surfaces, a die pad having the first surface of the semiconductor die attached thereon, an electrically conductive ground pad at the second surface of the semiconductor die, a device package coupled with the semiconductor die with the ground pad lying between the semiconductor die and the package, and ground wiring or tracks for the semiconductor die between the second surface of the semiconductor die and the ground pad. A further ground connection may be provided between the ground pad at the second surface of the semiconductor die and the die pad having the semiconductor die attached thereon.

Abstract: A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.

Abstract: A transimpedance amplifier circuit includes a feedback control loop that generates a compensation current at an input of a transimpedance amplifier. The feedback control loop includes a differential integrator with an integration capacitor. A time constant associated with charging the integration capacitor is variable as a function of a pre-charge control signal. During a pre-charge phase, the pre-charge control signal is set to a first value so as to set the time constant associated with charging the integration capacitor to a first time constant value. During an operation phase, the pre-charge control signal is set to a second value so as to increase the time constant associated with charging the integration capacitor to a second time constant value greater than the first time constant value for the pre-charge phase.

Abstract: A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.

Abstract: SPADs detect photons of a return light pulse and output corresponding pulse signals. First and second counters, when enabled in response to phase measurement value, are configured to count the pulse signals. The phase measurement value is set for a subsequent iteration of the return light pulse in response to processing of first and second count values of the first and second counters, respectively, for a current iteration. If the first count value exceeds the second count value by more than a difference threshold limit, the phase measurement value is decremented for the subsequent iteration. Otherwise, the phase measurement value is incremented for the subsequent iteration. If the difference threshold limit is not satisfied, the phase measurement value may be maintained for the subsequent iteration, but one of the counters is preloaded for the subsequent iteration with a value equal to a magnitude of the difference between the count values.

Abstract: An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.

Abstract: An electric transformer device (balun) is formed on a support plate having a first base face and an opposite second base face. The balun includes a first port (40) connectable to an electrical line for a differential signal and a second port connectable to an electrical line for a single-ended signal. A first printed conductive track is associated to the first base face of the support plate for connecting the first port to the second port. A printed conductive path is associated to the second base face of the support plate for connecting the first port to the second port. The printed conductive path is formed of a symmetric second and third printed conductive tracks.

Abstract: A protective circuit for an apparatus includes an accelerometer having an output and a microcontroller coupled to the output of the accelerometer. The protective circuit also includes a switch for controlling the apparatus coupled to an output of the microcontroller and a load coupled to the switch. A power source is coupled to the load and the switch. In operation the microcontroller is cable of sending a signal to the switch to turn of power to the load when a dangerous condition as detected from the accelerometer data has occurred.

Abstract: A reference voltage generator circuit includes a circuit that generates a complementary to absolute temperature (CTAT) voltage and a proportional to absolute temperature (PTAT) current. An output current circuit generates, from the PTAT current, a sink PTAT current sunk from a first node and a source PTAT current sourced to a second node, wherein the sink and source PTAT currents are equal. A resistor is directly connected between the first node and the second node. A divider circuit divides the CTAT voltage to generate a divided CTAT voltage applied to the first node. A voltage at the second node is a fractional bandgap reference voltage equal to a sum of the divided CTAT voltage and a voltage drop across the resistor that is proportional to a resistor current equal to the sink and source PTAT currents.

Abstract: An integrated circuit includes a substrate and at least one component unfavorably sensitive to compressive stress which is arranged at least partially within an active region of the substrate limited by an insulating region. To address compressive stress in the active region, the circuit further includes at least one electrically inactive trench located at least in the insulating region and containing an internal area configured to reduce compressive stress in the active region. The internal area is filled with polysilicon. The polysilicon filled trench may further extend through the insulating region and into the substrate.

Abstract: Disclosed herein is a circuit for determining failure of a movable MEMS mirror. The circuit includes a mirror position sensor associated with the movable MEMS mirror and that generates an analog output as a function of angular position of the movable MEMS mirror. An analog to digital converter converts the analog output from the mirror position sensor to a digital mirror sense signal. Failure detection circuitry calculates a difference between the digital mirror sense signal at a first instant in time and the digital mirror sense signal at a second instant in time, determines whether the difference exceeds a threshold, and indicates failure of the movable MEMS mirror as a function of the difference failing to exceed the threshold.

Abstract: A scan chain for testing a combinatorial logic circuit includes a first scan chain path of flip-flops connected to the combinatorial logic circuit for functional mode operation during runtime of the combinatorial logic circuit. A second scan chain path of flip-flops is also connected to the combinatorial logic circuit and supports both a shift mode and a capture mode. The second scan chain path operates in shift mode while the first scan chain path is connected to the combinatorial logic circuit for functional mode operation. The second scan chain is then connected to the combinatorial logic circuit when run time is interrupted and operates in capture mode to apply the test data to the combinatorial logic circuit.

Abstract: An electronic device is formed by a sequence of at least two thyristors coupled in series in a same conduction direction. Each thyristor has a gate of a first conductivity type. The gates of the first conductivity type for the thyristors in the sequence are coupled together in order to form a single control gate.

Abstract: A low voltage to high voltage (LV2HV) conversion circuit has an input configured to receive an input signal (at a relatively low voltage) and an output configured to generate an output signal (at a relatively high voltage). The LV2HV conversion circuit includes a voltage to current conversion circuit referenced to the relatively low voltage and configured to convert a voltage of the input signal to a first current, wherein a magnitude of the first current is dependent on said voltage of the input signal and a gain setting value. A current mirroring circuit mirrors the first current and outputs a second current. A current to voltage conversion circuit converts the second current to a voltage of the output signal. The current mirroring circuit and current to voltage conversion circuit are referenced to the relatively high voltage.

Abstract: A system includes a hot source, a cold source, and a device thermally coupled between the hot source and the cold source. The device includes a thermal-mechanical transducer and a mechanical-electrical transducer. The thermal-mechanical transducer includes a band of bimetallic strips linked mechanically together by their longitudinal ends. The band partially suspended over a portion of a substrate. Each bimetallic strip has a first stable state having a first curvature and a second stable state having a second curvature opposite the first curvature, and adjacent bimetallic strips have opposite curvature.

Abstract: A voltage-regulator device includes an error-amplifier stage configured to receive a first reference voltage and a feedback voltage, an output amplifier stage coupled to the error-amplifier stage and configured to generate an output voltage related to the first reference voltage by an amplification factor, and a feedback stage configured to generate the feedback voltage. A compensation stage is configured to implement a second feedback loop, and cause, in response to a variation of the output voltage, a corresponding variation of a first biasing voltage for the output amplifier stage. The compensation stage includes a coupling-capacitor element coupled between the output amplifier stage and a first internal node, and a driving module coupled between the first internal node, and the output amplifier stage and configured to generate a compensation voltage for driving the output amplifier stage.

Abstract: Various embodiments provide an optical image stabilization circuit including a drive circuit having a power waveform generator and a power waveform conversion circuit. The power waveform generator generates a power waveform. The power waveform conversion circuit converts the power waveform to a power drive signal. An actuator is then driven by the power drive signal to move a lens accordingly and compensate for any movements and vibrations of a housing of the lens.

Abstract: Various embodiments provide an optical image stabilization circuit including a drive circuit having a power waveform generator and a power waveform conversion circuit. The power waveform generator generates a power waveform. The power waveform conversion circuit converts the power waveform to a power drive signal. An actuator is then driven by the power drive signal to move a lens accordingly and compensate for any movements and vibrations of a housing of the lens.

Abstract: A substrate includes first and second semiconductor layers doped with opposite conductivity type in contact with each other at a PN junction to form a junction diode. At least one through silicon via structure, formed by a conductive region surrounded laterally by an insulating layer, extends completely through the first semiconductor layer and partially through the second semiconductor layer with a back end embedded in, and in physical and electrical contact with, the second semiconductor layer. A first electrical connection is made to the first through silicon via structure and a second electrical connection is made to the first semiconductor layer. A testing current is applied to and sensed at the first and second electrical connections in order to detect a defect in the at least one through silicon via structure.