Patents Assigned to STMicroelectronics AS
  • Patent number: 9966145
    Abstract: A non-volatile memory device includes a memory array having memory cells arranged in wordlines and receiving a supply voltage. A row decoder includes an input and pre-decoding module, which is configured to receive address signals and generate pre-decoded address signals at low voltage, in the range of the supply voltage. A driving module is configured to generate biasing signals for biasing the wordlines of the memory array starting from decoded address signals, which are a function of the pre-decoded address signals, at high voltage and in the range of a boosted voltage higher than the supply voltage. A processing module is configured to receive the pre-decoded address signals and to jointly execute an operation of logic combination and an operation of voltage boosting of the pre-decoded address signals for generation of the decoded address signals.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: May 8, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Salvatore Polizzi, Giovanni Campardo
  • Patent number: 9966399
    Abstract: A pixel is formed by two or more photodiodes and at least one transfer gate. The transfer gate is configured to transfer charge from each of the photodiodes to a common sense node, such that charge from the photodiodes is combined at the common sense node.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: May 8, 2018
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: Laurence Stark
  • Patent number: 9966944
    Abstract: A gate driver circuit for a half bridge or full bridge output driver stage having a high side branch connected to one or more high side transistors and a low side branch connected to one or more low side transistors. A high side gate driver and a low side gate driver receive input signals at a low voltage level and output signals at a high voltage level as gate driving signals for the high side transistors and low side transistors. Each of the high side and the low side branches of the gate driver includes a set-reset latch having a signal output that is fed as a gate signal to the corresponding transistor of the half bridge or full bridge driver. A differential capacitive level shifter circuit receives the input signals at a low voltage level and outputs high voltage signals to drive the set and reset inputs of the set-reset latch.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: May 8, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Sandro Rossi, Valeria Bottarel
  • Publication number: 20180122846
    Abstract: A semiconductor device includes a first semiconductor substrate with a first transistor therein. The first transistor includes a first source-drain formed by a doped region in the first semiconductor substrate. An intermediary insulating layer is formed on and above the first semiconductor substrate. A second semiconductor substrate is formed on and above the intermediary insulating layer. A second transistor is formed in the second semiconductor substrate, and includes a second source-drain formed by a doped region in the second semiconductor substrate. A trench is formed in the second semiconductor substrate and in contact with the doped region for the second semiconductor substrate. The trench has a thickness equal to that of the second semiconductor substrate. Metal wiring extends from a contact with the doped region for the first source-drain, through the intermediary insulating layer and the trench, to make electrical contact with the doped region for the second source-drain.
    Type: Application
    Filed: December 22, 2017
    Publication date: May 3, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventor: Francois Roy
  • Publication number: 20180117630
    Abstract: A differential amplifier generates an output voltage waveform exhibiting a slew rate over a rise time. The amplifier is powered from a dc voltage input and includes a set of differential pairs having a bias current flowing therethrough and a Miller compensation capacitance. A comparator functions to compare a voltage at the dc voltage input against a reference voltage in order to detect when the voltage drops below the reference voltage. A gain stage controls the gain of the differential amplifier and a bias current control circuit controls the bias current of the differential amplifier. In response to the detection by the comparator of the voltage dropping below the reference voltage, the gain stage and the bias current control circuit decrease the gain of the amplifier and jointly decrease the bias current in order to maintain a value of the rise time.
    Type: Application
    Filed: May 4, 2017
    Publication date: May 3, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventors: Giuseppe Calcagno, Domenico Cristaudo, Stefano Corradi
  • Publication number: 20180121010
    Abstract: Disclosed herein is a touch screen controller that calculates a variance of an island in acquired touch data values. Where the variance exceeds a variance threshold, the island is validated as a representing touch. Where the variance does not exceed the variance threshold, whether the island represents a touch or a hover is determined by calculating a sharpness by applying weights to nodes of the island, where neighboring nodes adjacent to a peak node are weighted less than non-neighboring nodes not adjacent to the peak node. An island strength threshold is determined as a function of a product of the variance and the sharpness. It is determined that the island represents a touch where a highest touch data value of the island is greater than the island strength threshold, and a hover where the highest touch data value of the island is less than the island strength threshold.
    Type: Application
    Filed: October 28, 2016
    Publication date: May 3, 2018
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Manivannan Ponnarasu, Mythreyi Nagarajan
  • Publication number: 20180122770
    Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
    Type: Application
    Filed: May 23, 2017
    Publication date: May 3, 2018
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: David Auchere, Asma Hajji, Fabien Quercia, Jerome Lopez
  • Patent number: 9961451
    Abstract: A MEMS acoustic transducer has: a detection structure, which generates an electrical detection quantity as a function of a detected acoustic signal; and an electronic interface circuit, which is operatively coupled to the detection structure and generates an electrical output quantity as a function of the electrical detection quantity.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: May 1, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Germano Nicollini, Silvia Adorno, Andrea Barbieri, Federica Barbieri, Sebastiano Conti, Edoardo Marino, Sergio Pernici
  • Patent number: 9958889
    Abstract: The present disclosure relates to a voltage regulation circuit including a first transistor connected between an input of voltage to be regulated and an output of a regulated voltage. A first regulation loop controls the first transistor according to a difference between a reference voltage and a first feedback voltage derived from the regulated voltage. A second transistor is connected in series between the first transistor and the output. A second regulation loop controls the second transistor according to a difference between the reference voltage and a second feedback voltage derived from the regulated voltage. The second regulation loop is active in low and high power regulation modes. A switch circuit forces the first transistor into an on state in a low power regulation mode.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: May 1, 2018
    Assignee: STMicroelectronics (Alps) SAS
    Inventor: Alexandre Pons
  • Patent number: 9960692
    Abstract: A driver includes a high-side driver transistor coupled between supply voltage and the gate drive nodes and provides a first charge current to a high side gate node of the high-side driver transistor until the gate drive node reaches a first gate drive threshold. Then a second charge current is provided to the high side gate node that is less than the first charge current. The gate drive node is limited to a first clamped threshold for a delay time. A gate drive current rise signal sets the value of the second charge current that charges the high side gate node and after the delay time the gate drive voltage is limited to a second clamped threshold greater than the first clamped threshold but less than the supply voltage. A gate drive programmable control signal sets the value of the second clamped threshold.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: May 1, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Iorio, Maurizio Foresta
  • Patent number: 9960131
    Abstract: In one embodiment, a semiconductor device includes one or more metallizations, such as, e.g., Cu-RDL metallizations, provided on a passivation layer over a dielectric layer. A via is provided through the passivation layer and the dielectric layer in the vicinity of the corners of the metallization. The via may be a “dummy” via without electrical connections to an active device and may be provided at a distance between approximately 1 micron (10?6 m.) and approximately 10 micron (10?5 m.) from each one of said converging sides landing on an underlying metal layer.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: May 1, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Paolo Colpani, Antonella Milani, Lucrezia Guarino, Andrea Paleari
  • Patent number: 9959633
    Abstract: An embodiment relates to a method for the detection of texture of a digital image, including providing a raw data image of the image by means of Bayer image sensors, determining noise in at least a region of the raw data image and determining the texture based on the determined noise without using a high pass or low pass filter.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: May 1, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Angelo Bosco, Arcangelo Ranieri Bruna, Davide Giacalone, Rosetta Rizzo
  • Patent number: 9960295
    Abstract: A Single-Photon Avalanche Diode (SPAD) is disclosed. The SPAD may include an active region for detection of incident radiation, and a cover configured to shield part of the active region from the incident radiation. An array is also disclosed and includes SPADs arranged in rows and columns. A method for making the SPAD is also disclosed.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: May 1, 2018
    Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventors: Stuart McLeod, Pascal Mellot, Lindsay Grant
  • Patent number: 9958919
    Abstract: An embodiment is a circuit for use with a display device, the circuit including: a first input node configured to be operatively coupled to a first port of a data source device that provides the display device with data, to receive a first direct voltage used for a real-time display of the data on the display device; and at least one output node, configured to operatively provide the display device with at least one output voltage generated based on the first direct voltage, wherein the first port is isolated from a data port used to transmit the data.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: May 1, 2018
    Assignees: STMICROELECTRONICS (SHENZHEN) R&D CO., LTD., STMICROELECTRONICS LTD.
    Inventors: Danny Sheng, Andy Lin, Johnny Yoon
  • Patent number: 9959226
    Abstract: A communication interface couples a transmission circuit with an interconnection network. The transmission circuit requests transmission of a predetermined amount of data. The communication interface receives data segments from the transmission circuit, stores the data segments in a memory, and verifies whether the memory contains the predetermined amount of data. In the case where the memory contains the predetermined amount of data, the communication interface starts transmission of the data stored in the memory. Alternatively, in the case where the memory contains an amount of data less than the predetermined amount of data, the communication interface determines a parameter that identifies the time that has elapsed since the transmission request or the first datum was received from the aforesaid transmission circuit, and verifies whether the time elapsed exceeds a time threshold.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: May 1, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Daniele Mangano, Mirko Dondini, Salvatore Pisasale
  • Publication number: 20180113168
    Abstract: A sensing structure is presented for use in testing integrated circuits on a substrate. The sensing structure includes a probe region corresponding to a conductive region for connecting to the integrated circuit. A first sensing region at least partially surrounds the probe region. A plurality of sensing elements connects in series such that a first of the plurality of sensing elements has two terminals respectively connected to the first sensing region and the probe region. And a second of the plurality of sensing elements has two terminals respectively connected to the probe region and a first reference potential.
    Type: Application
    Filed: December 20, 2017
    Publication date: April 26, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Publication number: 20180114133
    Abstract: Disclosed herein is a method of operating an electronic device. The method includes activating a first sensing device, and determining a first probabilistic context of the electronic device relative to its surroundings. The method includes outputting the first probabilistic context, and determining a confidence measure of the first probabilistic context. Where the confidence measure of the first probabilistic context is below a threshold, the method includes activating a second sensing device, determining a second probabilistic context of the electronic device relative to its surroundings. outputting the second probabilistic context, and determining a confidence measure of the second probabilistic context. Where the confidence measure of the second probabilistic context is above the threshold, the second sensing device is deactivated and the method returns to determining the first probabilistic context.
    Type: Application
    Filed: October 21, 2016
    Publication date: April 26, 2018
    Applicants: STMicroelectronics, Inc., STMicroelectronics International N.V.
    Inventors: Mahesh Chowdhary, Arun Kumar, Ghanapriya Singh, Kashif R. J. Meer, Indra Narayan Kar, Rajendar Bahl
  • Patent number: 9953895
    Abstract: A method of manufacturing a heat pipe, including the steps of: forming in a substrate a cylindrical opening provided with a plurality of ring-shaped recessed radially extending around a central axis of the opening; arranging in the recesses separate ring-shaped strips made of a material catalyzing the growth of carbon nanotubes; and growing carbon nanotubes in the opening from said ring-shaped strips.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: April 24, 2018
    Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Pascal Ancey, Simon Gousseau, Olga Kokshagina
  • Patent number: 9954394
    Abstract: An energy-scavenging interface includes first and second switches connected in series between an input and reference, and third and fourth switches connected in series between the input and an output. A control circuit closes the first and second switches and opens the third switch for a first time interval to store charge in a storage element. A scaled copy of a peak value of the charging current is obtained. The control circuit then opens the first switch and closes the third and fourth switches to generate an output signal as long as the value in current of the output signal is higher than the value of said scaled copy of the peak value.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: April 24, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Ramorini, Alessandro Gasparini, Alberto Cattani
  • Patent number: 9953933
    Abstract: A semiconductor package includes a substrate, a die, an insulating die attach film, a dummy die, a conductive layer, and an electrically conductive molding compound or encapsulant. The first surface of the substrate includes a plurality of internal leads, and the second surface of the substrate includes a plurality of external electrically conductive pads and an electrically conductive ground terminal. A non-conductive flow over wire die attach film is placed to surround and encase the die. The dummy die overlies the die and a conductive layer overlies the dummy die. The electrically conductive molding compound is formed to encase the various components of the semiconductor device. The electrically conductive molding compound is electrically coupled to the electrically conductive ground terminal and the conductive layer forming an EMI shield for the die in the package.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: April 24, 2018
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Aaron Cadag, Rennier Rodriguez, Ela Mia Cadag