Patents Assigned to STMicroelectronics AS
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Patent number: 9940488Abstract: A method includes receiving image information related to a first plurality of pixels at a first data pathway, receiving image information related to a second plurality of pixels at a second data pathway, where the first plurality of pixels and the second plurality of pixels include a shared plurality of pixels. The method also includes performing image processing in dependence on image information related to the shared plurality of pixels, and combining data output from the first and second data pathways into a stream of data where the stream output is generated using a first clock frequency which is substantially the same as that used in the first and second data pathways.Type: GrantFiled: September 15, 2015Date of Patent: April 10, 2018Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITEDInventors: David Lee, David Grant
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Patent number: 9941821Abstract: A piezoelectric transducer for energy-harvesting systems includes a substrate, a piezoelectric cantilever element, a first magnetic element, and a second magnetic element, mobile with respect to the first magnetic element. The first magnetic element is coupled to the piezoelectric cantilever element. The first magnetic element and the second magnetic element are set in such a way that, in response to relative movements between the first magnetic element and the second magnetic element through an interval of relative positions, the first magnetic element and the second magnetic element approach one another without coming into direct contact, and the interaction between the first magnetic element and the second magnetic element determines application of a force pulse on the piezoelectric cantilever element.Type: GrantFiled: July 29, 2014Date of Patent: April 10, 2018Assignee: STMicroelectronics S.R.L.Inventors: Francesco Procopio, Carlo Valzasina, Alberto Corigliano, Raffaele Ardito, Giacomo Gafforelli
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Patent number: 9942459Abstract: The present disclosure relates to solid state image sensors in digital imaging systems, more particularly to an image quality learning method and system for solid state image sensors. One of the advantages of the method according to an embodiment of the present disclosure is to allow the implementation of a digital machine vision system with a faster convergence of an Image Quality algorithm, which results in a shorter delay for the user. According to an embodiment of the present disclosure, the method is performed as a recursive algorithm which tends to converge to an Image Quality setting satisfying image quality criteria.Type: GrantFiled: July 6, 2012Date of Patent: April 10, 2018Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITEDInventor: William Foote
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Patent number: 9941170Abstract: A PNP transistor is manufactured in parallel with the manufacture of NPN, NMOS, and PMOS transistors. A first semiconductor layer is deposited on a P-type doped semiconductor substrate and divided into first, second, and third regions, with the third region forming the base. An insulating well is deeply implanted into the substrate. First and second third wells, respectively of N-type and P-type are formed to extend between the second region and third region and the insulating well. A third well of P-type is formed below the third region to provide the collector. Insulating layers are deposited over the third region and patterned to form an opening. Epitaxial growth of a second P-type doped semiconductor layer is performed in the opening to provide the emitter.Type: GrantFiled: March 6, 2017Date of Patent: April 10, 2018Assignee: STMicroelectronics (Crolles 2) SASInventors: Pascal Chevalier, Gregory Avenier
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Patent number: 9941850Abstract: A fully differential operational amplifier is provided. The amplifier has input nodes and includes a differential input stage for receiving input signals over the input nodes and providing output signals on first and second intermediary nodes. The amplifier includes a fully differential amplification stage having positive and negative inputs coupled to the first and second intermediary nodes, respectively. The amplifier includes a first compensation transistor having conduction terminals coupled to the first intermediary node and a first node, and a control terminal coupled to a negative output of the fully differential amplification stage. The amplifier includes a second compensation transistor having conduction terminals coupled to the second intermediary node and a second node, and a control terminal coupled to a positive output of the fully differential amplification stage.Type: GrantFiled: October 3, 2016Date of Patent: April 10, 2018Assignee: STMICROELECTRONICS S.R.L.Inventors: Luca Giuffredi, Andrea Boni, Marco Ronchi
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Patent number: 9939338Abstract: A pressure sensing device may include a body configured to distribute a load applied between first and second parts positioned one against the other, and a pressure sensor carried by the body. The pressure sensor may include a support body, and an IC die mounted with the support body and defining a cavity. The IC die may include pressure sensing circuitry responsive to bending associated with the cavity, and an IC interface coupled to the pressure sensing circuitry.Type: GrantFiled: February 19, 2015Date of Patent: April 10, 2018Assignee: STMicroelectronics S.R.L.Inventors: Alberto Pagani, Federico Giovanni Ziglioli, Bruno Murari
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Patent number: 9939959Abstract: A method for multi-touch integrity sensing for a multi-touch capacitive touch screen is disclosed. By determining the integrity of touches, a distinction is identified between wanted touches, such as via a finger or stylus, and unwanted touches such as via foreign matter, errors, and the like.Type: GrantFiled: November 27, 2017Date of Patent: April 10, 2018Assignee: STMicroelectronics Asia Pacific Pte LtdInventors: Jerry Kim, Tae-gil Kang, Glen Kang, Rooney Kim
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Publication number: 20180097014Abstract: An electronic chip includes FDSOI-type field-effect transistors. The transistor each have a channel region that is doped at an average level in a range from 1016 to 5*1017 atoms/cm3 with a conductivity type opposite to that of a conductivity type for the dopant in the drain and source regions.Type: ApplicationFiled: October 2, 2017Publication date: April 5, 2018Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA, Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Vincent Barral, Nicolas Planes, Antoine Cros, Sebastien Haendler, Thierry Poiroux, Olivier Weber, Patrick Scheer
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Publication number: 20180096844Abstract: A gas phase epitaxial deposition method deposits silicon, germanium, or silicon-germanium on a single-crystal semiconductor surface of a substrate. The substrate is placed in an epitaxy reactor swept by a carrier gas. The substrate temperature is controlled to increase to a first temperature value. Then, for a first time period, at least a first silicon precursor gas and/or a germanium precursor gas introduced. Then, the substrate temperature is decreased to a second temperature value. At the end of the first time period and during the temperature decrease, introduction of the first silicon precursor gas and/or the introduction of a second silicon precursor gas is maintained. The gases preferably have a partial pressure adapted to the formation of a silicon layer having a thickness smaller than 0.5 nm.Type: ApplicationFiled: May 15, 2017Publication date: April 5, 2018Applicants: STMicroelectronics SA, STMicroelectronics (Crolles 2) SASInventors: Didier Dutartre, Victorien Paredes-Saez
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Publication number: 20180097481Abstract: A low-noise amplifier device includes an inductive input element, an amplifier circuit, an inductive output element and an inductive degeneration element. The amplifier device is formed in and on a semiconductor substrate. The semiconductor substrate supports metallization levels of a back end of line structure. The metal lines of the inductive input element, inductive output element and inductive degeneration element are formed within one or more of the metallization levels. The inductive input element has a spiral shape and the an amplifier circuit, an inductive output element and an inductive degeneration element are located within the spiral shape.Type: ApplicationFiled: December 6, 2017Publication date: April 5, 2018Applicant: STMicroelectronics SAInventor: Raphael Paulin
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Publication number: 20180097055Abstract: A dielectric structure extends over the substrate and a transformer is integrated in the dielectric structure. The transformed includes a first winding in the dielectric layer at a first height and a second winding in the dielectric layer at a second height greater than the first height. The first and second windings are magnetically coupleable to one another. A magnetic element is positioned in alignment with the first and second windings. In one implementation, the magnetic element underlies the first winding in a position between the substrate and the first winding. In another implementation, the magnetic element overlies the second winding.Type: ApplicationFiled: March 9, 2017Publication date: April 5, 2018Applicant: STMicroelectronics S.r.l.Inventors: Elisabetta Pizzi, Fabrizio Fausto Renzo Toia, Marco Marchesi, Vincenzo Palumbo
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Publication number: 20180096256Abstract: An electronic device described herein includes a sensing unit having at least one sensor to acquire sensing data. An associated computing device extracts sensor specific features from the sensing data, and generates a motion activity vector, a voice activity vector, and a spatial environment vector as a function of the sensor specific features. The motion activity vector, voice activity vector, and spatial environment vector are processed to determine a base level context of the electronic device relative to its surroundings, with the base level context having aspects each based on the motion activity vector, voice activity vector, and spatial environment vector. Meta level context of the electronic device relative to its surroundings is determined as a function of the base level context, with the meta level context being at least one inference made from at least two aspects of the plurality of aspects of the base level context.Type: ApplicationFiled: December 6, 2017Publication date: April 5, 2018Applicants: STMicroelectronics International N.V., STMicroelectronics, Inc.Inventors: Mahesh Chowdhary, Arun Kumar, Ghanapriya Singh, Kashif R. J. Meer, Indra Narayan Kar, Rajendar Bahl
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Patent number: 9935626Abstract: A driver for a power field-effect transistor includes a first and second circuits that apply respective charge currents to a gate of the power field-effect transistor when a control signal has a first logic value and the voltage between the gate and the source is smaller than a first threshold voltage and greater than a second threshold voltage. Third and fourth circuits apply respective discharge currents to the gate when the control signal has a second logic value and the voltage between the gate and the source is greater than a third threshold voltage and smaller than a fourth threshold voltage. The driver may include at least one field-effect transistor configured to generate at least one of the first, second, third or fourth threshold voltage.Type: GrantFiled: June 28, 2016Date of Patent: April 3, 2018Assignee: STMicroelectronics S.r.l.Inventor: Aldo Davide Gariboldi
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Patent number: 9933884Abstract: An electronic device includes a processor that acquires touch data values corresponding to different locations of a touch display, and identifies an island in the touch data that has touch data values acquired from adjacent locations of the touch display that indicate a potential touch. A first area of the island is determined from touch data values that exceed a first threshold value, and a second area of the island is determined from touch data values that exceed a second threshold value. If the first area is less than a multiple of the second area, coordinates of a location of the island are determined from the touch data values indicating the potential touch. If the first area is at least the multiple of the second area, coordinates of a location of the island are determined from the touch data values indicating the potential touch that exceed a third threshold value.Type: GrantFiled: July 29, 2015Date of Patent: April 3, 2018Assignee: STMICROELECTRONICS ASIA PACIFIC PTE LTDInventors: Manivannan Ponnarasu, Leo Lee
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Patent number: 9935201Abstract: A semiconductor device includes a fin patterned in a substrate; a gate disposed over and substantially perpendicular to the fin; a pair of epitaxial contacts including a III-V material over the fin and on opposing sides of the gate; and a channel region between the pair of epitaxial contacts under the gate including an undoped III-V material between doped III-V materials, the doped III-V materials including a dopant in an amount in a range from about 1e18 to about 1e20 atoms/cm3 and contacting the epitaxial contacts.Type: GrantFiled: January 2, 2017Date of Patent: April 3, 2018Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES, INC., STMICROELECTRONICS, INC.Inventors: Xiuyu Cai, Qing Liu, Kejia Wang, Ruilong Xie, Chun-Chen Yeh
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Patent number: 9935179Abstract: A method for making a semiconductor device may include forming first and second spaced apart semiconductor active regions with an insulating region therebetween, forming at least one sacrificial gate line extending between the first and second spaced apart semiconductor active regions and over the insulating region, and forming sidewall spacers on opposing sides of the at least one sacrificial gate line. The method may further include removing portions of the at least one sacrificial gate line within the sidewall spacers and above the insulating region defining at least one gate line end recess, filling the at least one gate line end recess with a dielectric material, and forming respective replacement gates in place of portions of the at least one sacrificial gate line above the first and second spaced apart semiconductor active regions.Type: GrantFiled: March 29, 2017Date of Patent: April 3, 2018Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES INC., STMICROELECTRONICS, INC.Inventors: Xiuyu Cai, Qing Liu, Kejia Wang, Ruilong Xie, Chun-Chen Yeh
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Patent number: 9935098Abstract: An electronic device includes a semiconductor body and a dielectric layer extending over the semiconductor body. A galvanic isolation module includes a first metal region extending in the dielectric layer at a first height and a second metal region extending in the dielectric layer at a second height greater than the first height. The first and second metal regions are capacitively or magnetically coupleable together. The second metal region includes a side wall and a bottom wall coupled to one another through rounded surface portions.Type: GrantFiled: September 28, 2016Date of Patent: April 3, 2018Assignee: STMicroelectronics S.r.l.Inventors: Vincenzo Palumbo, Elisabetta Pizzi
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Patent number: 9934550Abstract: A method for composing a multilayer video image of which the values of the pixels of the image layers are stored in a memory. The video image may include at least one first image layer and a second image layer located in front of the at least one first layer and having an opaque area. The method may include defining a region of the at least one first image layer to be hidden by the opaque area, reading from the memory the stored pixel values, with the exception of the values of the pixels of the region of the at least one first image layer, and composing the video image at least from the read pixel values.Type: GrantFiled: August 28, 2015Date of Patent: April 3, 2018Assignee: STMICROELECTRONICS (GRENOBLE 2) SASInventor: Gilles Ries
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Patent number: 9933797Abstract: An integrated electronic device includes a core having a first terminal and a second terminal. The core includes a first branch with a first diode-connected bipolar transistor coupled in series to a first resistor between the first terminal and a reference terminal intended to be supplied with a reference voltage, and a second branch with a second diode-connected bipolar transistor coupled between the second terminal and the reference terminal. The second diode-connected bipolar transistor has a current density higher than the first diode-connected bipolar transistor. The core also includes a first resistive network coupled between a base of the first diode-connected bipolar transistor and the reference terminal. An equalizer is configured to equalize potentials of the first terminal and of the second terminal and a voltage generator is coupled to the first and second terminals of the core and configured to generate the bandgap voltage.Type: GrantFiled: April 24, 2017Date of Patent: April 3, 2018Assignee: STMicroelectronics (Alps) SASInventor: Frederic Lebon
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Patent number: 9936305Abstract: Provided is an acoustic transducer including: a semiconductor substrate; a vibrating membrane, provided above the semiconductor substrate, including a vibrating electrode; and a fixed membrane, provided above the semiconductor substrate, including a fixed electrode, the acoustic transducer detecting a sound wave according to changes in capacitances between the vibrating electrode and the fixed electrode, converting the sound wave into electrical signals, and outputting the electrical signals. At least one of the vibrating electrode and the fixed electrode is divided into a plurality of divided electrodes, and the plurality of divided electrodes outputting the electrical signals.Type: GrantFiled: December 22, 2011Date of Patent: April 3, 2018Assignees: STMICROELECTRONICS S.R.L., OMRON CORPORATIONInventors: Takashi Kasai, Shobu Sato, Yuki Uchida, Sebastiano Conti