Abstract: The authenticity of a product associated with a host device is verified through a process. The product contains, in segments of a non-volatile memory, several different functions stored in ciphered fashion. The process involves, in a first phase, the sending by the host device of a control signal for executing a function, with the product functioning to decipher the function and store the unciphered function in the non-volatile memory. The process further involves, in a second phase, the sending by the host device of a control signal for causing execution of the deciphered function, with the product functioning to execute the function and send a result of this execution back to the host device. The host device evaluates the received result to verify product authenticity.
Abstract: An integrated electronic device for detecting the composition of ultraviolet radiation includes a cathode region formed by a semiconductor material with a first type of conductivity. A first anode region and a second anode region are laterally staggered with respect to one another and are set in contact with the cathode region. The cathode region and the first anode region form a first sensor. The cathode region and the second anode region form a second sensor. In a spectral range formed by the UVA band and by the UVB band, the first and second sensors have, respectively, a first spectral responsivity and a second spectral responsivity different from one another.
Type:
Grant
Filed:
December 4, 2015
Date of Patent:
April 3, 2018
Assignee:
STMicroelectronics S.r.l.
Inventors:
Massimo Cataldo Mazzillo, Antonella Sciuto, Paolo BadalĂ
Abstract: An electronic device includes a rectifier bridge that includes an input configured to be coupled to power over Ethernet (PoE) power sourcing equipment (PSE), and an output. A transistor is configured to selectively couple the output with a load. The electronic device includes a maintain power signature (MPS) device, and a control circuit. The control circuit is to maintain the transistor on when a load current is above a threshold, source current from the rectifier bridge to the MPS device when the load current is below the threshold, and switch the transistor to a diode configuration when the load current is below the threshold.
Abstract: In order to verify the authenticity of a product associated with a host device, the product contains, in segments of a non-volatile memory, several different functions stored in ciphered fashion. The host device sends a control signal for selecting and activating one of those ciphered functions. The product then deciphers and executes the function. The result of the function execution is then communicated back to host device when a decision on product authenticity is made.
Abstract: An integrated circuit including a plurality of first semiconductor strips of a first conductivity type and of second semiconductor strips of a second conductivity type arranged in alternated and contiguous fashion on a region of the second conductivity type, including for each of the first strips: a plurality of bias contacts; for each bias contact, a switch capable of applying a potential on the bias contact; two detection contacts arranged at the ends of the first strip; and a detection circuit having its activation causing the turning off of the switches and the comparison with a threshold of the resistance between the detection contacts.
Abstract: An electro-optic device may include a photonic chip including an insulator layer, and a semiconductor layer over the insulator layer and defining an optical grating coupler. The optical grating coupler may have a series of alternating curved ridges and valleys. The optical grating coupler has first and second sides and a medial portion. The medial portion has a medial grating period T based upon a targeting wavelength. One or more of the first and second sides have a side grating period different than T.
Abstract: LED strings cascaded to one another are driven by an electronic circuit that includes regulation modules and a brightness-compensation module. The regulation modules carry out in sequence a current-regulation phase, in which they regulate the current that flows in the corresponding LED strings. The regulation module includes: a compensation regulator coupled to a compensation LED string and to a capacitor and a generator that generates an electrical quantity indicating the luminous flux emitted by the LED strings and by the compensation LED string. The compensation regulator regulates a current that flows in the compensation LED string as a function of the electrical quantity, discharging the capacitor through the compensation LED string.
Abstract: An integrated circuit includes FDSOI-type MOS transistors formed inside and on top of a semiconductor layer resting on an insulating layer. The transistors include a logic MOS transistor of a first conductivity type, a logic MOS transistor of a second conductivity type, and an analog MOS transistor of the first conductivity type, A gate stack of the logic transistors successively includes a gate insulator layer, a first titanium nitride layer, a lanthanum layer, and a second titanium nitride layer. A gate stack of the analog transistor includes the gate insulator layer, the lanthanum layer and the second titanium nitride layer but not the first titanium nitride layer.
Type:
Application
Filed:
March 14, 2017
Publication date:
March 29, 2018
Applicant:
STMicroelectronics (Crolles 2) SAS
Inventors:
Guillaume C. Ribes, Benjamin Dumont, Franck Arnaud
Abstract: A roughened silicon surface is formed by a process including repetitively performed roughening cycles. Each roughening cycles including a step for depositing a non-planar polymeric layer over an area of a silicon body and a step for plasma etching the polymeric layer and the area of the silicon body etch in a non-unidirectional way. As a result, a surface portion of the silicon body is removed, in a non-uniform way, to a depth not greater than 10 nm.
Abstract: Two phase-change memory cells are formed from a first conductive via, a second conductive and a central conductive via positioned between the first and second conductive vias where a layer of phase-change material is electrically connected to the first and second conductive vias by corresponding resistive elements and insulated from the central conductive via by an insulating layer. The conductive vias each include a lower portion made of a first metal (such as tungsten) and an upper portion made of a second metal (such as copper). Drains of two transistors are coupled to the first and second conductive vias while sources of those two transistors are coupled to the central conductive via.
Type:
Application
Filed:
March 8, 2017
Publication date:
March 29, 2018
Applicant:
STMicroelectronics (Crolles 2) SAS
Inventors:
Emmanuel Gourvest, Yannick Le Friec, Laurent Favennec
Abstract: An in-liquid state of a mobile device is detected by processing color components indicative of an intensity of the ambient light at different wavelengths and a pressure data indicative of ambient pressure. A first plausibility index indicates a likelihood of an air/liquid transition as a function of variations of at least two color components. A second plausibility index indicates a likelihood of an air/liquid transition as a function of variations of said ambient pressure. If both the first and the second plausibility indices indicate a likely air/liquid transition event, an in-liquid state signal is generated.
Type:
Application
Filed:
March 9, 2017
Publication date:
March 29, 2018
Applicant:
STMicroelectronics S.r.l.
Inventors:
Enrico Rosario Alessi, Giuseppe Spinella
Abstract: A first semiconductor substrate layer supports a first transistor including a first source-drain formed by a doped region of the substrate layer. A second semiconductor substrate layer supports a second transistor including a second source-drain formed by a doped region of the substrate layer. The second semiconductor substrate layer is stacked over the first semiconductor substrate layer and separated therefrom by an insulating layer. A metal wiring extends from an electrical contact with the doped region for the first source-drain, through the insulating layer and passing through an electrical isolation structure in the second semiconductor substrate layer to make an electrical contact with the doped region for the second source-drain. The electrical isolation structure is formed by one of a trench isolation or the doped region of the second source-drain itself. The isolation structure has a thickness equal to a thickness of the second semiconductor substrate layer.
Abstract: A device includes a matrix of active pixels, with each active pixel having an OLED diode having a cathode to receive a cathode voltage, and a control circuit coupled to an anode of the OLED diode. The device also includes at least one dummy pixel having a dummy OLED diode having a cathode to receive the cathode voltage, and an anode, and a dummy control circuit coupled to the anode of the OLED diode and having a power supply terminal. The dummy OLED diode and the dummy control circuit are substantially similar to the OLED diode and the control circuit. First regulation circuitry is configured to deliver a reference current to the power supply terminal to thereby generate a voltage, and second regulation circuitry is configured to regulate the cathode voltage so as to maintain the voltage at the power supply terminal at a given level.
Abstract: A semiconductor wafer suitable for fabricating an SOI substrate is provided by: producing a first layer of polycrystalline semiconductor on a top side of a semiconductor carrier; then forming an interface zone on a top side of the first layer, wherein the interface zone has a structure different from a crystal structure of the first layer; and then producing a second layer of polycrystalline semiconductor on the interface zone.
Abstract: A switching amplifier includes a first half-bridge PWM modulator, a second half-bridge PWM modulator, and at least one amplifier stage configured to receive input signals. The switching amplifier also includes a PWM control stage configured to control switching of the first PWM modulator and of the second PWM modulator as a function of the input signals, by respective first PWM control signals and second PWM control signals. The amplifier stage and the PWM control stage have a fully differential structure.
Abstract: A driver circuit for synchronous rectifier electronic switches, such as SR MOSFETs in resonant converters controls a pair of synchronous rectifier electronic switches to apply thereto a drive voltage to switch the synchronous rectifier electronic switches on and off synchronously with a converter current. The driver circuit includes a programming module to produce a first signal indicative of the figure of merit of the synchronous rectifier electronic switches, and, optionally, a current sensing module to produce a second signal indicative of the output current of the synchronous rectifier electronic switches. An output module is included to generate a value for the drive voltage which is a function of the first signal indicative of the figure of merit and, optionally, of the second signal indicative of the output current of the synchronous rectifier electronic switches.
Abstract: An attenuator includes: a first circuit including a common collector or common drain amplifier formed of a first transistor having its control node connected to an input of the attenuator and its emitter or source connected to an intermediate node of the attenuator; and a second circuit including a common collector or common drain amplifier formed of a second transistor having its emitter or source connected to the intermediate node and its control node connected to an output of the attenuator.
Type:
Grant
Filed:
September 8, 2015
Date of Patent:
March 27, 2018
Assignees:
STMICROELECTRONICS (CROLLES 2) SAS, STMICROELECTRONICS SA
Inventors:
Thomas Quemerais, Alice Bossuet, Daniel Gloria
Abstract: Bipolar transistors and MOS transistors are formed in a common process. A semiconductor layer is arranged on an insulating layer. On a side of the bipolar transistors: an insulating region including the insulating layer is formed; openings are etched through the insulating region to delimit insulating walls; the openings are filled with first epitaxial portions; and the first epitaxial portions and a first region extending under the first epitaxial portions and under the insulating walls are doped. On the side of the bipolar transistors and on a side of the MOS transistors: gate structures are formed; second epitaxial portions are made; and the second epitaxial portions covering the first epitaxial portions are doped.
Type:
Grant
Filed:
March 9, 2017
Date of Patent:
March 27, 2018
Assignees:
STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Rousset) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
Inventors:
Olivier Weber, Emmanuel Richard, Philippe Boivin
Abstract: In one embodiment, a (pre)driver circuit includes first and a second output terminal for driving an electronic switch that includes a control terminal and a current path through the switch. The arrangement can operate in one or more first driving configurations (e.g., for PMOS), with the first and second output terminals are coupled to the current path and the control electrode of the electronic switch, respectively, and one or more second driving configurations (e.g., for NMOS, both HS and LS), wherein the first and second output terminals of the driver circuit are coupled to the control electrode and the current path of the electronic switch, respectively.
Abstract: A CMOS device is formed in an FDSOI integrated circuit die. By retrieving the MOS functionality for gate voltage levels higher than its stress limits, second gate availability in these devices is being used, and hence removing the additional circuitry that would have been used for protecting the devices from such stress. Implementation in an inverter includes a PMOS transistor and an NMOS transistor. The PMOS and NMOS transistors each include a first gate coupled to the respective source terminal of the transistor. The PMOS and NMOS transistors each include a back gate coupled to the input of the inverter.