Patents Assigned to STMicroelectronics AS
  • Publication number: 20180074619
    Abstract: An active stylus is capacitively coupled to a capacitive touch panel for communication. The active stylus operates in a wait mode to receive initial communications from the panel. In response to such receipt, the active stylus synchronizes to a repeating communications frame implementing time division multiplexing. Communications from the active stylus to the panel include: information communications; synchronization communications and communications specific for columns and/or rows of the panel. Communications from the panel to the active stylus may be addressed uniquely to the stylus or commonly to a group of styluses.
    Type: Application
    Filed: November 15, 2017
    Publication date: March 15, 2018
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Praveesh Chandran, Baranidharan Karuppusamy, Giuseppe Noviello, Chee Weng Cheong, Leonard Liviu Dinu, Dianbo Guo, Kien Beng Tan, Chaochao Zhang
  • Publication number: 20180076265
    Abstract: A MOS transistor with two vertical gates is formed within a substrate zone of a semiconductor substrate doped with a first type of conductivity and separated from a remaining portion of the substrate by two first parallel trenches extending in a first direction. An isolated gate region rests on each flank of the substrate zone and on a portion of the bottom of the corresponding trench to form the two vertical gates. At least one gate connection region electrically connects the two vertical gates. A first buried region located under the substrate zone is doped with a second type of conductivity to form a first conduction electrode of the MOS transistor. A second region doped with the second type of conductivity is located at the surface of the substrate zone to form a second conduction electrode of the MOS transistor.
    Type: Application
    Filed: February 20, 2017
    Publication date: March 15, 2018
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Philippe Boivin, Jean-Jacques Fagot
  • Publication number: 20180074000
    Abstract: A semiconductor gas sensor device includes a first cavity that is enclosed by opposing first and second semiconductor substrate slices. At least one conducting filament is provided to extend over the first cavity, and a passageway is provided to permit gas to enter the first cavity. The sensor device may further including a second cavity that is hermetically enclosed by the opposing first and second semiconductor substrate slices. At least one another conducting filament is provided to extend over the second cavity.
    Type: Application
    Filed: November 9, 2017
    Publication date: March 15, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventors: Pasquale Biancolillo, Angelo Recchia, Pasquale Franco, Antonio Cicero, Giuseppe Bruno
  • Patent number: 9917886
    Abstract: In an embodiment, information contents, such as, e.g., media contents arranged in pieces including blocks of bits, is distributed over a network including plural terminals at least one of which acts as a source of the pieces of information distributed. Various terminals in the network are configured to act as peer terminals with at least one first peer terminal sending the information to one or more second peer terminals. A set of blocks of a corresponding piece of information is received at the first peer terminal and the corresponding piece of information is reconstructed from the set of blocks received. The pieces of information distributed over the network are fountain encoded by XOR-ing the blocks in a piece, so that a received piece is reconstructable from a combination of a corresponding set of linearly independent XOR-ed blocks.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: March 13, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alexandro Sentinelli, Andrea Lorenzo Vitali, Allan Taschini
  • Patent number: 9918364
    Abstract: An electronic circuit drives a plurality of LED strings connected in series. The electronic circuit includes a regulation module corresponding to each LED string, with the regulation module connected to the cathode terminal of the corresponding LED string. Each regulation module is further coupled to receive a reference voltage in phase with a rectified a.c. voltage. The regulation modules execute in turn and in sequence a current-regulation phase as a function of a trend of the reference voltage. Each regulation module, when executing the current-regulation phase, functions to regulate the current that flows in the corresponding LED string and in any previous LED strings in the series connection so that the regulated current is proportional to the reference voltage.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: March 13, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Davide Lena, Simone Crespi
  • Patent number: 9916902
    Abstract: The thinning of a semiconductor substrate of an integrated circuit from a back face is detected using the measurement of a physical quantity representative of the resistance between the ends of two electrically-conducting contacts situated at an interface between an insulating region and an underlying substrate region. The two electrically-conducting contacts extend through the insulating region to reach the underlying substrate region.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: March 13, 2018
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Pascal Fornara, Christian Rivero
  • Patent number: 9915678
    Abstract: A sensor device for an electronic apparatus is provided with: a sensing structure generating a first detection signal; and a dedicated integrated circuit, connected to the sensing structure, detecting, as a function of the first detection signal, a first event associated to the electronic apparatus and generating a first interrupt signal upon detection of the first event. The dedicated integrated circuit detects the first event as a function of a temporal evolution of the first detection signal, and in particular as a function of values assumed by the first detection signal within one or more successive time windows, and of a relation between these values.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: March 13, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Giuditta Roselli, Michele Tronconi, Fabio Pasolini
  • Patent number: 9914639
    Abstract: A MEMS device is provided with: a supporting base, having a bottom surface in contact with an external environment; a sensor die, which is of semiconductor material and integrates a micromechanical detection structure; a sensor frame, which is arranged around the sensor die and is mechanically coupled to a top surface of the supporting base; and a cap, which is arranged above the sensor die and is mechanically coupled to a top surface of the sensor frame, a top surface of the cap being in contact with an external environment. The sensor die is mechanically decoupled from the sensor frame.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: March 13, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Enri Duqi, Sebastiano Conti
  • Patent number: 9918096
    Abstract: An image processing method, implemented in a calculator, includes applying a process by group of pixels to an original image. For each group of pixels, calculating a cumulative sum of value or position differences of the pixels of the group of pixels, and for each group of pixels, allocating in a final image signal a pixel position of the group of pixels to each pixel value of the group of pixels so as to minimize the cumulative sum of differences calculated for the group of pixels according to the differences calculated. For each group of pixels, determining a filtering intensity according to the cumulative sum of differences calculated for the group of pixels, and applying to the group of pixels a filtering having the filtering intensity.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: March 13, 2018
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventor: Marina Nicolas
  • Patent number: 9917194
    Abstract: A self-aligned SiGe FinFET device features a relaxed channel region having a high germanium concentration. Instead of first introducing germanium into the channel and then attempting to relax the resulting strained film, a relaxed channel is formed initially to accept the germanium. In this way, a presence of germanium can be established without straining or damaging the lattice. Gate structures are patterned relative to intrinsic silicon fins, to ensure that the gates are properly aligned, prior to introducing germanium into the fin lattice structure. After aligning the gate structures, the silicon fins are segmented to elastically relax the silicon lattice. Then, germanium is introduced into the relaxed silicon lattice, to produce a SiGe channel that is substantially stress-free and also defect-free. Using the method described, concentration of germanium achieved in a structurally stable film can be increased to a level greater than 85%.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: March 13, 2018
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Nicolas Loubet, Pierre Morin
  • Patent number: 9917506
    Abstract: A method and apparatus for detecting a critical duty cycle that maximizes an output power of a boost converter is provided. In the method and apparatus, the boost converter may be operated at or below the critical duty cycle. In the method and apparatus, a first voltage that is a function of an output voltage of a boost converter and voltage drops across a first set of parasitic resistances of the boost converter is detected. A second voltage that is a function voltage drops across a second set of parasitic resistances of the boost converter is also detected. The voltages are compared to determine the critical duty cycle and the boost converter is operated in accordance with a duty cycle that does not exceed the critical duty cycle.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: March 13, 2018
    Assignee: STMICROELECTRONICS (ALPS) SAS
    Inventor: Vratislav Michal
  • Patent number: 9917195
    Abstract: A semiconductor device includes a fin patterned in a substrate; a gate disposed over and substantially perpendicular to the fin; a pair of epitaxial contacts including a III-V material over the fin and on opposing sides of the gate; and a channel region between the pair of epitaxial contacts under the gate including an undoped III-V material between doped III-V materials, the doped III-V materials including a dopant in an amount in a range from about 1e18 to about 1e20 atoms/cm3 and contacting the epitaxial contacts.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: March 13, 2018
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES, INC., STMICROELECTRONICS ,INC.
    Inventors: Xiuyu Cai, Qing Liu, Kejia Wang, Ruilong Xie, Chun-Chen Yeh
  • Patent number: 9917125
    Abstract: A back-side imager includes a matrix of photosites in an active layer. An interconnect layer covers the active layer. A layer of germanium is positioned between the active layer and the interconnect layer.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: March 13, 2018
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: Francois Roy
  • Patent number: 9916281
    Abstract: A method for securing a data processing system having a processing unit is disclosed. At least a group of N1 digital words of m1 bits is selected from among the set of M1 digital words. N1 is less than M1. These words are selected in such a way that each selected digital word differs from all the other selected digital words by a number of bits at least equal to an integer p which is at least equal to 2. The group of N1 digital words of m1 bits forms at least one group of N1 executable digital instructions. The processing unit is configured to make it capable of executing each instruction of the at least one group of N1 executable digital instructions.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: March 13, 2018
    Assignee: STMicroelectronics SA
    Inventor: Philippe Escalona
  • Patent number: 9917040
    Abstract: A package is formed by a thermal base and a leadframe assembly. The thermal base includes a body of thermally conductive material having a top surface, wherein the top surface of the body includes a pedestal. An integrated circuit chip is mounted to the pedestal, the integrated circuit chip including bonding pads. The leadframe assembly includes leads and an encapsulant ring that partially embeds the leads. The leadframe assembly is mounted to the top surface of said body surrounding the pedestal. The pedestal is configured with a thickness that positions the bonding pad at a height substantially coplanar with the leads. Bonding wires extend from the bonding pads to the leads with a shortened length so as to provide for improved electrical characteristics of frequency response, impedance and inductance.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: March 13, 2018
    Assignee: STMicroelectronics, Inc.
    Inventor: Craig J. Rotay
  • Patent number: 9917324
    Abstract: Embodiment of a system for generating electric power with micro fuel cells comprising at least one first micro cell and at least one second micro cell, each micro cell having an anode and a cathode with a membrane being sandwich-wise interposed, the system comprising a spacer element having an annular element that surrounds a cavity, said spacer element being associated with said anode of said first micro cell and with said anode of said second micro cell to realize a common diffusion chamber for the fuel of said first micro cell a of said second micro cell.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: March 13, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Giuseppe Emanuele Spoto, Andrea Lazzara, Cristian Dall'Oglio
  • Patent number: 9917126
    Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: March 13, 2018
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Sebastien Lagrasta, Delia Ristoiu, Jean-Pierre Oddou, Cécile Jenny
  • Patent number: 9917020
    Abstract: An analog integrated circuit is disclosed in which short channel transistors are stacked on top of long channel transistors, vertically separated by an insulating layer. With such a design, it is possible to produce a high density, high power, and high performance analog integrated circuit chip including both short and long channel devices that are spaced far enough apart from one another to avoid crosstalk. In one embodiment, the transistors are FinFETs and the long channel devices are multi-gate FinFETs. In one embodiment, single and dual damascene devices are combined in a multi-layer integrated circuit cell. The cell may contain various combinations and configurations of the short and long-channel devices. A high density cell can be made by simply shrinking the dimensions of the cells and replicating two or more cells in the same size footprint as the original cell.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: March 13, 2018
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Qing Liu, John H. Zhang
  • Publication number: 20180067303
    Abstract: The present disclosure provides a system and method for controlling operation of a resonance MEMS mirror. The system and method includes activating either an in-plane or staggered MEMS mirror via sets of activation pulses applied to the MEMS mirror, detecting current at the MEMS mirror, generating a window for detecting a change in a direction of the current at the MEMS mirror, and terminating the window and the activation pulse if a change in the current direction is detected during the window. In some embodiments, two sets of activation pulses are applied to the MEMS mirror.
    Type: Application
    Filed: September 6, 2016
    Publication date: March 8, 2018
    Applicant: STMicroelectronics Ltd
    Inventor: Sason Sourani
  • Publication number: 20180067170
    Abstract: The state of charge of a rechargeable battery is determined by calculating the DC impedance of the battery. The impedance is calculated by: performing a two different constant current discharges of the battery at a first and second C-rates, respectively; measuring the voltage and current during the interval of each constant current discharge and calculating the amount of charge extracted from the battery up to a point where the battery voltage drops to a threshold value; calculating the state of charge of the battery; and calculating the DC impedance of the battery as a function of the difference between the battery voltages and discharge currents for the two different discharges.
    Type: Application
    Filed: November 10, 2017
    Publication date: March 8, 2018
    Applicant: STMicroelectronics International N.V.
    Inventor: Daniel Ladret