Patents Assigned to STMicroelectronics (Crolles 2)
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Patent number: 10985437Abstract: A 90° hybrid inductive-capacitive coupling stage includes two first stage terminals capable of forming two stage inputs or two stage outputs and two second stage terminals capable of respectively forming two stage outputs or two stage inputs. The coupling stage is advantageously modular having a first stage axis of symmetry and a second stage axis of symmetry orthogonal to each other with neighboring inductive metal tracks being overlaid in at least one crossing region to form both an inductive circuit and a capacitive circuit. The metal tracks are coupled to the first stage terminals and to the second stage terminals such that the two first stage terminals are situated on one side of the first stage axis of symmetry and the two second stage terminals are situated on the other side of the first stage axis of symmetry.Type: GrantFiled: July 12, 2016Date of Patent: April 20, 2021Assignee: STMicroelectronics SAInventors: Vincent Knopik, Boris Moret, Eric Kerherve
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Publication number: 20210111214Abstract: An electronic device includes a substrate semiconductor wafer with semiconductor portions separated from one another by through-passages. Electronic circuits and a dielectric layer with a network of electrical connections are formed at a front face of the substrate semiconductor wafer. Electrically conductive fillings are contained within the through-passages and are connected to the network of electrical connections. Interior dielectric layers for anti-diffusion protection are provided in the through-passages between the electrically conductive fillings and the semiconductor portions. Back side dielectric layers are joined to the interior dielectric layers.Type: ApplicationFiled: December 21, 2020Publication date: April 15, 2021Applicant: STMicroelectronics (Crolles 2) SASInventors: Francois ROY, Sonarith CHHUN
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Publication number: 20210111133Abstract: An electronic chip includes a substrate made of semiconductor material. Conductive pads are located on a front side of the substrate and cavities extend into the substrate from a backside of the substrate. Each cavity reaches an associated conductive pad. Protrusions are disposed on the backside of the substrate. A conductive layer covers the walls and bottoms of the cavities. The conductive layer includes portions on the backside, each portion partially located on an associated protrusion and electrically connecting two of the conductive pads.Type: ApplicationFiled: December 22, 2020Publication date: April 15, 2021Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Crolles 2) SASInventor: Sebastien Petitdidier
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Publication number: 20210111215Abstract: An electronic device includes a substrate semiconductor wafer with semiconductor portions separated from one another by through-passages. Electronic circuits and a dielectric layer with a network of electrical connections are formed at a front face of the substrate semiconductor wafer. Electrically conductive fillings are contained within the through-passages and are connected to the network of electrical connections. Interior dielectric layers for anti-diffusion protection are provided in the through-passages between the electrically conductive fillings and the semiconductor portions. Back side dielectric layers are joined to the interior dielectric layers.Type: ApplicationFiled: December 21, 2020Publication date: April 15, 2021Applicant: STMicroelectronics (Crolles 2) SASInventors: Francois ROY, Sonarith CHHUN
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Publication number: 20210110852Abstract: A quantizer generates a thermometer coded signal from an analog voltage signal. Data weighted averaging (DWA) of the thermometer coded signal is accomplished by controlling the operation of a crossbar switch controlled by a switch control signal to generate an output DWA signal. The output DWA signal is latched to generate a latched output DWA signal which is processed along with bits of the thermometer coded input signal in feedback loop to generate the switch control signal. The latching of the output DWA signal is performed in an input register of a digital-to-analog converter which operates to convert the latched output DWA signal to a feedback analog voltage from which the analog voltage signal is generated. The switch control signal specifies a bit location for a beginning logic transition of the output DWA signal cycle based on detection of an ending logic transition of the latched DWA signal.Type: ApplicationFiled: September 9, 2020Publication date: April 15, 2021Applicant: STMicroelectronics International N.V.Inventors: Ankur BAL, Rupesh SINGH, Vivek TRIPATHI
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Patent number: 10978146Abstract: A phase-change memory device, comprising: a memory array of PCM cells, a variable current generator, and a sense amplifier. The current generator comprises a reference array of PCM cells programmed in SET resistance state. The phase-change memory device further comprises a decoder for addressing each cell of the reference array so that a respective plurality of SET current signals is generated through the plurality of reference cells; and a controller configured to receive at input said SET current signals, select a number of SET current signals having the lowest current values among the plurality of SET current signals, calculate a mean value of said lowest current values, and adjust the reference current to be lower than said mean value.Type: GrantFiled: October 24, 2019Date of Patent: April 13, 2021Assignee: STMicroelectronics S.r.l.Inventors: Marco Pasotti, Riccardo Zurla, Alessandro Cabrini, Guido Torelli, Flavio Giovanni Volpe
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Patent number: 10979063Abstract: An electronic circuit comprises capacitive structures that are connected to one or a plurality of nodes, where each of the capacitive structures is formed by a capacitor or by a plurality of capacitors electrically connected in parallel. The electronic circuit further comprises additional capacitors that are each connected to the one or plurality of nodes. For at least one distance between capacitors, the capacitive structures have a same average of values defined, for each capacitor of each capacitive structure, by the number of capacitors of the circuit connected to the one or plurality of nodes and located at the distance from the capacitor of the capacitive structure.Type: GrantFiled: April 29, 2020Date of Patent: April 13, 2021Assignee: STMicroelectronics (Grenoble 2) SASInventors: Sandrine Nicolas, Damien Giot, Serge Ramet, Reiner Welk
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Patent number: 10978340Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.Type: GrantFiled: April 15, 2019Date of Patent: April 13, 2021Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Didier Dutartre, Jean-Pierre Carrere, Jean-Luc Huguenin, Clement Pribat, Sarah Kuster
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Patent number: 10978910Abstract: A contactless card is powered by an antenna connected to the input of a rectifier. An output of the rectifier is coupled to a processing unit that consumes a first current output from the rectifier. A current regulation circuit is connected to the output of the rectifier. The current regulation circuit operates to absorb a second current from the output of the rectifier such that a sum of the first and second currents is a constant current.Type: GrantFiled: August 20, 2019Date of Patent: April 13, 2021Assignee: STMicroelectronics SAInventor: Julien Goulier
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Patent number: 10979329Abstract: A method for monitoring an activity of a connected object including a monitoring device, includes: performing, by a measurement stage of the monitoring device, a first periodic measurement of an internal signal representative of an activity of the connected object; performing, by a computation stage of the monitoring device, a first non-cryptographic computation of an activity parameter representative of the activity from the internal signal measured during the first periodic measurement; comparing, by a comparison stage of the monitoring device, between the activity parameter on completion of the first non-cryptographic computation and a range of settings of corresponding to the activity parameter; and triggering, by a control stage of the monitoring device, a safety action in response to a determination that the activity parameter is outside of the range of settings.Type: GrantFiled: November 7, 2018Date of Patent: April 13, 2021Assignee: STMicroelectronics (GRAND OUEST) SASInventor: Frederic Ruelle
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Patent number: 10976150Abstract: A computing system includes a first hardware element having a first accelerometer and a first gyroscope, and a second hardware element having a second accelerometer and a second gyroscope. The first and second hardware elements are moveable with respect to each other. The computing system recursively generates a result signal indicative of a relative orientation of the first and second hardware elements with respect to each other. The result signal may be generated by generating a first intermediate signal indicative of a angle between the first and second hardware elements based on signals generated by the first and second accelerometers and generating a second intermediate signal indicative of the angle based on signals generated by the first and second gyroscopes. The result signal indicative of the angle may be generated as a weighted sum of the first intermediate signal and the second intermediate signal. At least one of the first and second hardware elements is controlled by on the result signal.Type: GrantFiled: May 23, 2018Date of Patent: April 13, 2021Assignee: STMicroelectronics S.r.l.Inventors: Alberto Zancanato, Michele Ferraina, Federico Rizzardini, Stefano Paolo Rivolta
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Patent number: 10978606Abstract: The present disclosure relates to an avalanche diode including at least one PN junction; at least one depletion structure located adjacent to the PN junction and configured to form a depletion region; and at least two electrodes to polarize the at least one PN junction.Type: GrantFiled: October 11, 2018Date of Patent: April 13, 2021Assignee: STMicroelectronics (Research & Development) LimitedInventor: Laurence Stark
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Patent number: 10979805Abstract: A method and apparatus for auto-directive adaptive beamforming for a microphone array using microelectromechanical systems (MEMS) sensor orientation information are provided. The microphone array captures audio and the MEMS sensor detects an orientation of the microphone array. A direction of arrival of a source signal is estimated based on the data representative of the audio. A change in an orientation of the microphone array is detected based on the orientation and the direction of arrival is compensates based on the change in the orientation of the microphone array. The apparatus pre-steers a beam of a beam pattern of the microphone array based on the compensated direction of arrival to retain the source signal in a broadside of the microphone array and performs adaptive wideband beamforming to null one or more interfering sources in the beam pattern while retaining the source signal in the broadside of the microphone array.Type: GrantFiled: December 28, 2018Date of Patent: April 13, 2021Assignees: STMicroelectronics, Inc., STMicroelectronics International N.V.Inventors: Mahesh Chowdhary, Prasanth Logaraman, Arun Kumar, Rajendar Bahl
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Publication number: 20210105427Abstract: The present disclosure relates to a device that includes a photodiode having a first terminal that is coupled by a resistor to a first rail configured to receive a high supply potential and a second terminal that is coupled by a switch to a second rail configured to receive a reference potential. A read circuit is configured to provide a pulse when the photodiode enters into avalanche, and a control circuit is configured to control an opening of the switch in response to a beginning of the pulse and to control a closing of the switch in response to an end of the pulse.Type: ApplicationFiled: October 5, 2020Publication date: April 8, 2021Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Research & Development) LimitedInventors: Raul Andres BIANCHI, Matteo Maria VIGNETTI, Bruce RAE
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Publication number: 20210105874Abstract: A LED driving circuit includes a power factor correction circuit receiving a rectified mains voltage and providing output to a DC voltage bus, a string of LEDs connected in series, a voltage converter receiving input from the DC voltage bus and providing output to the string of LEDs, and a microcontroller. The microcontroller receives a plurality of digital feedback signals from the voltage converter, controls the voltage converter based upon a user desired brightness level and the plurality of digital feedback signals, and receive a plurality of feedback signals from the power factor correction circuit. Based on the plurality of feedback signals, the microcontroller operates the power factor correction circuit in transition mode where the user desired brightness level is above a threshold brightness, and operates the power factor correction circuit in discontinuous mode where the user desired brightness level is below the threshold brightness.Type: ApplicationFiled: December 14, 2020Publication date: April 8, 2021Applicant: STMicroelectronics International N.V.Inventor: Akshat JAIN
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Publication number: 20210104457Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.Type: ApplicationFiled: October 6, 2020Publication date: April 8, 2021Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: David AUCHERE, Claire LAPORTE, Deborah COGONI, Laurent SCHWARTZ
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Publication number: 20210103788Abstract: A first element and a second element of a same device communicate with each other. The first element sends the second element a first piece of information representative of energy supplied by an electromagnetic field supplying power the device. The second element adapts its operating frequency as a function of the first piece of information.Type: ApplicationFiled: September 22, 2020Publication date: April 8, 2021Applicant: STMicroelectronics (Rousset) SASInventor: Julien MERCIER
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Patent number: 10971578Abstract: The disclosure concerns a capacitive component including a trench and, vertically in line with the trench, first portions of a first silicon oxide layer and first portions of second and third conductive layers including polysilicon or amorphous silicon, the first portion of the first layer being between and in contact with the first portions of the second and third layers.Type: GrantFiled: October 8, 2019Date of Patent: April 6, 2021Assignee: STMicroelectronics (Rousset) SASInventors: Abderrezak Marzaki, Pascal Fornara
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Patent number: 10971489Abstract: An integrated circuit includes a power supply terminal, a reference terminal, and a signal terminal. A first protection device is coupled between the signal terminal and the power supply terminal, the first protection device including a first MOS transistor. A second protection device is coupled between the signal terminal and the reference terminal, the second protection device including a second MOS transistor. Gates of the MOS transistors are directly or indirectly coupled to the reference terminal. Substrates of the MOS transistors are coupled to the reference terminal via a common resistor.Type: GrantFiled: May 8, 2019Date of Patent: April 6, 2021Assignee: STMicroelectronics SAInventor: Johan Bourgeat
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Publication number: 20210098512Abstract: An imaging sensor includes a pixel array containing photodiodes, the photodiodes being isolated from one another by full thickness deep trench isolations. Row control circuitry controls which rows of the pixel array operate in an imaging mode and which rows of the pixel array operate in an energy harvesting mode, on a row by row basis. Switch circuitry selectively connects different groups of photodiodes in rows operating in the energy harvesting mode into forward biased series configurations between a voltage output line and a ground line, or into forward biased parallel configurations between the voltage output line and the ground line.Type: ApplicationFiled: September 26, 2019Publication date: April 1, 2021Applicant: STMicroelectronics (Research & Development) LimitedInventors: Filip KAKLIN, Jeffrey M. RAYNOR