Patents Assigned to STMicroelectronics (Crolles 2)
  • Publication number: 20200363629
    Abstract: A MEMS micromirror device includes a monolithic body of semiconductor material having a first main surface and a second main surface, with the monolithic body having an opening extending from the second main surface and including a suspended membrane of monocrystalline semiconductor material extending between the opening and the first main surface of the monolithic body. The suspended membrane includes a supporting frame and a mobile mass carried by the supporting frame and rotatable about an axis parallel to the first main surface, with the mobile mass having a width less than a width of the opening. A reflecting region extends over the mobile mass.
    Type: Application
    Filed: August 5, 2020
    Publication date: November 19, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Enri DUQI, Lorenzo BALDO, Roberto CARMINATI, Flavio Francesco VILLA
  • Publication number: 20200365528
    Abstract: A semiconductor substrate has a front face and a back face. A first contact and a second contact, spaced apart from each other, are located on the front face. An electrically conductive wafer is located on the back face. A detection circuit is configured to detect a thinning of the substrate from the back face. The detection circuit including a measurement circuit that takes a measurement of a resistive value of the substrate between said at least one first contact, said at least one second contact and said electrically conductive wafer. Thinning is detected in response to the measured resistive value.
    Type: Application
    Filed: May 12, 2020
    Publication date: November 19, 2020
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Alexandre SARAFIANOS, Fabrice MARINET, Julien DELALLEAU
  • Publication number: 20200366190
    Abstract: A circuit includes a transistor, with a resonant tank coupled between a DC supply node and a first conduction terminal of the transistor. A gate driver generates a gate drive signal for biasing a control terminal of the transistor to cause it to conduct current through the resonant tank. Control circuitry monitors a voltage across the transistor to determine that the transistor is an overvoltage condition if that voltage exceeds a threshold, and monitors a current through the transistor to determine that the transistor is an overcurrent condition if that current exceeds a threshold. If overvoltage is determined, the control circuitry causes the gate driver to pull up the gate drive signal. If overcurrent is determined, the control circuitry causes the gate driver to pull down the gate drive signal. If either overvoltage or overcurrent is present, a pulse width of the gate drive signal is reduced.
    Type: Application
    Filed: August 4, 2020
    Publication date: November 19, 2020
    Applicant: STMicroelectronics International N.V.
    Inventor: Akshat JAIN
  • Publication number: 20200363952
    Abstract: A data frame in a touch capacitive sensing circuit includes both mutual capacitance data and self capacitance data. The mutual capacitance data and self capacitance data of the frame are filtered to define mutual capacitance and self capacitance islands. Centroids of the mutual capacitance and self capacitance islands are calculated and then processed in a weighted mixing operation to produce a hybrid centroid that more accurately locates the coordinates of a detected touch/hover.
    Type: Application
    Filed: August 4, 2020
    Publication date: November 19, 2020
    Applicant: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Youngjin WANG, Tae-gil KANG
  • Publication number: 20200366296
    Abstract: A circuit includes a current controlled oscillator (CCO), and a charge pump circuit boosting a supply voltage to produce a charge pump output voltage at a charge pump output node in response to output from the CCO. A current sensing circuit includes a first resistor coupled between the charge pump output node and an output node, a first transistor having a first conduction terminal coupled to the charge pump output node through a second resistor, and a second conduction terminal coupled to an input of the CCO. A second transistor has a first conduction terminal coupled to the output node, a second conduction terminal coupled to a reference current source, and a control terminal coupled to the control terminal of the first transistor and to the second conduction terminal of the second transistor.
    Type: Application
    Filed: August 7, 2020
    Publication date: November 19, 2020
    Applicant: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor PETENYI
  • Patent number: 10839177
    Abstract: An electromagnetic interposer circuit is attachable to an article that is also equipped with an anti-counterfeit and anti-theft/tracking electromagnetic marker. The interposer circuit includes a first interface for exchanging electrical signals with the marker at a first, shorter, communication range and a second interface coupled to the first interface for exchanging electromagnetic signals with a reader at a second, longer, communication range. The first and second interfaces exchange signals with the marker and the reader, respectively, over a radiofrequency bandwidth that includes a first frequency band and a second frequency band. A filter circuit block within the interposer circuit between the first interface and the second interface operates to block the transfer of signals between the first interface and the second interface over the first frequency band.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: November 17, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Finocchiaro, Giovanni Girlando
  • Patent number: 10839537
    Abstract: A camera module with a fixed near field focus is configured to capture a single image. That single image is segmented by an image divider a number of regions. A focus metric determiner then determines a focus metric for each of the regions. A depth map generator maps the focus metric into a depth value for each of the regions and combines the depth values to generate a depth map.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: November 17, 2020
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: Duncan Hall
  • Patent number: 10841074
    Abstract: A transponder communicates with a reader using active load modulation. The transponder includes a digital phase locked loop (DPLL), which, in operation, generates an active load modulation (ALM) carrier clock synchronized to carrier clock of the reader. Between transmission of data frames, the DPLL is placed in a lock mode of operation in which a feedback loop of the DPLL is closed. Within a transmitted data frame having a duration, the DPLL is placed, for the duration of the transmitted data frame, in a hold mode of operation in which the feedback loop is opened. A phase of the ALM carrier clock is adjusted at least once during the duration of the transmitted data frame.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: November 17, 2020
    Assignees: STMicroelectronics SA, STMicroelectronics Razvoj Polprevodnikov d.o.o.
    Inventors: Maksimiljan Stiglic, Nejc Suhadolnik, Marc Houdebine
  • Patent number: 10838196
    Abstract: A method for controlling operation of a MEMS mirror includes steps for: generating activation pulses for operating the MEMS mirror and generating a window activation signal for current detection, with the window activation signal overlapping with an end of an activation pulse. The method also includes detecting current through a stator or a rotor of the MEMS mirror during the window activation signal and terminating a current activation pulse and the window activation signal in response to detecting a change in the direction of the current through the stator or the rotor of the MEMS mirror during the window activation signal.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: November 17, 2020
    Assignee: STMicroelectronics Ltd
    Inventor: Sason Sourani
  • Patent number: 10840915
    Abstract: A method of quickly locking a locked loop includes generating an intermediate reference signal having an intermediate reference frequency between a desired output frequency and a reference frequency of a reference signal, and setting an output frequency of a controllable oscillator to the desired output frequency using a first locked loop having a first loop divider value. The first loop divider value is set such that the intermediate reference frequency multiplied by the first loop divider value is equal to the desired output frequency. The controllable oscillator is then coupled to a second locked loop when the first locked loop locks, with the second locked loop is being activated. The first locked loop is then deactivated.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: November 17, 2020
    Assignee: STMicroelectronics International N.V.
    Inventors: Nitin Gupta, Jeet Narayan Tiwari
  • Publication number: 20200357902
    Abstract: A BiMOS-type transistor includes a gate region, a channel under the gate region, a first channel contact region and a second channel contact region. The first channel contact region is electrically coupled to the gate region to receive a first potential. The second channel contact region is electrically coupled to receive a second potential.
    Type: Application
    Filed: May 8, 2020
    Publication date: November 12, 2020
    Applicant: STMicroelectronics SA
    Inventors: Philippe GALY, Louise DE CONTI
  • Publication number: 20200356125
    Abstract: A voltage regulator includes two input pairs of opposite type transistors, p-type and n-type, to provide a soft-start functionality for gradually increasing the voltage regulator's output voltage from zero, or a voltage below the thresholds of the n-type transistors, to an operational voltage. The voltage regulator operates in a soft-start mode during which a variable input voltage signal is ramped up to allow the output voltage to reach the operational voltage, and a normal-operation mode during which the operational voltage is maintained.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 12, 2020
    Applicant: STMicroelectronics (China) Investment Co. Ltd
    Inventors: Zhenghao CUI, Fei Wang, Ming Jiang
  • Publication number: 20200357788
    Abstract: An electronic circuit includes a first electronic component formed above a buried insulating layer of a substrate and a second electronic component formed under the buried insulating layer. The insulating layer is thoroughly crossed by a semiconductor well. The semiconductor well electrically couples a terminal of the first electronic component to a terminal of the second electronic component.
    Type: Application
    Filed: May 8, 2020
    Publication date: November 12, 2020
    Applicant: STMicroelectronics SA
    Inventors: Louise DE CONTI, Philippe GALY
  • Publication number: 20200356127
    Abstract: A current mirror includes first and second transistors having current paths coupled to an input current line. The current paths for the first and second transistors are referenced to ground via respective first and second resistors having resistance values twice a first resistance value. The first transistor is diode connected. A third transistor has a current path coupled to an output current line and referenced to ground via a third resistor having a second resistance value equal to the first resistance value divided by a mirror factor. Control terminals of the first and third transistors are coupled together, and further coupled to a control terminal of the second transistor through a coupling resistor. A first capacitor is coupled between ground and the control terminal of the second transistor unit. A second capacitor is coupled between ground and the current path through the third transistor.
    Type: Application
    Filed: May 7, 2020
    Publication date: November 12, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Germano NICOLLINI, Stefano POLESEL
  • Patent number: 10830955
    Abstract: A photonic interconnect switch is formed by first and second linear optical waveguides that cross to form an intersection. First and second redirecting photonic ring resonators are coupled together in an intermediate optical coupling zone and are controllable with an electrical signal. The first ring resonator is coupled to the first optical waveguide in a first optical coupling zone. The second ring resonator is coupled to the second optical waveguide in a second optical coupling zone.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: November 10, 2020
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Nicolas Michit, Patrick Le Maitre
  • Patent number: 10833094
    Abstract: An integrated circuit includes a high-voltage MOS (HV) transistor and a capacitor supported by a semiconductor substrate. A gate stack of the HV transistor includes a first insulating layer over the semiconductor layer and a gate electrode formed from a first polysilicon. The capacitor includes a first electrode made of the first polysilicon and a second electrode made of a second polysilicon and at least partly resting over the first electrode. A first polysilicon layer deposited over the semiconductor substrate is patterned to form the first polysilicon of the gate electrode and first electrode, respectively. A second polysilicon layer deposited over the semiconductor substrate is patterned to form the second polysilicon of the second electrode. Silicon oxide spacers laterally border the second electrode and the gate stack of the HV transistor. Silicon nitride spacers border the silicon oxide spacers.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: November 10, 2020
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Fausto Piazza, Sebastien Lagrasta, Raul Andres Bianchi, Simon Jeannot
  • Patent number: 10833208
    Abstract: A cover for an electronic package is manufactured by placing an optical insert, having opposite faces and configured to allow light radiation to pass therethrough, between two opposite faces of a cavity of a mold in a position such that said optical faces of the optical insert make contact with said opposite faces of the cavity of the mold. A coating material is injected into the cavity and around the optical insert. The coating material is set to obtain a substrate that is overmolded around the optical insert so as to produce the cover. An electronic package includes an electronic chip mounted to a support substrate with the cover formed by the overmolded substrate mounted to the support substrate.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: November 10, 2020
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Karine Saxod, Alexandre Mas, Eric Saugier, Gaetan Lobascio, Benoit Besancon
  • Publication number: 20200350455
    Abstract: A transmit integrated circuit includes a light source configured to generate a beam of light. A receive integrated circuit includes a first photosensor. A transmit optic is mounted over the transmit and receive integrated circuits. The transmit optic is formed by a prismatic light guide and is configured to receive the beam of light. An annular body region of the transmit optic surrounds a central opening which is aligned with the first photosensor. The annular body region includes a first reflective surface defining the central opening and further includes a ring-shaped light output surface surrounding the central opening. Light is output from the ring-shaped light output surface in response to light which propagates within the prismatic light guide in response to the received beam of light and which reflects off the first reflective surface.
    Type: Application
    Filed: May 2, 2019
    Publication date: November 5, 2020
    Applicant: STMicroelectronics (Research & Development) Limited
    Inventors: Thineshwaran GOPAL KRISHNAN, Roy DUFFY
  • Publication number: 20200350781
    Abstract: A radiofrequency-powered device such as a wireless passive sensor node, for instance, comprises a radiofrequency energy harvesting circuit configured to be coupled to an antenna to harvest radiofrequency energy captured by the antenna from a radiofrequency signal. The radiofrequency energy harvesting circuit is configured to be coupled to an energy storage component to store therein energy harvested via the radiofrequency energy harvesting circuit. The device comprises user circuitry configured to be supplied with energy harvested via the radiofrequency energy harvesting circuit and to operate in accordance with one of a plurality of configurations as a function of configuration data supplied thereto. A receiver circuit coupled to the radiofrequency energy harvesting circuit is configured to receive a configuration data signal modulating the radiofrequency signal and supply to the user circuitry configuration data extracted from the configuration data signal received.
    Type: Application
    Filed: April 30, 2020
    Publication date: November 5, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Roberto LA ROSA, Alessandro FINOCCHIARO
  • Publication number: 20200350355
    Abstract: The present disclosure relates to an image sensor that includes first and second pixels. One or more transistors of the first pixel share an active region with one or more transistors of the second pixel.
    Type: Application
    Filed: April 29, 2020
    Publication date: November 5, 2020
    Applicants: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMicroelectronics (Crolles 2) SAS
    Inventors: Jeff M. RAYNOR, Frederic LALANNE, Pierre MALINGE