Abstract: A MOS transistor is produced on and in an active zone and included a source region and a drain region. The active zone has a width measured transversely to a source-drain direction. A conductive gate region of the MOS transistor includes a central zone and, at a foot of the central zone, at least one stair that extends beyond the central zone along at least an entirety of the width of the active zone.

Abstract: A delay line includes a delay chain, a pulse generator generating a pulse based on a received input signal, and a delay chain control circuit. The delay chain control circuit has a first input receiving the pulse, a second input receiving output from a last element of the delay chain, and a selection input receiving a delayed version of the received input signal. The delay chain control circuit has an output coupled to provide input to a first element of the delay chain in response to the delayed version of the received input signal. An output selection circuit receives outputs from each element of the delay chain, counts assertions of the output of the last element of the delay chain and, in response to the count being equal to a desired count, passes a desired one of the outputs of the elements of the delay chain as output.

Abstract: A digital integrated circuit includes first areas of a substrate which incorporate digital functions and second areas of the substrate which are filler between first areas. A capacitance is provided by interdigitated metal-insulator-metal structures formed from a metallization level above the substrate. The structures of the capacitance are vertically aligned with one or more of the second areas.

Abstract: The invention concerns a device including: first and second detectors of the phase and/or of the frequency of an input signal with respect to first and second reference signals; and a Sigma/Delta converter interpreting outputs of the first or of the second phase and/or frequency detector to determine a propagation time of the input signal.

Abstract: An optical emission circuit includes a power supply source and a regulation circuit coupled to control the power supply source. An optical source and a first switch are coupled in series to the power supply source. A square pulse signal source has an output coupled to a control input of the first switch. The square pulse signal source is configured to provide a square pulse signal. The regulation circuit regulates the current supplied by the power supply source according to a product of a peak current set point by a duty cycle of the square pulse signal.

Abstract: A standard integrated cell includes a semiconductor region with a functional domain for logic circuits including a transistor and an adjacent continuity domain that extends out to an edge of the standard integrated cell. The edge is configured to be adjacent to another continuity domain of another standard integrated cell. The standard integrated cell further includes a capacitive element. This capacitive element may be housed in the continuity domain, for example at or near the edge. Alternatively, the capacitive element may be housed at a location which extends around a substrate region of the transistor.

Abstract: A LED driving circuit includes a power factor correction circuit receiving a rectified mains voltage and providing output to a DC voltage bus, a string of LEDs connected in series, a voltage converter receiving input from the DC voltage bus and providing output to the string of LEDs, and a microcontroller. The microcontroller receives a plurality of digital feedback signals from the voltage converter, controls the voltage converter based upon a user desired brightness level and the plurality of digital feedback signals, and receive a plurality of feedback signals from the power factor correction circuit. Based on the plurality of feedback signals, the microcontroller operates the power factor correction circuit in transition mode where the user desired brightness level is above a threshold brightness, and operates the power factor correction circuit in discontinuous mode where the user desired brightness level is below the threshold brightness.

Abstract: Atoms are implanted in a semiconductor region at a higher concentration in a peripheral part of the semiconductor region than in a central part of the semiconductor region. A metallic region is then formed to cover the semiconductor region. A heat treatment is the performed to form an intermetallic region from the metallic region and the semiconductor region.

Abstract: A voltage controlled oscillator (VCO) circuit generates an output signal having a frequency which is dependent on a control voltage. A current is generated which is itself dependent on an amplitude of the VCO circuit. The generated current accordingly tracks, to an extent, the temperature behavior of the oscillator within the VCO circuit. The oscillator is driven by the sum of the generated current and a control current dependent on the control voltage. The control voltage may, for example, be generated by a phase lock loop (PLL).

Abstract: A sigma-delta modulator includes an N-bit quantization circuit that generates a stream of N-bit code words and a feedback signal path with an N-bit DAC circuit, having a non-ideal operation due to mismatch error, that converts the stream of N-bit code words to generate a feedback signal. A digital DAC copy circuit provides a digital replication of the N-bit DAC circuit. The digital replication accounts for the non-ideal operation of the N-bit DAC circuit 126 due to mismatch error, and converts the stream of N-bit code words to generate a stream of P-bit code words, where P>N, that are functionally equivalent to the feedback signal output from the N-bit DAC circuit.

Abstract: An electronic device includes laser emitters, and a laser driver generating a laser drive signal for the laser emitters based upon a feedback control signal. A steering circuit selectively steers the laser drive signal to a different selected one of the plurality of laser emitters and prevents the laser drive signal from being steered to non-selected ones of the plurality of laser emitters, during each of a plurality of time periods. Control circuitry senses a magnitude of a current of the laser drive signal and generates the feedback control signal based thereupon. The feedback control signal is generated so as to cause the laser driver to generate the laser drive signal as having a current with a substantially constant magnitude.

Abstract: A ranging system includes a first ranging unit with a first laser driver, a first control circuit generating a first trigger signal, and a first data interface with a first trigger transmitter transmitting the first trigger signal over a first data transmission line and a first calibration receiver receiving a first calibration signal over a second data transmission line. A second ranging unit includes a second laser driver, a second data interface with a second trigger receiver receiving the first trigger signal and a second calibration transmitter transmitting the first calibration signal, and a second control circuit generating the first calibration signal in response to receipt of the first trigger signal. The first control circuit determines an elapsed time between transmission of the first trigger signal and receipt of the first calibration signal. The determined elapsed time is used to synchronize activation of the first and second laser drivers.

Abstract: A switched-mode power converter device includes an inductive element coupling a first node receiving an input voltage to a second node. A first transistor couples the second node to a third node generating an output voltage. A control circuit includes a first switch coupling the third node to a control terminal of the first transistor.

Abstract: A MEMS resonator system has a micromechanical resonant structure and an electronic processing circuit including a first resonant loop that excites a first vibrational mode of the structure and generates a first signal at a first resonance frequency. A compensation module compensates, as a function of a measurement of temperature variation, a first variation of the first resonance frequency caused by the temperature variation to generate a clock signal at a desired frequency that is stable relative to temperature. The electronic processing circuit further includes a second resonant loop, which excites a second vibrational mode of the structure and generates a second signal at a second resonance frequency. A temperature-sensing module receives the first and second signals and generates the measurement of temperature variation as a function of the first variation of the first resonance frequency and a second variation of the second resonance frequency caused by the temperature variation.

Abstract: A CAN device is provided with an encryption function and a decryption function. The encryption function allows messages to be encrypted and put onto a CAN bus. The decryption function allows the messages on the CAN bus to be decrypted. The encryption and decryption functions share keys which change over the course of time.

Abstract: In one embodiment, an inductive/LC sensor device includes: an energy storage device for accumulating excitation energy, an LC sensor configured to oscillate using energy accumulated in the energy storage device and transferred to the LC sensor, an energy detector for detecting the energy accumulated in the energy storage device reaching a charge threshold, and at least one switch coupled with the energy detector for terminating accumulating excitation energy in the energy storage device when the charge threshold is detected having been reached by the energy detector.

Abstract: A controller chip includes processing circuitry configured to process received samples by estimating trend functions from the samples, subtracting the trend functions from the samples to produce de-trended samples, performing a mathematical transform on the de-trended samples to produce frequency bins. The frequency bins may correspond to unwanted resonance movement of a movable mirror associated with the received samples. The processing circuit further generates an error function from the frequency bins. The error function can be used to generate correction signals for the movable mirror that serve to minimize the error function.

Abstract: An integrated circuit includes a semiconductor substrate and a multitude of electrically conductive pads situated between component zones of the semiconductor substrate and a first metallization level of the integrated circuit, respectively. The multitude of electrically conductive pads are encapsulated in an insulating region and include: first pads, in electrical contact with corresponding first component zones, and at least one second pad, not in electrical contact with a corresponding second component zone.

Abstract: A semiconductor substrate doped with a first doping type is positioned adjacent an insulated gate electrode that is biased by a gate voltage. A first region within the semiconductor substrate is doped with the first doping type and biased with a bias voltage. A second region within the semiconductor substrate is doped with a second doping type that is opposite the first doping type. Voltage application produces an electrostatic field within the semiconductor substrate causing the formation of a fully depleted region within the semiconductor substrate. The fully depleted region responds to absorption of a photon with an avalanche multiplication that produces charges that are collected at the first and second regions.

Abstract: A signal generation circuit generates first and second non-overlapping digital signals from an input pulse signal. A first digital circuit includes: a first logical OR gate receiving the second digital signal and the input pulse signal to generate a third digital signal; and a second logical OR gate receiving the input pulse signal and a delayed version of the third digital signal to generate the first digital signal. A second digital circuit includes: a first logical AND gate receiving the first digital signal and the input pulse signal to generate a fourth digital signal; and a second logical AND gate receiving the input pulse signal and the fourth digital signal to generate the second digital signal.