Abstract: An electronic device includes a switched-mode power supply having a first operating phase during which the output node of the switched-mode power supply is coupled by an on switch to a source of a first reference voltage. The first operating phase is followed by a second operation phase during which the output node of the switched-mode power supply is in a high impedance state. While in the second operating phase, a capacitor connected to the output node of the switched-mode power supply at least partially discharges into a load.

Abstract: A semiconductor substrate doped with a first doping type is positioned adjacent an insulated gate electrode that is biased by a gate voltage. A first region within the semiconductor substrate is doped with the first doping type and biased with a bias voltage. A second region within the semiconductor substrate is doped with a second doping type that is opposite the first doping type. Voltage application produces an electrostatic field within the semiconductor substrate causing the formation of a fully depleted region within the semiconductor substrate. The fully depleted region responds to absorption of a photon with an avalanche multiplication that produces charges that are collected at the first and second regions.

Abstract: An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.

Abstract: A memory includes error correction circuitry that receives a data packet, outputs a correctable error flag indicating presence or absence of a correctable error in the data packet, and outputs an uncorrectable error flag indicating presence or absence of an uncorrectable error in the data packet. A response manager, operating in availability mode, generates output indicating that a correctable error was present if the correctable error flag indicates presence thereof, and generates an output indicating that an uncorrectable error was present if the uncorrectable error flag indicates presence thereof. In a coverage mode, the response manager generates an output indicating that a correctable error was potentially present but should be treated as an uncorrectable error if the correctable error flag indicates presence of the correctable error, and generates an output indicating that an uncorrectable error was present if the uncorrectable error flag indicates presence thereof.

Abstract: An integrated transistor in the form of a nanoscale electromechanical switch eliminates CMOS current leakage and increases switching speed. The nanoscale electromechanical switch features a semiconducting cantilever that extends from a portion of the substrate into a cavity. The cantilever flexes in response to a voltage applied to the transistor gate thus forming a conducting channel underneath the gate. When the device is off, the cantilever returns to its resting position. Such motion of the cantilever breaks the circuit, restoring a void underneath the gate that blocks current flow, thus solving the problem of leakage. Fabrication of the nano-electromechanical switch is compatible with existing CMOS transistor fabrication processes. By doping the cantilever and using a back bias and a metallic cantilever tip, sensitivity of the switch can be further improved. A footprint of the nano-electromechanical switch can be as small as 0.1×0.1 ?m2.

Abstract: A circuit includes a frequency detector generating a comparison signal as a function of a comparison between a reference signal and a feedback signal. An oscillator generates an output signal as a function of the comparison signal. A frequency divider, in operation, divides the output signal by a division value to produce the feedback signal as having a frequency that is a multiple of a frequency of the reference signal. A frequency counter circuit measures the frequency of the reference signal and generates a count signal based thereupon. A control circuit adjusts the division value used by the frequency divider, in operation, based upon the count signal.

Abstract: An integrated optoelectronic or optical device is formed by a polarization-splitting grating coupler including two optical waveguides, a common optical coupler and flared optical transitions between the optical coupler and the optical waveguides. The optical coupler is configured for supporting input/output of optical waves. A first region of the optical coupler lies at a distance from the flared optical transitions. The first region includes a first recessed pattern. Second regions of the optical coupler lie between the first region and the flared optical transitions, respectively, in an adjoining relationship. The second regions include a second recessed pattern different from the first recessed pattern.

Abstract: A first independent unit includes a support substrate with an integrated network of electrical connections. An electronic integrated circuit chip is mounted above a front face of the support substrate. A second independent unit includes a dielectric support. The second independent unit is stacked above the first independent unit on a side of the front face of the first independent unit. An electromagnetic antenna includes an exciter element and a resonator element. The exciter element provided at the support substrate. The resonator element is provided at the dielectric support.

Abstract: A support substrate has a mounting face with a metal heat transfer layer. Holes are provided to extend at least partially through the metal heat transfer layer. Metal heat transfer elements are disposed in the holes of the metal heat transfer layer of the support substrate. An electronic integrated circuit (IC) chip has a rear face that is fixed to the mounting face of the support substrate via a layer of adhesive material. The metal heat transfer elements disposed in the holes of the metal layer of the support substrate extend to protrude, relative to the mounting face of the support substrate, into the layer of adhesive material.

Abstract: A phase-change memory cell is formed by a heater, a crystalline layer disposed above the heater, and an insulating region surrounding sidewalls of the crystalline layer. The phase-change memory cell supports programming with a least three distinct data levels based on a selective amorphization of the crystalline layer.

Abstract: An interconnection element of an interconnection structure of an integrated circuit is manufactures by a method where a cavity is etched in an insulating layer. A silicon nitride layer is then deposited on walls and a bottom of the cavity. The nitrogen atom concentration in the silicon nitride layer increasing as a distance from an exposed surface of the silicon nitride layer increases. A copper layer is deposited on the silicon nitride layer. The cavity is further filled with copper. A heating process is performed after the deposition of the copper layer, to convert the copper layer and the silicon nitride layer to form a copper silicide layer which has a nitrogen atom concentration gradient corresponding to the gradient of the silicon nitride layer.

Abstract: A circuit includes two thyristors coupled in anti-series. An AC capacitor has first and second electrodes respectively coupled to two different electrodes of the two thyristors. The first and second electrodes are coupled to receive an AC voltage. A control circuit detects discontinuance of application of the AC voltage to the AC capacitor and in response thereto simultaneously applies same gate currents to the two thyristors. A current path through the two thyristors (one passing current in forward mode and the other in reverse mode) discharges a residual voltage stored on the AC capacitor.

Abstract: A touch screen controller identifies an island in a matrix of acquired touch data values. A first sharpness of the island is calculated and a second sharpness of the island is calculated if the calculated first sharpness is greater than a sharpness threshold. A dynamic strength threshold is then determined as a function of the second sharpness if a variance of the island is greater than a dynamic variance threshold. A determination is then made that the identified island is a valid stylus island if a peak strength of the island is greater than the dynamic strength threshold.

Abstract: A method and apparatus for capturing stable images are disclosed. An ambient light sensor makes measurements of ambient light. A change in ambient light between two measurements is determined. If the change in ambient light measurements falls in a predefined range, then the change may be attributable to ambient light sensor being blocked by a user to trigger image capturing. Consequently, a camera is triggered to capture an image. Conversely, if the change in ambient light measurement is outside the range, image capturing is not triggered as the change may be attributable to other factors.

Abstract: A hardware configuration circuit can sequentially read data packets from a non-volatile memory. For a first data packet, the circuit is configured to store the configuration data and the address included in the data packet in the register, select a target configuration data client circuit as a function of the address included in the first data packet, transmit a first data signal that includes the configuration data included in the first data packet to the target configuration data client circuit, receive a second data signal that includes configuration data stored in the target configuration data client circuit and the address associated with the target configuration data client circuit, and compare the configuration data and address received from the target configuration data client circuit with the configuration data and address stored in the register.

Abstract: A piezoelectric transducer includes a semiconductor body with a bottom electrode of conductive material. A piezoelectric element is on the bottom electrode. A first protective layer, on the bottom electrode and the piezoelectric element, has a first opening through which a portion of the piezoelectric element is exposed, and a second opening through which a portion of the bottom electrode is exposed. A conductive layer on the first protective layer and within the first and second openings is patterned to form a top electrode in electrical contact with the piezoelectric element at the first opening, a first biasing stripe in electrical contact with the top electrode, and a second biasing stripe in electrical contact with the bottom electrode at the second opening.

Abstract: Binary data is processed through a differential pre-encoder, which includes a simple modulo-2 addition. This step is used to cancel the propagation error that can be introduced by duo-binary modulation and to simplify demodulation. Next the duo-binary encoder introduces controlled Inter Symbol Interference between a previously sent bit and a present bit to compress the spectral density closer to the DC. Next a 60-GHz carrier is modulated and transmitted over differential transmission lines.

Abstract: A first power supply rail is provided as a power supply tree configured with couplings to distribute a supply voltage to active elements of the circuit. A second power supply rail is provided as an electrostatic discharge channel and is not configured with distribution tree couplings to active elements of the circuit. A first electrostatic discharge circuit is directly electrically connected between one end of the second power supply rail and a ground rail. A second electrostatic discharge circuit is directly electrically connected between an interconnect node and the ground rail. The interconnect node electrically interconnects another end of the second power supply rail to the first power supply rail at the second electrostatic discharge circuit.

Abstract: A MEMS actuator includes a monolithic body of semiconductor material, with a supporting portion of semiconductor material, orientable with respect to a first and second rotation axes, transverse to each other. A first frame of semiconductor material is coupled to the supporting portion through first deformable elements configured to control a rotation of the supporting portion about the first rotation axis. A second frame of semiconductor material is coupled to the first frame by second deformable elements, which are coupled between the first and the second frames and configured to control a rotation of the supporting portion about the second rotation axis. The first and second deformable elements carry respective piezoelectric actuation elements.

Abstract: A microelectromechanical device, in particular a non-volatile memory module or a relay, comprising: a mobile body including a top region and a bottom region; top electrodes facing the top region; and bottom electrodes, facing the bottom region. The mobile body is, in a resting condition, at a distance from the electrodes. The latter can be biased for generating a movement of the mobile body for causing a direct contact of the top region with the top electrodes and, in a different operating condition, a direct contact of the bottom region with the bottom electrodes. In the absence of biasing, molecular-attraction forces maintain in stable mutual contact the top region and the top electrodes or, alternatively, the bottom region and the bottom electrodes.