Abstract: A nonvolatile memory device has a “split-voltage” architecture and includes columns of memory words formed on each row by groups of memory cells. All state transistors for memory cells of a memory word are gate controlled by a control element. All control elements of a same row are controlled by a first control signal generated by a first row control circuit in response to a set-reset (SR) latch output signal output for a selected row. In order to write a piece of data in a memory word, the first row control circuit confers onto the first control signal an erasing voltage corresponding to a first logic state of the first control signal and then a programming voltage corresponding to a second logic state of the first control signal without modifying, between erasing and programming the memory word, the state of the latch output signal for the selected row.

Abstract: The present disclosure is directed to embodiments of a conductive structure on a conductive layer, which may be a conductive damascene layer of a semiconductor device or package. The conductive damascene layer may be within a substrate of the semiconductor device or package. A crevice is present between one or more sidewalls of the conductive structure and one or more sidewalls of one or more insulating layers on the substrate and extends to a surface of the conductive layer. A sealing layer is formed in the crevice that seals the conductive layer from moisture and contaminants external to the semiconductor device or package that may enter the crevice. In other words, the sealing layer stops the moisture and contaminants from reaching the conductive layer such that the conductive layer does not corrode due to exposure to the moisture and contaminants.

Abstract: A wobulated signal generator includes a chain of delay elements and control circuitry. The chain of delay elements includes first delay elements, second delay elements, and third delay elements. The control circuitry, in operation, enables a number of the first delay elements, disables a number of the third delay elements, and enables a selected number of the second delay elements, defining a period of time between two consecutive rising edges of a digital wobulated signal at an output of the wobulated signal generator. The control circuitry monitors an average frequency of the digitally wobulated signal, and selectively modifies the number of enabled first delay elements and the number of disabled third delay elements based on the monitored average frequency of the digitally wobulated signal.

Abstract: System, method, and circuitry for generating content for a programmable computing device based on user-selected memory regions. Contiguous regions that share memory access attributes are merged, interleaved contiguous regions that share at least one nested attribute are defined into combined regions, and remaining regions are defined as separate independent regions. A memory protection unit (MPU) region size closest to a size of each defined region is identified. If the start address of each region aligns with the address structure of the MPU region size, then those regions are assigned to MPU regions having the MPU region size; otherwise, another MPU size that aligns with the size of the regions is selected and those regions are assigned to MPU regions having that size. Content is generated to configure settings of MPU regions of the programmable computing device for the merged contiguous regions, the combined region, and the independent regions.

Abstract: A closed container includes a detection device for detecting opening of or an attempt to open the container. The detection device includes a contactless passive transponder that is configured to communicate with a reader via an antenna using a carrier signal. An integrated circuit of the transponder includes two input terminals connected to the antenna and two output terminals linked by a first electrically conductive wire having a severable part which is severed in the event of an opening of or an attempted opening of the container. A shorting circuit is configured to short-circuit a first output terminal with a first input terminal in the event of a conductive repair of the severed part which forms an electrical connection between the two output terminals.

Abstract: In an embodiment, a voltage multiplier comprises an input node, an output node, and first and second control nodes for receiving first and second clock signals defining two commutation states. An ordered sequence of intermediate nodes is coupled between the input and output nodes and includes two ordered sub-sequences. Capacitors are coupled: between each odd intermediate node in the first sub-sequence and the first control node; between each even intermediate node in the first sub-sequence and the second control node; between each odd intermediate node in the second sub-sequence and a corresponding odd intermediate node in the first sub-sequence; and between each even intermediate node in the second sub-sequence and a corresponding even intermediate node in the first sub-sequence. The circuit comprises selectively conductive electronic components coupled to the intermediate nodes.

Abstract: In a digital communication system, a master device and a number of slave devices are coupled in communication with the master device over a shared data communication bus. A selection line for each one of the slave devices couples the master device with a respective slave device and is dedicated to selection by the master device of the respective slave device for communication over the shared data communication bus. Each of the slave devices is able to send an interrupt request to the master device over the respective selection line to be served by the master device initiating a communication over the shared data communication bus, each selection line thereby being a bidirectional communication line between the respective slave device and the master device.

Abstract: A microelectromechanical device is provided. A vibrating structure gyroscope included in the device employs a temporal differential sensing method alone or a spatial differential sensing method in combination with the temporal differential sensing method. When used in combination, the temporal sensing method may be applied before the spatial sensing method or applied after the spatial sensing method. The temporal differential sensing samples signals at times t1 and t2 when velocity of a sensing mass within the vibrating structure gyroscope is maximum and has an opposite sign. The temporal sensing method improves Euler and Centrifugal forces cancellation and increases the signal to noise ratio if forces remain equal at times t1 and t2. Applying a high sampling speed can result in times t1 and t2 being sufficiently close to each other and therefore cancel any error terms associated with Euler and Centrifugal forces.

Abstract: The present disclosure is directed to leadless semiconductor packages with improved wettable flanks that encourage the formation of solder fillets when the leadless semiconductor package is mounted to a substrate. The solder fillets are consistently formed and are easily detectable by inspection systems, such as automated optical inspection (AOI) systems.

Abstract: Method of manufacturing an electronic device, comprising forming an ohmic contact at an implanted region of a semiconductor body. Forming the ohmic contact provides for performing a high-temperature thermal process for allowing a reaction between a metal material and the material of the semiconductor body, for forming a silicide of the metal material. The step of forming the ohmic contact is performed prior to a step of forming one or more electrical structures which include materials that may be damaged by the high temperature of the thermal process of forming the silicide.

Abstract: An integrated circuit package includes a support substrate and a cover fastened on a first face of the support substrate. The cover and support substrate define a housing containing an electronic integrated circuit chip having a first face equipped with electrically conductive protruding elements. A first space between the cover and a second face of the electronic integrated circuit chip is filled with a first shape memory material in the austenitic state. A second space between each pair of electrically conductive protruding elements and electrically conductive contact pads of the support substrate is filled with a second shape memory material in the austenitic state.

Abstract: A system for measuring cardiac parameters uses a movements sensor to generate a seismocardiographic signal and a cardiac parameters calculation unit. The cardiac parameters calculation unit provides for generating an envelope signal correlated to the seismocardiographic signal; identifies, in the envelope signal, signal segments having a repetitive pattern; identifies, among the signal segments, pairs of successive peaks such that a first peak of each pair of successive peaks is a systolic peak and a second peak of each pair of successive peaks is a diastolic peak; and calculates a systolic period and a diastolic period for each pair of successive peaks.

Abstract: MEMS ultrasonic transducer, MUT, device, comprising a semiconductor body with a first and a second main face, including: a modulation cavity extending into the semiconductor body from the second main face; a membrane body suspended on the modulation cavity and comprising a transduction membrane body and a modulation membrane body; a piezoelectric modulation structure on the modulation membrane body; a transduction cavity extending into the membrane body, the transduction membrane body being suspended on the transduction cavity; and a piezoelectric transduction structure on the transduction membrane body. The modulation membrane body has a first thickness and the transduction membrane body has a second thickness smaller than the first thickness. In use, the modulation membrane vibrates at a first frequency and the transduction membrane vibrates at a second frequency higher than the first frequency, to emit and/or receive acoustic waves at a frequency dependent on the first and the second frequencies.

Abstract: The present description concerns an image sensor formed inside and on top of a semiconductor substrate, the sensor comprising a plurality of pixels, each comprising a photodetector formed in the substrate, the sensor comprising at least first and second bidimensional metasurfaces stacked, in this order, in front of said plurality of pixels, each metasurface being formed of a bidimensional array of pads, the first metasurface having a first optical function and the second metasurface having a second optical function different from the first optical function.

Abstract: A memory cell includes a selection transistor having a control gate and a first conduction terminal connected to a variable-resistance element. The memory cell is formed in a wafer comprising a semiconductor substrate covered with a first insulating layer, the insulating layer being covered with an active layer made of a semiconductor. The gate is formed on the active layer and has a lateral flank covered with a second insulating layer. The variable-resistance element includes a first layer covering a lateral flank of the active layer in a trench formed through the active layer along the lateral flank of the gate and reaching the first insulating layer, and a second layer made of a variable-resistance material.

Abstract: Electronic device comprising: a semiconductor body, in particular of Silicon Carbide, SiC, having a first and a second face, opposite to each other along a first direction; and an electrical terminal at the first face, insulated from the semiconductor body by an electrical insulation region. The electrical insulation region is a multilayer comprising: a first insulating layer, of a Silicon Oxide, in contact with the semiconductor body; a second insulating layer on the first insulating layer, of a Hafnium Oxide; and a third insulating layer on the second insulating layer, of an Aluminum Oxide.

Abstract: The present disclosure relates to a method for manufacturing electronic chips. The method includes forming a plurality of trenches on a first face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed. The trenches delimit laterally a plurality of chips, and each of the chips includes a single integrated circuit. The method further includes electrically isolating flanks of each of the chips by forming an electrically isolating layer on lateral walls of the trenches.

Abstract: A cover for an integrated circuit package includes a central plate and a peripheral frame surrounding the central plate. The peripheral frame is vertically spaced from and parallel to the central plate. The peripheral frame includes through openings formed therein. The cover can be used to package a semiconductor chip that is mounted to a substrate.

Abstract: A method of authenticating a first electronic circuit includes generating a first signature using the first electronic circuit, the generating of the first signature being based on states of a plurality of electric nodes distributed within the first electronic circuit. A second signature is generated using a second electronic circuit, the generating of the second signature being based on states of a plurality of electric nodes distributed within the second electronic circuit. The first signature is compared to the second signature. The first electronic circuit is authenticated based on the comparison of the first signature to the second signature.

Abstract: An electronic device includes a module that delivers a positive temperature coefficient output voltage at an output terminal. A thermistor includes a first MOS transistor operating in weak inversion mode and having a negative temperature coefficient drain-source resistance and whose source is coupled to the output terminal. A current source coupled to the output terminal operates to impose the drain-source current of the first transistor.