Abstract: A photodiode is formed in a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes a first N-type semiconductor region formed by epitaxial growth and a second N-type semiconductor region (that is more heavily doped than the first region) extending into the first N-type semiconductor region from the first surface. The dopant concentration of the first N-type semiconductor region gradually increases between the second surface and the first surface of the semiconductor substrate. An implanted heavily P-type doped region is formed in the second N-type semiconductor region at the first surface.
Type:
Application
Filed:
March 28, 2023
Publication date:
October 5, 2023
Applicant:
STMicroelectronics (Crolles 2) SAS
Inventors:
Boris RODRIGUES GONCALVES, Pascal FONTENEAU
Abstract: At start-up of a microelectromechanical system (MEMS) gyroscope, the drive signal is inhibited, and the phase, frequency and amplitude of any residual mechanical oscillation is sensed and processed to determine a process path for start-up. In the event that the sensed frequency of the residual mechanical oscillation is a spurious mode frequency and a quality factor of the residual mechanical oscillation is sufficient, an anti-phase signal is applied as the MEMS gyroscope drive signal in order to implement an active dampening of the residual mechanical oscillation. A kicking phase can then be performed to initiate oscillation. Also, in the event that the sensed frequency of the residual mechanical oscillation is a resonant mode frequency with sufficient drive energy, a quadrature phase signal with phase lock loop frequency control and amplitude controlled by the drive energy is applied as the MEMS gyroscope drive signal in order to induce controlled oscillation.
Abstract: An integrated circuit memory includes a state transistor having a floating gate which stores a respective data value. A device for protecting the data stored in the memory includes a capacitive structure having a first electrically-conducting body coupled to the floating gate of the state transistor, a dielectric body, and a second electrically-conducting body coupled to a ground terminal. The dielectric body is configured, if an aqueous solution is brought into contact with the dielectric body, to electrically couple the floating gate and the ground terminal so as to modify the charge on the floating gate and to lose the corresponding data. Otherwise, the dielectric body is configured to electrically isolate the floating gate and the ground terminal.
Abstract: The present disclosure is directed to an electronic device including a semiconductor body having a first electrical conductivity and provided with a front side; an active area of the semiconductor body, accommodating the source and gate regions of the electronic device and configured to accommodate, in use, a conductive channel of the electronic device; and an edge region of the electronic device, surrounding the active area. The edge region accommodates at least in part: i) an edge termination region, having a second electrical conductivity opposite to the first electrical conductivity, extending into the semiconductor body at the front side; and ii) a gate connection terminal of conductive material, electrically coupled to the gate region, extending on the front side partially superimposed on the edge termination region and capacitively coupled with a portion of the semiconductor body adjacent and external to the edge termination region.
Type:
Application
Filed:
March 22, 2023
Publication date:
October 5, 2023
Applicant:
STMICROELECTRONICS S.r.l.
Inventors:
Salvatore CASCINO, Alfio GUARNERA, Mario Giuseppe SAGGIO
Abstract: Electrostatic discharge (ESD) protection is provided in circuits which use of a tunneling field effect transistor (TFET) or an impact ionization MOSFET (IMOS). These circuits are supported in silicon on insulator (SOI) and bulk substrate configurations to function as protection diodes, supply clamps, failsafe circuits and cutter cells. Implementations with parasitic bipolar devices provide additional parallel discharge paths.
Abstract: Electronic device comprising at least a first and a second branch, each branch including a first and a second transistor arranged in series to each other and formed in respective dice of semiconductor material. The dice are sandwiched between a first substrate element and a second substrate element. The first and the second substrate elements are formed each by a multilayer including a first conductive layer, a second conductive layer and an insulating layer extending between the first and the second conductive layers. The first conductive layers of the first and the second substrate elements face towards the outside of the electronic device and define a first and a second main face of the electronic device. The second conductive layer of the first and the second substrate elements is shaped so as to form contact regions facing and in selective electrical contact with the plurality of dice.
Type:
Application
Filed:
March 23, 2023
Publication date:
October 5, 2023
Applicant:
STMICROELECTRONICS S.r.l.
Inventors:
Cristiano Gianluca STELLA, Agatino MINOTTI, Francesco SALAMONE
Abstract: A first input node receives a first input signal and a second input node receives a second input signal. The first and second input signals are in phase quadrature. An edge detector circuit senses the first input signal and produces a pulsed signal indicative of edges detected in the first input signal. A pulse skip and reset circuit senses the pulsed signal and the second input signal, and produces a reset signal indicative of pulses detected in the pulsed signal while the second input signal is de-asserted. A sampling circuit senses the second input signal and the reset signal, and produces an output signal that is deasserted in response to assertion of the second input signal and is asserted in response to a pulse being detected in the reset signal.
Type:
Application
Filed:
March 28, 2023
Publication date:
October 5, 2023
Applicants:
STMicroelectronics S.r.l., STMicroelectronics (Rousset) SAS
Inventors:
Giulio ZOPPI, Vincent Pascal ONDE, Giuseppe ROMANO
Abstract: A probe device includes an optical device including at least one of a photodetector or a first light source. A cover structure is included and is arranged in front of the optical device. The cover structure includes an electrode which contacts, in use, a body tissue.
Type:
Application
Filed:
June 7, 2023
Publication date:
October 5, 2023
Applicant:
STMICROELECTRONICS S.r.l.
Inventors:
Vincenzo VINCIGUERRA, Piero FALLICA, Mario Francesco ROMEO
Abstract: Method for determining a first and a second calibrated value of atmospheric pressure, performed by an electronic apparatus comprising a fixed device and a first and a second movable device comprising respectively a first and a second movable barometer.
Type:
Application
Filed:
February 15, 2023
Publication date:
October 5, 2023
Applicant:
STMICROELECTRONICS S.r.l.
Inventors:
Enri DUQI, Patrick FEDELI, Nicolo' MANCA, Silvia ADORNO
Abstract: An embodiment optical device includes a glass plate, a first trench disposed in the glass plate, and a second trench disposed in the glass plate. The second trench crosses the first trench, and the first trench has an open end in a first wall of the second trench. The optical device includes a waveguide disposed inside the first trench, where the waveguide is formed of a material having a refractive index different from that of the glass plate, and a mirror on a second wall of the second trench opposite the first wall and waveguide. The optical device includes an encapsulation layer filling the second trench and covering all of an upper surface of the waveguide and having a refractive index that is different from the waveguide and the glass plate.
Type:
Grant
Filed:
September 21, 2020
Date of Patent:
October 3, 2023
Assignee:
STMICROELECTRONICS SA
Inventors:
Folly Eli Ayi-Yovo, Cédric Durand, Frédéric Gianesello
Abstract: The method for resetting a master device, configured to initiate transactions on a bus of a system on a chip, includes monitoring a completed or not state of the transactions initiated by the master device. In the case of reception of a command to reset the master device, the method includes a transmission of an effective reset command to the master device when the transactions initiated by the master device are in the completed state.
Type:
Grant
Filed:
December 1, 2021
Date of Patent:
October 3, 2023
Assignees:
STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Grand Ouest) SAS
Abstract: A memory calibration system includes a memory array having a plurality of memory cells, a sensing circuit coupled to the memory array, and calibration circuitry. A pattern of test data is applied to the memory array in order to generate calibration information based on output provided by the first sensing circuit in response to the application of the pattern of test data to the memory array. The generated calibration information is stored in a distributed manner within memory cells of the memory array. Some of the generated calibration information may be combined with data values stored in the plurality of memory cells as part of one or more operations on the stored data values.
Abstract: A transistor is produced by forming a first part of a first region of the transistor in a semiconductor substrate by implanting dopants through an opening in an isolating trench formed at an upper surface of the semiconductor substrate. A second region of the transistor in the opening by epitaxy.
Abstract: The present disclosure is directed to a selective multi-gas sensor device that detects when a high concentration level of a particular gas, such as methane, carbon monoxide, and/or ethanol, is present. The selective multi-gas sensor device detects and identifies a particular gas based on a ratio between a sensitivity of a gas sensitive material at a first temperature and a sensitivity of the gas sensitive material at a second temperature.
Type:
Grant
Filed:
July 1, 2019
Date of Patent:
October 3, 2023
Assignee:
STMicroelectronics PTE LTD
Inventors:
Fangxing Yuan, Ravi Shankar, Olivier Le Neel
Abstract: A scanning laser projector includes an optical module and projection engine. The optical module includes a laser generator outputting a laser beam, and a movable mirror scanning the laser beam across an exit window defined through the housing in a scanning pattern wider than the exit window such that the laser beam is directed through the exit window in a projection pattern that is smaller than and within the scanning pattern. A first light detector is positioned about a periphery of the exit window such that as the movable mirror scans the laser beam in the scan pattern, at a point in the scan pattern where the laser beam is scanned across an interior of the housing and not through the exit window, the laser beam impinges upon the first light detector. The projection engine adjusts driving of the movable mirror based upon output from the first light detector.
Abstract: A method of operating a display includes performing a non-synchronized touch scan pattern on a display with a controller coupled to the display. The non-synchronized touch scan pattern schedules touch scans independent of a refresh rate of the display. Upon the controller detecting a first synchronization pulse from a display controller coupled to the controller and the display, a first pulse-checking timer is started. Upon detecting a second synchronization pulse from the display controller and before the first pulse-checking timer expires, a first display refresh rate for the display is obtained from an interval between the first synchronization pulse and the second synchronization pulse. A synchronized touch scan pattern is performed with the controller, and is scheduled to avoid touch scans coinciding with refreshes of the display performed at the first display refresh rate.
Abstract: A reference current generator circuit generating a reference current that is proportional to absolute temperature as a function of a difference between bias voltages of first and second transistors. A voltage generator generates an input voltage from the reference current by applying the reference current that is proportional to absolute temperature through a plurality of transistors coupled in series between the bias voltage of the second transistor and ground, with the input voltage being generated at a node between given adjacent ones of the plurality of transistors. The input voltage is complementary to absolute temperature. A differential amplifier is biased by a current derived from the reference current and generates a temperature insensitive output reference voltage from the input voltage and a voltage proportional to absolute temperature.
Abstract: A detection device includes a pressure sensor, which provides a pressure signal indicative of an ambient pressure in an operating environment. An electrostatic-charge-variation sensor provides a charge-variation signal indicative of a variation of electrostatic charge associated with the operating environment, and processing circuitry is coupled to the pressure sensor and to the electrostatic-charge-variation sensor so as to receive the pressure signal and the charge-variation signal, and jointly processes the pressure signal and the charge-variation signal for detecting a variation between a first operating environment and a second operating environment for the detection device. The second operating environment is different from the first operating environment.
Abstract: A semiconductor package includes a silicon substrate with an active surface and an inactive surface. A semiconductor device, such as an image, light, or optical sensor, is formed in the active surface and disposed on the substrate. A glass plate is coupled to the substrate with adhesive. The glass plate includes a sensor area that corresponds to the area of the semiconductor device and holes through the glass plate that are generally positioned around the sensor area of the glass plate. During formation of the package, the holes through the glass plate allow gas released by the adhesive to escape the package and prevent formation of a gas bubble.
Abstract: An electronic chip includes at least a first array of first elementary cells and a second array of second elementary cells. The first and second elementary cells form two types of phase change memory having a storage element formed by a volume of phase change material having either a crystalline state or an amorphous state depending on the bit stored. Each first elementary cell includes a volume of a first phase change material, and each second elementary cell includes a volume of a second phase change material that is different from the first material. Each elementary cell includes a heating connector configured for the passage of a heating current adapted to cause a phase change of the volume of phase change material of the elementary cell.