Abstract: An apparatus is for testing a device to be supplied with power via USB Power Delivery (USB-PD). The apparatus includes at least one USB Type-C connector configured to be connected to the device to be supplied with power to be tested, the at least one USB Type-C connector including a power supply terminal. Processing circuitry of the apparatus is configured to verify that a voltage at the power supply terminal is lower than a first threshold, verify a role of the device, generate requests representative of power supply configurations supported by the role of the device, and verify compatibility of the power supply configurations supported by the device with standardized power supply configurations.

Abstract: In a method, substrate elements are provided wherein each substrate element has a first side and a second side meeting at a corner point. The substrate elements are picked and then placed on a support device in alignment. A cutting operation is then performed where each of the substrates elements are cut along a cut line having a common first direction which intersects the first and second sides of each of the substrate elements in order to create a third side on each substrate element. The third side of each of the substrate elements meets the first and the second sides at corresponding corner points.

Abstract: An embodiment method for smoothing consumed current is based on a current copying suite and on a current source supplying a reference current, the currents being transformed into a reference voltage for the regulation of a voltage regulator such that the consumed current viewed by the power supply only depends on the reference current.

Abstract: A particle detector formed by a body defining a chamber and housing a light source and a photodetector. A reflecting surface is formed by a first reflecting region and a second reflecting region that have a respective curved shape. The curved shapes are chosen from among portions of ellipsoidal, paraboloidal, and spherical surfaces. The first reflecting region faces the light source and the second reflecting region faces the photodetector. The first reflecting region has an own first focus, and the second reflecting region has an own first focus. The first focus of the first reflecting region is arranged in an active volume of the body, designed for detecting particles, and the photodetector is arranged on the first focus of the second reflecting region.

Abstract: The disclosure relates to a modified NFC framing is used by a reader and selected devices during at least a part of the communication between the reader and the selected devices. The reader and the selected devices store modification rules for modifying the frames. Devices not storing those modification rules will discard the received modified frames.

Abstract: An electronic device includes a near-field communication module and a powering circuit for delivering a power supply voltage to the near-field communication module. When the near-field communication module is in a low power mode, the powering circuit is configured for an operational mode where it is periodically started to provide the power supply voltage.

Abstract: A first near-field communication device is remotely powered by a second near-field communication device. The first near-field communication device receives from the second near-field communication device a frame indicating a failure of a data reception by the second near-field communication device. In response, at least one transmission parameter of the first near-field communication device is modified prior to another attempt of transmission of the data.

Abstract: Method for manufacturing an electronic device, comprising the steps of: forming, at a front side of a solid body of 4H-SiC having a first electrical conductivity, at least one implanted region having a second electrical conductivity opposite to the first electrical conductivity; forming, on the front side, a 3C-SiC layer; and forming, in the 3C-SiC layer, an ohmic contact region which extends through the entire thickness of the 3C-SiC layer, up to reaching the implanted region. A silicon layer may be present on the 3C-SiC layer; in this case, the ohmic contact also extends through the silicon layer.

Abstract: A method generates a delayed signal based on an input signal, and applies vector magnitude scaling to the delayed signal, generating one or more vector magnitude scaled signals. The input signal is added to the one or more vector magnitude scaled signals, generating one or more phase-shifted signals. Compensation scaling is applied to the one or more phase-shifted signals, generating one or more compensated signals. The input signal and the one or more compensated signals are combined, generating an interpolated output signal. The method may be implemented by a device or a system.

Abstract: Process for manufacturing a 3C-SiC layer, comprising the steps of: providing a wafer of 4H-SiC, provided with a surface; heating, through a LASER beam, a selective portion of the wafer at least up to a melting temperature of the material of the selective portion; allowing the cooling and crystallization of the melted selective portion, thus forming the 3C-SiC layer, a Silicon layer on the 3C-SiC layer and a carbon-rich layer above the Silicon layer; completely removing the carbon-rich layer and the Silicon layer, exposing the 3C-SiC layer. If the Silicon layer is maintained on the 4H-SiC wafer, the process leads to the formation of a Silicon layer on the 4H-SiC wafer. The 3C-SiC or Silicon layer thus formed may be used for the integration, even only partial, of electrical or electronic components.

Abstract: The integrated circuit comprises at least one transistor including a separate gate structure and field plate, disposed on a front face of a semiconductor substrate, and a doped conduction region in the semiconductor substrate located plumb with an edge of the gate structure and plumb with an edge of the field plate.

Abstract: A method of fabricating a thermoelectric converter that includes providing a layer of a Silicon-based material having a first surface and a second surface, opposite to and separated from the first surface by a Silicon-based material layer thickness; forming a plurality of first thermoelectrically active elements of a first thermoelectric semiconductor material having a first Seebeck coefficient, and forming a plurality of second thermoelectrically active elements of a second thermoelectric semiconductor material having a second Seebeck coefficient, wherein the first and second thermoelectrically active elements are formed to extend through the Silicon-based material layer thickness, from the first surface to the second surface; forming electrically conductive interconnections in correspondence of the first surface and of the second surface of the layer of Silicon-based material, for electrically interconnecting the plurality of first thermoelectrically active elements and the plurality of second thermoelectri

Abstract: A device has a plurality of CAN XL communication systems, a bus, and a switching circuit. The bus has a transmission node and reception node, and receives from each CAN XL communication system a respective second transmission signal and drives the logic level at the transmission node as a function of the logic levels of the second transmission signals, and provides to each CAN XL communication system a respective second reception signal having a logic level determined as a function of the logic level at the reception node. The switching circuit supports a plurality of modes. In a first mode, the switching circuit is configured to provide the NRZ encoded transmission signals of the CAN XL communication systems as the second transmission signals to the bus system, and provide the respective second reception signal received from the bus to the CAN XL protocol controllers of the CAN XL communication system.

Abstract: An electronic device includes a first electronic chip, a second electronic chip, and an interconnection circuit. A first region of a first surface of the first electronic chip is assembled by hybrid bonding to a third region of a third surface of the interconnection circuit. A second region of a second surface of the second electronic chip is assembled by hybrid to a fourth region of the third surface of the interconnection circuit. In this configuration, the first electronic chip is electrically coupled to the second electronic chip through the interconnection circuit. The first surface of the first electronic chip further includes a fifth region which is not in contact with the interconnection circuit. This fifth region includes a connection pad electrically connected by a connection element to a connection substrate to which the interconnection circuit is mounted.

Abstract: A method for manufacturing an electronic device includes forming, at a front side of a solid body of 4H-SiC having a first electrical conductivity, at least one implanted region having a second electrical conductivity opposite to the first electrical conductivity; forming, on the front side, a 3C-SiC layer; and forming, in the 3C-SiC layer, an ohmic contact region which extends through the entire thickness of the 3C-SiC layer, up to reaching the implanted region. A silicon layer may be present on the 3C-SiC layer; in this case, the ohmic contact also extends through the silicon layer.

Abstract: Load current consumption measured using a first resistor having a high resistive value and a second resistor having a low resistive value. Differential amplifiers, the outputs of which are coupled to analog-to-digital converters and to a processing circuit unit, are connected to each of the nodes of the resistors. Depending on the current level, the processing circuit unit advantageously selects one of the analog-to-digital converters to estimate the present consumption of current in the load. Each input terminal of a resistor is advantageously power supplied from a power amplifier and each power amplifier is advantageously driven by a control loop. For low load currents, the first amplifier associated with the first resistor power supplies the load through the resistors while, for high load currents, when this first amplifier saturates, the second amplifier associated with the second resistor, takes over from the first amplifier to continue to power supply the load.

Abstract: A switching DC-DC converter circuit includes a switching stage having an input node receiving an input voltage and an output node producing an output voltage. The converter includes feedback loop circuitry coupled to the output node of the switching stage to produce, at a respective output node, a control signal of the converter circuit as a function of a difference between the output voltage and a reference voltage. The converter includes test loop circuitry arranged between an output node of the feedback loop circuitry and the output node of the switching stage. The test loop, when enabled, sources a current to the output node of the switching stage or sinks a current from the output node of the switching stage as a function of a value of the control signal of the converter circuit. The feedback loop circuitry is calibrated during a test phase of the switching DC-DC converter circuit.

Abstract: An optical module includes a fast-axis mirror that scans a laser beam along a fast-axis, a magnification mirror set formed by three discrete mirrors shaped to magnify the laser beam as it is scanned along the fast-axis and reflect the laser beam after magnification toward a slow-axis mirror that scans the laser beam along the slow-axis, and an Offner mirror relay that receives the laser beam as it is scanned along the slow-axis and reflects the laser beam out an exit aperture. The laser beam as output from the exit aperture is received at an input diffractive grating of a diffractive waveguide, with a user's eye being positioned adjacent an output diffractive grating of the waveguide such that the user's eye views ambient light entering the waveguide from objects within the user's field of view as well as light from the laser beam as it exits the output diffractive grating.

Abstract: Methods and structures for forming highly-doped, ultrathin layers for transistors formed in semiconductor-on-insulator substrates are described. High dopant concentrations may be achieved in ultrathin semiconductor layers to improve device characteristics. Ion implantation at elevated temperatures may mitigate defect formation for stoichiometric dopant concentrations up to about 30%. In-plane stressors may be formed adjacent to channels of transistors formed in ultrathin semiconductor layers.

Abstract: A micromechanical device includes a semiconductor body, a first mobile structure, an elastic assembly, coupled to the first mobile structure and to the semiconductor body and adapted to undergo deformation in a direction, and at least one abutment element. The elastic assembly is configured to enable an oscillation of the first mobile structure as a function of a force applied thereto. The first mobile structure, the abutment element and the elastic assembly are arranged with respect to one another in such a way that: when the force is lower than a force threshold, the elastic assembly operates with a first elastic constant; and when the force is greater than the threshold force, then the first mobile structure is in contact with the abutment element, and a deformation of the elastic assembly is generated, which operates with a second elastic constant different from the first elastic constant.