Patents Assigned to STMicroelectronics (Crolles 2)
  • Patent number: 11787685
    Abstract: For manufacturing an optical microelectromechanical device, a first wafer of semiconductor material having a first surface and a second surface is machined to form a suspended mirror structure, a fixed structure surrounding the suspended mirror structure, elastic supporting elements which extend between the fixed structure and the suspended mirror structure, and an actuation structure coupled to the suspended mirror structure. A second wafer is machined separately to form a chamber delimited by a bottom wall having a through opening. The second wafer is bonded to the first surface of the first wafer in such a way that the chamber overlies the actuation structure and the through opening is aligned to the suspended mirror structure. Furthermore, a third wafer is bonded to the second surface of the first wafer to form a composite wafer device. The composite wafer device is then diced to form an optical microelectromechanical device.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: October 17, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luca Seghizzi, Nicolo′ Boni, Laura Oggioni, Roberto Carminati, Marta Carminati
  • Patent number: 11791720
    Abstract: A direct current (DC) to DC (DC-DC) converter includes a comparator setting a pulse width of a signal pulse, the pulse width corresponding to a voltage level of an output voltage of the DC-DC converter; a digital delay line (DDL) operatively coupled to the comparator, the DDL adjusting the pulse width of the signal pulse by linearly introducing delays to the signal pulse; a multiplexer operatively coupled to the DDL, the multiplexer selectively outputting a delayed version of the signal pulse; a phase detector operatively coupled to a system clock and the multiplexer, the phase detector generating a phase error between an output of the multiplexer and the system clock; and a logic control circuit operatively coupled to the multiplexer and the DDL, the logic control circuit adjusting the delay introduced to the signal pulse in accordance with the phase error.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: October 17, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Juri Giovannone, Valeria Bottarel, Stefano Corona
  • Publication number: 20230326883
    Abstract: An ultralong time constant time measurement device includes elementary capacitive elements that are connected in series. Each elementary capacitive element is formed by a stack of a first conductive region, a dielectric layer having a thickness suited for allowing charge to flow by direct tunnelling effect, and a second conductive region. The first conductive region is housed in a trench extending from a front face of a semiconductor substrate down into the semiconductor substrate. The dielectric layer rests on the first face of the semiconductor substrate and in particular on a portion of the first conductive region in the trench. The second conductive region rests on the dielectric layer.
    Type: Application
    Filed: June 15, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Abderrezak MARZAKI, Pascal FORNARA
  • Publication number: 20230326499
    Abstract: An in-memory computation (IMC) circuit includes a memory array formed by memory cells arranged in row-by-column matrix. Computational weights for an IMC operation are stored in the memory cells. Each column includes a bit line connected to the memory cells. A switching circuit is connected between each bit line and a corresponding column output. The switching circuit is controlled to turn on to generate the analog signal dependent on the computational weight and for a time duration controlled by the coefficient data signal. A column combining circuit combines (by addition and/or subtraction) and integrates analog signals at the column outputs of the biasing circuits. The addition/subtraction is dependent on one or more a sign of the coefficient data and a sign of the computational weight and may further implement a binary weighting function.
    Type: Application
    Filed: April 12, 2022
    Publication date: October 12, 2023
    Applicants: STMicroelectronics S.r.l., Alma Mater Studiorum - Universita' Di Bologna
    Inventors: Marco PASOTTI, Marcella CARISSIMI, Alessio ANTOLINI, Eleonora FRANCHI SCARSELLI, Antonio GNUDI, Andrea LICO
  • Publication number: 20230326975
    Abstract: An electronic device includes a solid body of SiC having a surface and having a first conductivity type. A first implanted region and a second implanted region have a second conductivity type and extend into the solid body in a direction starting from the surface and delimit between them a surface portion of the solid body. A Schottky contact is on the surface and in direct contact with the surface portion. Ohmic contacts are on the surface and in direct contact with the first and second implanted regions. The solid body includes an epitaxial layer including the surface portion and a bulk portion. The surface portion houses a plurality of doped sub-regions which extend in succession one after another in the direction, are of the first conductivity type, and have a respective conductivity level higher than that of the bulk portion.
    Type: Application
    Filed: June 13, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Simone RASCUNA, Claudio CHIBBARO
  • Publication number: 20230322170
    Abstract: The present disclosure is directed to a device and method for detection of motion events including towing of the vehicle, jacking of the vehicle, and the vehicle being hit by another object. Processing is split between an MCU and a sensor unit. After the vehicle is turned off and before the MCU enters a sleep mode, the MCU calculates a gravity vector of the vehicle using accelerometer data, calculates threshold values based on the gravity vector, and saves the threshold values. After the MCU enters the sleep mode, the sensor unit subsequently monitors and detects motion events with the saved threshold values.
    Type: Application
    Filed: April 11, 2022
    Publication date: October 12, 2023
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Mahaveer JAIN, Mahesh CHOWDHARY
  • Publication number: 20230328456
    Abstract: A microelectromechanical electroacoustic transducer includes a supporting frame of semiconductor material, a membrane of semiconductor material, connected to the supporting frame along a perimeter and having central symmetry, and a piezoelectric actuator on a peripheral portion of the membrane. The membrane has through slits of elongated shape arranged around a center of the membrane.
    Type: Application
    Filed: April 4, 2023
    Publication date: October 12, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Fabrizio CERINI, Silvia ADORNO, Marco SALINA
  • Publication number: 20230327667
    Abstract: A multiplexer includes an input, an output, and a main switch configured to pass a signal from the input to the output. The multiplexer includes two bootstrap circuits that collectively maintain a constant voltage between terminals of the main switch during alternating phases.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics International N.V.
    Inventors: Vaibhav GARG, Abhishek JAIN, Anand KUMAR
  • Publication number: 20230326947
    Abstract: An integrated circuit includes at least one silicon region and at least one metal pillar in contact with the at least one silicon region at an ohmic coupling region. The at least one metal pillar is formed by: depositing a layer of titanium on the at least one silicon region; depositing atomic layers of titanium nitride on the layer of titanium; and annealing at a temperature of between 715° C. and 815° C. for a period of between 5 seconds and 30 seconds. This forms a titanium silicide for the ohmic coupling region in a volume having the appearance of a spherical cap or segment.
    Type: Application
    Filed: April 6, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Magali GREGOIRE, Joel SCHMITT
  • Publication number: 20230322077
    Abstract: A measurement of the rotation speed of an object is made using a time-of-flight sensor configured to detect a passing of one or more of elements of the object through a given position. The time-of-flight sensor is further mounted on a one-person vehicle configured to protect the one-person vehicle against collisions through the making a time-of-flight measurement of a relative speed between the one-person vehicle and an obstacle.
    Type: Application
    Filed: June 7, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Thomas PEROTTO
  • Publication number: 20230324678
    Abstract: A method of making a MEMS device including forming a mirror stack on a handle layer, applying a first bonding layer to the mirror stack, and disposing a substrate on the first bonding layer. The handle layer is removed and a second bonding layer is applied. A cap layer is disposed on the second bonding layer. The mirror stack is formed by disposing a silicon layer on the handle layer, disposing a first insulating layer on the silicon layer, etching portions of the first insulating layer, and depositing a first conductive layer on the first insulating layer. The formation also includes depositing a second insulating layer on the first conductive layer, a portion of the second insulating layer to expose a portion of the first conductive layer exposed, and forming a conductive pad on the exposed portion of the first conductive layer.
    Type: Application
    Filed: June 6, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Giorgio ALLEGATO, Sonia COSTANTINI, Federico VERCESI, Roberto CARMINATI
  • Publication number: 20230324229
    Abstract: A thermographic sensor is proposed. The thermographic sensor includes a plurality of sensing elements each comprising at least one thermo-couple. The thermographic sensor is integrated on a semiconductor on insulator body that is patterned to define a grid suspended from a substrate; for each sensing element, the grid has a frame with the cold joint of the thermo-couple, a plate with the hot joint of the thermo-couple and one or more arms sustaining the plate from the frame. The frames include one or more conductive layers of thermally conductive material for thermally equalizing the cold joints with the substrate. Moreover, each sensing element may also include a processing circuit for the thermo-couple that is integrated on the corresponding frame. A thermographic device including the thermographic sensor and a corresponding signal processing circuit, and a system including one or more thermographic devices are also proposed.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 12, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Maria Eloisa CASTAGNA, Giuseppe BRUNO
  • Publication number: 20230326239
    Abstract: An electronic device includes a depth sensor and an inertial measurement unit. The electronic device detects a presence of the user of the electronic device by analyzing a combination of inertial sensor signals from the inertial measurement unit and depth sensor signals from the depth sensor.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 12, 2023
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Xiaoyong YANG, Kalyan-Kumar VADLAMUDI-REDDY
  • Publication number: 20230326524
    Abstract: An in-memory computation (IMC) circuit includes a memory array formed by memory cells arranged in row-by-column matrix. Computational weights for an IMC operation are stored in the memory cells. Each column includes a bit line connected to the memory cells. A biasing circuit is connected between each bit line and a corresponding column output. A column combining circuit combines and integrates analog signals at the column outputs of the biasing circuits. Each biasing circuit operates to apply a fixed reference voltage level to its bit line. Each biasing circuit further includes a switching circuit that is controlled to turn on for a time duration controlled by asps comparison of a coefficient data signal to a ramp signal to generate the analog signal dependent on the computational weight. The ramp signal is generated using a reference current derived from a reference memory cell.
    Type: Application
    Filed: April 12, 2022
    Publication date: October 12, 2023
    Applicants: STMicroelectronics S.r.l., Alma Mater Studiorum - Universita' Di Bologna
    Inventors: Marco PASOTTI, Marcella CARISSIMI, Alessio ANTOLINI, Eleonora FRANCHI SCARSELLI, Antonio GNUDI, Andrea LICO, Paolo ROMELE
  • Publication number: 20230326885
    Abstract: A semiconductor wafer includes first zones containing integrated circuits, each first zone including a substrate and a sealing ring at a periphery of the substrate. The first zones are separated from each other by second zones defining cutting lines or paths. The integrated circuit includes an electrically conductive fuse that extends between a first location inside the integrated circuit and a second location situated outside the integrated circuit beyond one of the cutting lines. This electrically conductive fuse includes a portion that passes through the sealing ring and another portion that straddles the adjacent cutting line. The portion of the fuse that passes through is electrically isolated from the sealing ring and from the substrate. The straddling portion is configured to be sliced, when cutting the wafer along the cutting line, so as to cause the fuse to change from an electrical on state to an electrical off state.
    Type: Application
    Filed: June 15, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Pascal FORNARA
  • Publication number: 20230326995
    Abstract: The present disclosure is directed to a vertical-channel semiconductor device. For manufacturing the vertical-channel semiconductor device, starting from a work wafer having a first side and a second side opposite to the first side along a direction, a first doped region is formed in the work wafer, from the second side of the work wafer. The work wafer has a first conductivity type and a first doping level, the first doped region has the first conductivity type and a second doping level higher than the first doping level. A device active region having a channel region extending in the direction is formed in the work wafer, on the first side of the work wafer. The first doped region and the device active region delimit, in the work wafer, a drift region. The first doped region is formed before the device active region.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 12, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Sebastiano AMARA, Fernando Giovanni MENTA, Salvatore PISANO
  • Publication number: 20230325336
    Abstract: The system on a chip includes at least a first digital domain configured to be reinitialized by a first reinitialization signal, a second digital domain and an interface circuit. The interface circuit includes a starting register in the first digital domain, a destination register in the second digital domain and a synchronization circuit in the first digital domain. The interface circuit is configured to transfer data from the starting register to the destination register upon command of a control signal transmitted by the synchronization circuit. The starting register and the synchronization circuit are configured to not be reinitialized by the first reinitialization signal.
    Type: Application
    Filed: April 11, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Nicolas SAUX, Sebastien METZGER, Herve CASSAGNES
  • Publication number: 20230327028
    Abstract: A semiconductor substrate includes excavations which form trenches sunk. A capacitive element includes: a first dielectric envelope conforming to sides and bottoms of the trenches; a first semiconductor layer conforming to a surface of the first dielectric envelope in the trenches; a second dielectric envelope conforming to a surface of the first semiconductor layer in the trenches; and a second semiconductor layer conforming to a surface of the second dielectric envelope in the trenches.
    Type: Application
    Filed: June 15, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Christian RIVERO, Brice ARRAZAT, Julien DELALLEAU, Joel METZ
  • Publication number: 20230324674
    Abstract: A microelectromechanical mirror device has, in a die of semiconductor material: a fixed structure defining a cavity; a tiltable structure carrying a reflecting region, elastically suspended above the cavity and having a main extension in a horizontal plane; at least one first pair of driving arms, carrying respective piezoelectric structures which can be biased to generate a driving force that causes rotation of the tiltable structure about a rotation axis parallel to a first horizontal axis of the horizontal plane; elastic suspension elements, which elastically couple the tiltable structure to the fixed structure at the rotation axis and are rigid to movements out of the horizontal plane and compliant to torsion about the rotation axis. In particular, the driving arms of the first pair are magnetically coupled to the tiltable structure to cause its rotation about the rotation axis by magnetic interaction, following biasing of the respective piezoelectric structures.
    Type: Application
    Filed: April 5, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Nicolo' BONI, Roberto CARMINATI, Massimiliano MERLI, Carlo Luigi PRELINI, Tarek AFIFI AFIFI
  • Publication number: 20230329008
    Abstract: A method for manufacturing an electronic chip includes providing a semiconductor layer located on an insulator covering a semiconductor substrate. First and second portions of the semiconductor layer are oxidized up to the insulator. Stresses are generated in third portions of the semiconductor layer, and each of the third portions extend between two portions of the semiconductor layer that are oxidized. Cavities are formed which extend at least to the substrate through the second portions and the insulator. Bipolar transistors are formed in at least part of the cavities and first field effect transistors are formed in and on the third portions. Phase change memory points are coupled to the bipolar transistors.
    Type: Application
    Filed: June 15, 2023
    Publication date: October 12, 2023
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Remy BERTHELON, Olivier WEBER