Abstract: An electronic device includes a semiconductor body of silicon carbide, and a body region at a first surface of the semiconductor body. A source region is disposed in the body region. A drain region is disposed at a second surface of the semiconductor body. A doped region extends seamlessly at the entire first surface of the semiconductor body and includes one or more first sub-regions having a first doping concentration and one or more second sub-regions having a second doping concentration lower than the first doping concentration. Thus, the device has zones alternated to each other having different conduction threshold voltage and different saturation current.

Abstract: The valve is formed in a valve body housing a first path portion, a second path portion, and an coupling zone between the first and second path portions. A shutter is arranged in the coupling zone and has a shutting portion of ferromagnetic material that is deformable under the action of an external magnetic field between an undeformed position, wherein the shutter closes the coupling zone, and a deformed position, wherein the shutter at least partially frees the coupling zone. The shutting portion of the shutter is formed by a rubber membrane incorporating particles, for example of ferrite particles.

Abstract: An electronic device capable of determining an eye convergence angle using a magnetometer sensor is provided. The magnetometer sensor is capable of reporting angle readings in three dimensions that is aligned with an eye gaze direction of each eye of a user. The magnetometer which is incorporated into the device can fit into a human eye like a contact lens and determine the angle of the gaze direction of both eyes with respect to an object within a field of view. By obtaining this eye convergence angle for an object, it is possible to accurately detect depth information. The electronic device also functions as a digital contact lens that can automatically adjust the focal point of the object to provide the user with a clear vision. The electronic device also includes a display that provides the user with additional information about the object.

Abstract: A digital audio playback circuit includes a noise shaping circuit configured to receive an input digital audio signal, and a digital to analog converter (DAC) configured to convert the input digital audio signal to a pre-amplified output analog audio signal according to a gain ramp defined by a gain control signal. A muting circuit is configured to compare input digital audio signal to a threshold and assert a mute control signal when the input digital audio signal is below the threshold. An analog gain control ramp circuit is configured to generate the gain control signal in response to the mute control signal to cause the gain ramp to ramp down. An amplifier is configured to amplify the pre-amplified output analog audio signal for playback by an audio playback device.

Abstract: A LDO regulator circuit comprises an input comparator and driver circuitry including transistors having a current flow path therethrough coupled to an output node of the regulator. First and second driver each comprises: driver transistors having the current flow paths therethrough coupled to the output node, capacitive boost circuitry that applies to the drive transistors a voltage-pumped replica of the comparison signal. Voltage refresh transistor circuitry coupled to the capacitive boost circuitry transfer thereon the voltage-pumped replica.

Abstract: A level-shifter circuit receives one or more input signals in an input level domain and includes provides at an output node an output signal in an output level domain shifted with respect to the input level domain. The circuit includes output circuitry including a first drive node and a second drive node that receive first and second logical signals so that the output signal has a first output level or a second output level in the output level domain as a function of at least one of the first and second logical signals. The circuit includes first and second shift capacitors coupled to the first and second drive nodes as well as capacitor refresh circuitry.

Abstract: The present disclosure is directed to conductive structures that may be utilized in a radio-frequency (RF) switch. The embodiments of the conductive structures of the present disclosure are formed to balance the “on” resistance (Ron) and the “off” capacitance (Coff) such that the Ron·Coff value is optimized such that the conductive structures are relatively efficient as compared to conventional conductive structures within conventional RF switches. For example, the conductive structures include various metallization layers that are stacked on each other and spaced apart in a selected manner to balance the Ron and the Coff as to optimize the Ron·Coff figure of merit as a lower Ron·Coff is preferred.

Abstract: An electronic device has a plurality of integrated circuits fixed to a support between transmitting and receiving antennas. An integrated circuit generates a synchronization signal supplied to the other integrated circuits. Each integrated circuit is formed in a die integrating electronic components and overlaid by a connection region according to the Flip-Chip Ball-Grid-array or embedded Wafer Level BGA. A plurality of solder balls for each integrated circuit is electrically coupled to the electronic components and bonded between the respective integrated circuit and the support. The solder balls are arranged in an array, aligned along a plurality of lines parallel to a direction, wherein the plurality of lines comprises an empty line along which no solder balls are present. A conductive synchronization path is formed on the support and extends along the empty line of at least one integrated circuit, between the solder balls of the latter.

Abstract: The present description concerns a manufacturing method comprising, for each photodetector of an array of photodetectors of a light sensor, a use of a mask obtained by directed self-assembly of a block copolymer to form, by a first etch step, at least one first structure on the side of a first surface of the photodetector intended to receive light.

Abstract: In a multi-level hybrid DC-DC converter with a flying capacitor, a feedback circuit includes a first oscillator and produces a first clock signal with a frequency dependent on an output voltage. A second oscillator produces a second clock signal having a frequency dependent on a reference voltage. A logic circuit switches, as a function of the first and second clock signals, connection of the flying capacitor between one state where the flying capacitor is connected between an input node and a switching node, and another state where the capacitor is connected between the switching node and a ground node. The duty cycle of the first/second clock signal varies so that when the flying capacitor voltage is lower than a target voltage a duration of the one state is increased, and when the flying capacitor voltage is higher than the target voltage a duration of the another state is increased.

Abstract: An image sensor is includes a plurality of pixels. Each of the pixels includes a silicon photoconversion region and a material that at least partially surrounds the photoconversion region. The material has a refraction index smaller than the refraction index of silicon, and the interface between the photoconversion region of the pixel and the material is configured so that at least one ray reaching the photoconversion region of the pixel undergoes a total reflection or a plurality of successive total reflections at the interface.

Abstract: A diode and a transistor are connected in parallel. The transistor is located on a first doped region forming a PN junction of the diode with a second doped region located under the first region. The circuit functions as an ionizing radiation detection cell by generating a current through the PN junction which changes by a voltage generated across the transistor. This change in voltage is compared to a threshold to detect the ionizing radiation.

Abstract: A method can be used for generating personalized profile package data for integrated circuit cards. The method includes encrypting data records corresponding to profile data with a respective data protection key thereby obtaining encrypted data records. Each record includes a number of personalization fields to store different types of personalization values. The method also includes encrypting a file for a profile package with a master encryption key thereby obtaining an encrypted file for the profile package. The file includes fields to be personalized corresponding to one or more of the personalization fields to store different types of personalization values. The encrypted file for the profile package and encrypted data records are transmitted to a data preparation entity where the encrypted data records and the encrypted file can be decrypted and combined to obtain personalized profile packages.

Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.

Abstract: A system and method is provided for measuring a voltage drop at a node. In embodiments, a circuit includes an analog-to-digital converter, a current sink, and a controller. The input of the analog-to-digital converter and the input of the current sink is coupled to the node to be measured. A set point for the current sink is determined. The output of the analog-to-digital converter during the voltage drop is sampled. And a relative voltage drop value is computed by subtracting the sampled output of the analog-to-digital converter during the voltage drop from a sampled output of the analog-to-digital converter during a steady-state condition. The current sink operating at the set point during the steady-state condition and during the voltage drop.

Abstract: A sensor is driven at a first heating power value. The sensor generates a sensing signal that is indicative of a sensed entity. A possible onset of a sensor contamination condition is detected as a function of the sensing signal generated by the sensor. If such detecting fails to indicate onset of a sensor contamination condition, the sensor continues to be driven at the first heating power value. However, if such detecting indicates onset of a sensor contamination condition, a protection mode is activated. In the protection mode, the sensor is driven at a second heating power value for a protection interval, where the second heating power value is lower than the first heating power value. Furthermore, the operation may refrain from supplying power to the sensor for a further protection interval, wherein the further protection interval is longer than the protection interval.

Abstract: An electronic device includes a processing unit with a memory, a JTAG interface with test-data-input and test-mode-select lines coupled to the processing unit, a bridge circuit, and a multiplexer circuit. The bridge circuit includes a serial communication interface receiving a serial data input signal which conveys an input serial data frame. The bridge circuit includes a serial-to-parallel converter circuit block receiving the input serial data frame, processing the input serial data frame to read first and second subsets of input binary values therefrom, and transmitting the first subset via a first output signal and the second subset via a second output signal. The multiplexer circuit selectively propagates a received test-data-input signal or the first output signal to the test data input line, and selectively propagates a test-mode-select signal or the second output signal to the test mode select line of the JTAG interface.

Abstract: A multi-level pulser circuit comprises a set of first input pins for receiving respective positive voltage signals at different voltage levels, a set of second input pins for receiving respective negative voltage signals at different voltage levels, and a reference input pin configured to receive a reference voltage signal intermediate the positive voltage signals and the negative voltage signals. The circuit comprises an output pin configured to supply a pulsed output signal. The circuit further comprises control circuitry configured to selectively couple the output pin to one of the first input pins, the second input pins and the reference input pin to generate the pulsed output signal at the output pin.

Abstract: An embodiment circuit comprises high-side and low-side switches arranged between supply and reference nodes, and having an intermediate node. A switching control signal is applied with opposite polarities to the high-side and low-side switches. An inductive load is coupled between the intermediate node and one of the supply and reference nodes. Current sensing circuitry is configured to sample a first value of the load current flowing in one of the high-side and low-side switches before a commutation of the switching control signal, sample a second value of the load current flowing in the other of the high-side and low-side switches after the commutation of the switching control signal, sample a third value of the load current flowing in the other of the high-side and low-side switches after the second sampling, and generate a failure signal as a function of the first, second and third sampled values of the load current.

Abstract: A circuit includes an electronic switch configured to be coupled intermediate a high-voltage node and low-voltage circuitry and configured to couple the low-voltage circuitry to the high-voltage node. A voltage-sensing node is configured to be coupled to the high-voltage node via a pull-up resistor. A further electronic switch can be switched to a conductive state to couple the voltage-sensing node and the control node of the electronic switch. A comparator compares a threshold with a voltage at the voltage-sensing node and causes the further electronic switch to switch on in response to the voltage at said voltage-sensing node reaching said threshold. A charge pump coupled to the current flow-path of the electronic switch is activated to the conductive state to pump electric charge from the current flow-path of the electronic switch to the control node of the electronic switch via the further electronic switch switched to the conductive state.