Abstract: In accordance with an embodiment, a method of operating a node coupled to a power network and a communications link includes receiving a status from a further node coupled to the power network via the communications link, and adjusting a power consumption of a device coupled to the node and powered by the power network based on the status message and based on a first rule set.
Abstract: A method for making a semiconductor device may include forming a first semiconductor layer on a substrate comprising a first semiconductor material, forming a second semiconductor layer on the first semiconductor layer comprising a second semiconductor material, and forming mask regions on the second semiconductor layer and etching through the first and second semiconductor layers to define a plurality of spaced apart pillars on the substrate. The method may further include forming an oxide layer laterally surrounding the pillars and mask regions, and removing the mask regions and forming inner spacers on laterally adjacent corresponding oxide layer portions atop each pillar. The method may additionally include etching through the second semiconductor layer between respective inner spacers to define a pair of semiconductor fins of the second semiconductor material from each pillar, and removing the inner spacers and forming an oxide beneath each semiconductor fin.
Type:
Application
Filed:
October 31, 2013
Publication date:
April 30, 2015
Applicants:
GLOBALFOUNDRIES Inc., STMicroelectronics, Inc.
Abstract: A near-field magnetic induction system includes a metallic structure, an amorphous metal barrier and a near-field magnetic induction device. The device includes an antenna coupled to the amorphous metal barrier and a circuit electrically coupled to the antenna. In use, the antenna is separated from the metallic structure by the amorphous metal barrier. The amorphous metal barrier may be integrated with the near-field magnetic induction device or with the metallic structure. Inductive coupling with the near-field magnetic induction device may be used, for example, in communication or energy transfer applications such as RFID tags and inductive chargers.
Abstract: An ink jet printhead device includes a substrate and at least one first dielectric layer above the substrate. A resistive layer is above the at least one first dielectric layer. An electrode layer is above the resistive layer and defines first and second electrodes coupled to the resistive layer. At least one second dielectric layer is above the electrode layer and contacts the resistive layer through the at least one opening. The at least one second dielectric layer has a compressive stress magnitude of at least 340 MPa.
Type:
Grant
Filed:
May 14, 2013
Date of Patent:
April 28, 2015
Assignees:
STMicroelectronics, Inc., STMicroelectronics Asia Pacific Pte. Ltd.
Inventors:
Madanagopal Kunnavakkam, Teck Khim Neo, Kenneth W. Smiley
Abstract: Methods and systems are described for improving a data at a receiver using one or more signal peak detectors. A signal is received having an initial signal level from the transmitter, the signal having a long bit and a short bit. The initial signal voltage of the signal is measured using a signal peak detector. A pre-emphasis value is determined using the signal voltage and is communicated to the transmitter, causing the transmitter to transmit the signal using an adjusted signal level. A second signal voltage of the initial signal is measured using a second signal peak detector, the second signal voltage being used to determine the pre-emphasis value. In another embodiment, a state machine having data relating to appropriate pre-emphasis is used in determining the pre-emphasis value. In another embodiment, one peak detector is used to measure the long bit and another peak detector is used to measure the short bit. In another embodiment, the signal does not have associated link training data.
Abstract: In one embodiment, systems and methods of operating a SOVA system is disclosed that comprises determining the start and stop values for a trellis tree and using the start and stop values to determine the initial states of a plurality of branches within the trellis tree.
Type:
Grant
Filed:
October 1, 2010
Date of Patent:
April 28, 2015
Assignee:
STMicroelectronics, Inc.
Inventors:
Sivagnanam Parthasarathy, Lun Bin Huang
Abstract: A system includes a plurality of stations capable of communicating with each other. A station of the system may comprise multiple antenna subassemblies and a receiver coupled to the subassemblies. The station is operable to activate one or more of the subassemblies to determine a direction of a first incoming signal, and to then activate another one or more of the subassemblies to receive a second incoming signal from substantially the same direction. Alternatively, the station may comprise multiple antenna subassemblies and a receiver coupled to the subassemblies and operable to activate each of the subassemblies for a respective interval to service at least one respective transmitting station covered by the activated subassembly during the interval.
Abstract: A strain enhanced transistor is provided having a strain inducing layer overlying a gate electrode. The gate electrode has sloped sidewalls over the channel region of the transistor.
Abstract: In an embodiment, a channel estimator includes first and second stages. The first stage is operable to generate a respective one-dimensional array of first channel-estimation coefficients for each communication path of a communication channel, and the second stage is operable to generate a multi-dimensional array of second channel-estimation coefficients in response to the first channel-estimation coefficients. For example, such a channel estimator may estimate the response of a channel over which propagates an orthogonal-frequency-division-multiplexed (OFDM) signal that suffers from inter-carrier interference (ICI) due to Doppler spread. Such a channel estimator may estimate the channel response more efficiently, and with a simpler algorithm, than conventional channel estimators.
Type:
Grant
Filed:
December 8, 2010
Date of Patent:
April 28, 2015
Assignees:
STMicroelectronics, Inc., STMicroelectronics Asia Pacific Pte. Ltd.
Abstract: In a general aspect, an integrated circuit package includes a first electrode and a second electrode on a support substrate. The first electrode and the second electrode are configured to be electrically coupled to a voltage differential. A dendritic migration of a migratory species can develop under the voltage differential and a non-hermetic environment. The dendritic migration is interrupted by a floating electrical barrier mounted onto the support substrate between the first electrode and the second electrode. The electrical barrier includes a dam for preventing the metal migration. The dam has a height approximately equal to or greater than the largest dimension of a single atom of the migratory species. The first electrode and the second electrode can be mounted on the same side of the support substrate, or on two opposite sides of the support substrate.
Type:
Grant
Filed:
September 16, 2013
Date of Patent:
April 28, 2015
Assignee:
STMicroelectronics, Inc.
Inventors:
John C. Pritiskutch, Richard R. Hildenbrandt
Abstract: A method for forming a complementary metal oxide semiconductor (CMOS) semiconductor device includes providing a stressed silicon-on-insulator (sSOI) wafer comprising a stressed semiconductor layer having first and second laterally adjacent stressed semiconductor portions. The first stressed semiconductor portion defines a first active region. The second stressed semiconductor portion is replaced with an unstressed semiconductor portion. The unstressed semiconductor portion includes a first semiconductor material. The method further includes driving a second semiconductor material into the first semiconductor material of the unstressed semiconductor portion defining a second active region.
Abstract: An ink jet printhead device includes a substrate and a plurality of thermal resistors on the substrate. Each thermal resistor includes first and second electrodes and a resistive layer extending therebetween. A polarity-changing driver is coupled to the plurality of thermal resistors and configured to change a driving polarity between the first and second electrodes of each of the plurality of thermal resistors.
Abstract: A plurality of metal tracks are formed in an integrated circuit die in three metal layers stacked within the die. A protective dielectric layer is formed around metal tracks of an intermediate metal layer. The protective dielectric layer acts as a hard mask to define contact vias between metal tracks in the metal layers above and below the intermediate metal layer.
Type:
Grant
Filed:
September 27, 2012
Date of Patent:
April 28, 2015
Assignees:
STMicroelectronics, Inc., International Business Machines Corporation
Inventors:
John H. Zhang, Lawrence A. Clevenger, Carl Radens, Yiheng Xu
Abstract: A method and apparatus for digital image correction in which a plurality of received color component arrays received from a digital camera are each corrected for distortion dependent upon the color associated with the array. Other corrections may also be applied, such as for sensitivity non-uniformity in the sensing array or illumination non-uniformity. The corrected color component arrays for each of the plurality of color components are combined to form a corrected digital image. The method and apparatus may be integrated with digital cameras in a variety of applications including, but not limited to, digital document imaging.
Abstract: A method for making a semiconductor device may include forming, on a substrate, at least one stack of alternating first and second semiconductor layers. The first semiconductor layer may comprise a first semiconductor material and the second semiconductor layer may comprise a second semiconductor material. The first semiconductor material may be selectively etchable with respect to the second semiconductor material. The method may further include removing portions of the at least one stack and substrate to define exposed sidewalls thereof, forming respective spacers on the exposed sidewalls, etching recesses through the at least one stack and substrate to define a plurality of spaced apart pillars, selectively etching the first semiconductor material from the plurality of pillars leaving second semiconductor material structures supported at opposing ends by respective spacers, and forming at least one gate adjacent the second semiconductor material structures.
Type:
Application
Filed:
October 23, 2013
Publication date:
April 23, 2015
Applicants:
GLOBALFOUNDRIES INC., STMicroelectronics, Inc.
Abstract: In one embodiment of the present invention, a method is provided for providing border handling in motion compensated interpolation, wherein a camera model is used to detect areas of predominant movements in a displayable output, and for each reveal or conceal area: it is determined whether the reveal or conceal areas is due to a camera movement or an object movement. If the reveal or conceal areas is due to a camera movement. The camera model is used to arrive at interpolated pixel values for pixels within the corresponding area. If the reveal or conceal areas is not due to a camera movement, arriving at interpolated pixel values for pixels within the corresponding area without using the camera model.
Abstract: An integrated heater formed as a field effect transistor in a semiconductor substrate, with the transistor having source and drain regions with a channel region extending therebetween to conduct current. The channel region has a resistance when conducting current to generate heat above a selected threshold. A dielectric layer is disposed on the channel region and a gate electrode is disposed on the dielectric layer to control the current of the channel region. A thermally insulating barrier is formed in the semiconductor material and may extend about the transistor. The object to be heated is positioned to receive the heat generated by the resistance of the channel region; the object may be a fluid chamber.
Abstract: A semiconductor device includes a semiconductor substrate having a channel region therein, a gate structure above the channel region, and source and drain regions on opposite sides of the gate structure. A respective contact is on each of the source and drain regions. At least one of the source and drain regions has an inclined upper contact surface with the respective contact. The inclined upper contact surface has at least a 50% greater area than would a corresponding flat contact surface.
Type:
Grant
Filed:
August 21, 2012
Date of Patent:
April 21, 2015
Assignee:
STMicroelectronics, Inc.
Inventors:
Qing Liu, Prasanna Khare, Nicolas Loubet
Abstract: An integrated circuit package is provided with a thin-film battery electrically connected to and encapsulated with an integrated circuit die. The battery can be fabricated on a dedicated substrate, on the die pad, or on the integrated circuit die itself.
Type:
Grant
Filed:
July 1, 2014
Date of Patent:
April 21, 2015
Assignee:
STMicroelectronics, Inc.
Inventors:
Michael J. Hundt, Haibin Du, Krishnan Kelappan, Frank Sigmund
Abstract: A method and apparatus for negotiating an idle subchannel set for a wireless data transmission. The method includes transmitting an indication of a first set of idle subchannels to a wireless station. The method also includes receiving an indication of a second set of idle subchannels from the wireless station. The method further includes determining a final set of idle subchannels based on the indication of the first set of idle subchannels and the indication of the second set of idle subchannels.