Abstract: An electronic device includes a semiconductor body of silicon carbide, and a body region at a first surface of the semiconductor body. A source region is disposed in the body region. A drain region is disposed at a second surface of the semiconductor body. A doped region extends seamlessly at the entire first surface of the semiconductor body and includes one or more first sub-regions having a first doping concentration and one or more second sub-regions having a second doping concentration lower than the first doping concentration. Thus, the device has zones alternated to each other having different conduction threshold voltage and different saturation current.

Abstract: A control module is used to control a switching buck-boost converter that includes an inductor, a capacitor, a first top switch and a second top switch, a first bottom switch and a second bottom switch and a diode coupled to the second top switch. The control module controls the switching buck-boost converter so as to alternate: first time periods, in which the second top switch is open and cycles of charge and discharge of the inductor are carried out, during which the inductor is traversed by a current that also passes through the diode and charges the capacitor; and second time periods, in which the first and second top switches are open and the first and second bottom switches are closed so that the current in the inductor recirculates, and the capacitor is discharged by a current that flows in the load.

Abstract: In an embodiment, a radio frequency (RF) receiver circuit includes a main circuit and a wake-up circuit. The main circuit is configured to process RF signals. The wake-up circuit is configured to detect a reception of the RF signals. The wake-up circuit includes an automatic gain control (AGC) loop, and is configured to have a first operating mode where a set point voltage of the loop has a first substantially constant value, and a second operating mode where the set point voltage of the loop has a second value dependent on a power supply voltage of the wake-up circuit.

Abstract: The present description concerns a device including phase-change memory cells, each memory cell including a first resistive element in lateral contact with a second element made of a phase-change material.

Abstract: A read-modify-write operation is performed, within a single cycle of a clock signal, by: decoding an address to select a word line of a memory; applying a word line signal at a first voltage level to the selected word line; reading a current data word from a data word location in the memory; reducing the word line signal from the first voltage level to the second voltage level; performing a mathematical modify operation internally within the memory on the current data word to generate a modified data word; increasing the word line signal from the second voltage level to the first voltage level; and writing the modified data word back to the location in the memory.

Abstract: According to an embodiment, a method for determining an orientation of an object in a field-of-view of a time-of-flight sensor is proposed. The method includes receiving a sensor readout from the time-of-flight sensor; feeding the sensor readout as an input to a neural network, the neural network trained on a set of data with a binary output that classifies the input as being valid or invalid based on the orientation of the object with respect to the time-of-flight sensor; rotating the sensor readout for a set number of rotations and feeding each rotation as an input to the neural network to determine a valid orientation of the object; and rotating an image on a display interface based on the rotation corresponding to the valid orientation of the object as determined by the neural network.

Abstract: In accordance with an embodiment, a circuit is configured to vary an intensity of a drive current of a resistive heater element based on the digital control signal. The circuit includes and output circuit configured to control a respective slew rate and an electric energy dissipated in the resistive heater element independently of a resistance value of the resistive heater element.

Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.

Abstract: A method is provided for monitoring an execution of a selected program code portion stored in a memory address range between a start address and an end address. The method includes starting a timing when a program counter points to the start address of the selected program code portion. Current values of the program counter are compared with a set of target addresses specific to the selected program code portion including the end address of the selected program code portion. The timing is stopped when the program counter points to the end address of the selected program code portion. An error signal is generated in response to the timing duration being outside a nominal duration range specific to the selected program code portion.

Abstract: Electrostatic discharge (ESD) protection is provided in circuits which use of a tunneling field effect transistor (TFET) or an impact ionization MOSFET (IMOS). These circuits are supported in silicon on insulator (SOI) and bulk substrate configurations to function as protection diodes, supply clamps, failsafe circuits and cutter cells. Implementations with parasitic bipolar devices provide additional parallel discharge paths.

Abstract: According to one aspect, a computer system is provided comprising: a data memory configured to store a byte array, a digital signal processor configured to execute a computer program stored in a program memory comprising instructions allowing accessing a bit in said byte array, said digital signal processor being configured to access each byte of said byte array, a dedicated circuit configured to read and/or write access a bit of a byte of said byte array using: a bit position pointer pointing towards the bit to be accessed in the byte array in combination, and said byte comprising the bit to be accessed.

Abstract: A manufacturing process for microelectromechanical devices includes: on a first wafer forming a structural layer and a stop layer; defining a stop pad from the stop layer; forming a first microelectromechanical structure and a second microelectromechanical structure in the structural layer; forming a contact element protruding from a second wafer; sealing, at a first pressure, the first microelectromechanical structure in a first chamber and the second microelectromechanical structure and the stop pad in a second chamber; fluidically coupling the second chamber to an external environment; and sealing the second chamber at a second pressure. Sealing at the first pressure comprises bonding the second wafer to the first wafer so that the contact element rests on the stop pad. Fluidically coupling comprises defining fluidic passages at an interface between the contact element and the stop pad and opening an access hole through the second wafer in communication with the fluidic passages.

Abstract: A process for manufacturing a vertical conduction MOSFET device including a body of silicon carbide having a first conductivity type and a face. A metallization region extends on the face of the body. A body region of a second conductivity type extends in the body, from the face of the body, along a first direction parallel to the face and along a second direction transverse to the face. A source region of the first conductivity type extends towards the inside of the body region, from the face of the body, and has a first portion and a second portion. The first portion has a first doping level and extends in direct electrical contact with the metallization region. The second portion has a second doping level and extends in direct electrical contact with the first portion of the source region. The second doping level is lower than the first doping level.

Abstract: A process for manufacturing microelectromechanical devices includes forming a dielectric layer and a structural layer on a substrate of a first semiconductor wafer and forming a first and a second microelectromechanical device in the structural layer. The first and second microelectromechanical devices are sealed respectively in a first chamber and in a second chamber at a first pressure. The first chamber is fluidically coupled to an external environment through the substrate and sealed at a second pressure different from the first pressure. To fluidically couple the first chamber to the outside, there are formed a stop layer between the dielectric layer and the structural layer and a cavity fluidically coupled to the first chamber in the dielectric layer. A channel is formed by etching the substrate in a position corresponding to the cavity and the stop layer, and the etching of the substrate is ended against the stop layer.

Abstract: In a multi-level hybrid DC-DC converter with a flying capacitor, a feedback circuit includes a first oscillator and produces a first clock signal with a frequency dependent on an output voltage. A second oscillator produces a second clock signal having a frequency dependent on a reference voltage. A logic circuit switches, as a function of the first and second clock signals, connection of the flying capacitor between one state where the flying capacitor is connected between an input node and a switching node, and another state where the capacitor is connected between the switching node and a ground node. The duty cycle of the first/second clock signal varies so that when the flying capacitor voltage is lower than a target voltage a duration of the one state is increased, and when the flying capacitor voltage is higher than the target voltage a duration of the another state is increased.

Abstract: A method for manufacturing an electronic device based on SiC includes forming a structural layer of SiC on a front side of a substrate. The substrate has a back side that is opposite to the front side along a direction. Active regions of the electronic device are formed in the structure layer, and the active regions are configured to generate or conduct electric current during the use of the electronic device. A first electric terminal is formed on the structure layer, and an intermediate layer is formed at the back side of the substrate. The intermediate layer is heated by a LASER beam in order to generate local heating such as to favor the formation of an ohmic contact of Titanium compounds. A second electric terminal of the electronic device is formed on the intermediate layer.

Abstract: System, method, and circuitry for generating a linker model for use by a toolchain associated with a programmable computing device. One or more regions in the memory resources available to the programmable computing devices is defined for used by an application executing on the programmable computing device. One or more sections is defined for those regions for use by the application. Resource boundaries are generated for the application based on the defined regions and the defined sections. A user is enabled to modify the defined regions or the defined sections or the generated resource boundaries. A linker model is then generated based on the available memory resources, the defined regions, the defined sections, and the generated resource boundaries. This linker model is then utilized to generate a linker script for the programmable computing device based the linker syntax compatible with a toolchain linker for the programmable computing device.

Abstract: First and second wells are formed in a semiconductor substrate. First and second trenches in the first second wells, respectively, each extend vertically and include a central conductor insulated by a first insulating layer. A second insulating layer is formed on a top surface of the semiconductor substrate. The second insulating layer is selectively thinned over the second trench. A polysilicon layer is deposited on the second insulating layer and then lithographically patterned to form: a first polysilicon portion over the first well that is electrically connected to the central conductor of the first trench to form a first capacitor plate, a second capacitor plate formed by the first well; and a second polysilicon portion over the second well forming a floating gate electrode of a floating gate transistor of a memory cell having an access transistor whose control gate is formed by the central conductor of the second trench.

Abstract: A system on chip (SoC) includes a CPU, a main bus, and a plurality of subsystems. The SoC also includes an address remapping module coupled between the CPU and the bus. The address remapping module quickly and efficiently changes any memory addresses that need to be changed with the CPU requests a read or write operation associated with the addresses.

Abstract: A memory cell is manufactured by: (a) forming a stack comprising a first layer made of a phase change material and a second layer made of a conductive material; (b) forming a mask on the stack covering only the memory cell location; and (c) etching portions of the stack not covered by the first mask. The formation of the mask covering only the memory cell location comprises defining a first mask extending in a row direction for each row of memory cell locations and then patterning the first mask in a column direction for each column of memory cell locations.