Patents Assigned to STMicroelectronics (Research & Development) Limite
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Patent number: 12332721Abstract: A memory chip includes at least two memory blocks. In a method for controlling power supply for the memory blocks of the memory chip, each memory block receives a command for switching to standby mode. The commands are issued, for example by a processor, separately for each memory block in order to be able to individually place the memory block in standby mode.Type: GrantFiled: December 20, 2022Date of Patent: June 17, 2025Assignee: STMicroelectronics (Grenoble 2) SASInventor: Gerald Briat
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Patent number: 12330934Abstract: Disclosed herein is a process flow for forming a MEMS IMU including an accelerometer and a gyroscope each located in a separate sealed cavity maintained at a different pressure. Formation of the MEMS IMU includes the use of a first vHF release to etch a sacrificial layer underneath a structural layer containing the accelerometer and gyroscope and capping the device under formation to set both cavities at a first pressure. The floor of one of the cavities is formed to including a gas permeable layer. Formation further includes forming a chimney underneath the gas permeable layer and then performing a second vHF release to etch through the gas permeable layer and expose the cavity containing the gas permeable layer so that its pressure may be set to be different than that of the other cavity when the chimney is sealed.Type: GrantFiled: December 20, 2022Date of Patent: June 17, 2025Assignee: STMicroelectronics International N.V.Inventors: Federico Vercesi, Andrea Nomellini, Paolo Ferrari
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Patent number: 12335402Abstract: In accordance with an embodiment, a video flow transmission method includes: the generating, by an image sensor, a video flow comprising first and second images; hashing, by the image sensor, a portion of the first image based on a first hashing configuration to generate a first hash value, the first hashing configuration defining first positions of pixels to be hashed; hashing, by the image sensor, a portion of the second image based on a second hashing configuration to generate a second hash value, the second hashing configuration being different from the first configuration and defining second positions of pixels to be hashed; and transmitting, by the image sensor, the first and second images, and the first and second hash values, to a second device.Type: GrantFiled: January 5, 2023Date of Patent: June 17, 2025Assignee: STMicroelectronics (Grenoble 2) SASInventor: Jérôme Pierre René Chossat
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Patent number: 12329530Abstract: A device for monitoring the health state is made in a chip including a semiconductor die integrating an electric potential sensor and a cardiac parameter determination unit. The potential sensor is configured to detect potential variations on the body of a living being and associated with a heart rhythm and to generate a cardiac signal. The cardiac parameter determination unit is configured to receive the cardiac signal and determine cardiac parameters indicative of a health state. In particular, the cardiac parameter determination unit is configured to detect triggering events and to determine features of the cardiac signal in time windows defined by the triggering events. The die also integrates a decision unit, configured to receive the cardiac parameters and generate a health signal based on a comparison with threshold values. The cardiac parameters include heart rate and QRS-complex.Type: GrantFiled: July 21, 2022Date of Patent: June 17, 2025Assignee: STMicroelectronics S.r.l.Inventors: Enrico Rosario Alessi, Marco Leo, Luca Gandolfi, Fabio Passaniti, Marco Castellano
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Patent number: 12334119Abstract: A voice coil motor (VCM) in a hard disk drive is operated in a discontinuous mode with an alternation of on and off times. A drive current to the VCM is facilitated and countered with a variable voltage across the during the on-times and off-times. The intensity of the drive current is controlled as a function of a Back ElectroMotive Force (BEMF) of the VCM. A method includes sampling during the alternation of on-times and off-times first and second values of the voltage across the VCM. The first value is sampled at a first time in response to the end of the off-time. The second value is sampled at a second time in response to the drive current of the VCM zeroing following the supply of drive current to the VCM being countered during the off-time. The BEMF is calculated as a function of first and second values.Type: GrantFiled: May 30, 2024Date of Patent: June 17, 2025Assignee: STMicroelectronics International N.V.Inventor: Michele Boscolo Berto
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Patent number: 12332727Abstract: In accordance with an embodiment, a method includes determining whether a frame received from a communication bus is encoded according to a particular communication protocol and is addressed to a particular electronic device; increasing a frame count value when the frame is encoded according to the particular communication protocol and is addressed to the particular electronic device based on the determination, wherein increasing the frame count value comprises increasing a count of a modular arithmetic counter circuit having a first bit depth, and the frame count value is constrained to a modulus value of the modular arithmetic counter circuit; setting a frame count status bit based on comparing the frame count value to threshold values, and transmitting a frame comprising the frame counter status bit over the communication bus, and resetting the frame count value at an end of a monitoring time interval.Type: GrantFiled: April 28, 2023Date of Patent: June 17, 2025Assignee: STMicroelectronics Application GMBHInventor: Fred Rennig
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Publication number: 20250192022Abstract: A process is provided for manufacturing electronic components with wettable flanks from a substrate in which chips are formed, the chips being separated by cavities, the process including a first step in which an insulating material layer is deposited and then a second step in which a conductive material layer is deposited on the insulating material layer to form wettable flanks. An electronic component with wettable flanks is also provided.Type: ApplicationFiled: November 27, 2024Publication date: June 12, 2025Applicant: STMicroelectronics International N.V.Inventor: Gregoire DELACOURT
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Publication number: 20250190003Abstract: A linear voltage regulator includes a first amplification stage configured to produce an error signal at an intermediate node as a function of a difference between a first reference voltage and a regulated output voltage. An intermediate amplification stage amplifies the error signal to produce an amplified error signal. A driver stage produces a drive signal as a function of the amplified error signal. A pass device is controlled by the drive signal to produce the regulated output voltage. A feedback circuit produces a feedback current as a function of a difference between the drive signal and a second reference voltage. The feedback current is the sourced to the intermediate node.Type: ApplicationFiled: December 4, 2024Publication date: June 12, 2025Applicant: STMicroelectronics International N.V.Inventor: Stephan DREBINGER
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Publication number: 20250194205Abstract: A method of manufacturing an electronic device includes the steps of: forming, on a first side of a solid body of Silicon, a first covering layer of SiO2, forming, on the first covering layer, a second covering layer of SiN, and forming, on the second covering layer, a third covering layer of TEOS; forming a passing opening through the first, second and third covering layers. The method includes forming a trench at the portion of the solid body exposed through the opening; grow a sacrificial layer, of the first oxide, within the trench and performing in the order: selectively etching part of the second covering layer, completely removing the sacrificial layer and the third covering layer in one or more contextual etching steps.Type: ApplicationFiled: December 3, 2024Publication date: June 12, 2025Applicant: STMicroelectronics International N.V.Inventors: Mario Francesco PISTONI, Simone Dario MARIANI, Paola ZULIANI, Emilie PREVOST, Ambra PISANU
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Publication number: 20250194439Abstract: The present description concerns a device including phase-change memory cells, each memory cell including a first resistive element in lateral contact with a second element made of a phase-change material.Type: ApplicationFiled: February 19, 2025Publication date: June 12, 2025Applicant: STMicroelectronics (Rousset) SASInventor: Philippe BOIVIN
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Publication number: 20250194267Abstract: A method of manufacturing an image sensor comprising the forming of an opening in a substrate, the forming of a conductive pad covering the flanks of the opening and delimiting a gap in the opening, the forming of microlenses in a layer made of a first resin, the layer made of the first resin covering the pad and penetrating into the gap, the forming of a mask made of a second resin on top of and in contact with the layer made of the first resin, the chemical plasma etching of the layer made of the first resin, through the mask, delimiting a block of the first resin in the gap, the deposition of a protective layer on the microlenses and on the block, the removal of the portion of the protective layer covering the block, and the etching of the block.Type: ApplicationFiled: November 27, 2024Publication date: June 12, 2025Applicants: STMicroelectronics International N.V., COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Pierre BAR, Marc GUILLERMET
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Publication number: 20250190002Abstract: A method for regulating voltage in an electronic device includes receiving, at a power stage, a gate voltage from an input terminal, and delivering an output voltage and an output current to a processing module based on the gate voltage. The gate voltage is compensated by comparing the output voltage with a reference voltage to produce a compensated gate voltage. The gate voltage compensation is sped by up stabilizing the output voltage during transitions between operational modes using a first compensation stage, decoupling a second compensation stage from the input terminal when a control signal is asserted to thereby precharge a compensation capacitor to an initial compensation voltage, and coupling the second compensation stage to the input terminal via a compensation resistor when the control signal is deasserted to thereby deliver the initial compensation voltage to the input terminal.Type: ApplicationFiled: December 6, 2023Publication date: June 12, 2025Applicant: STMicroelectronics FranceInventors: Lionel VOGT, Eoin Padraig O HANNAIDH
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MICROELECTROMECHANICAL SENSOR WITH EXTERNAL FLUIDIC COUPLING HAVING CONTAMINATION-REDUCING STRUCTURE
Publication number: 20250189392Abstract: A microelectromechanical sensor includes: a supporting body, containing semiconductor material; and a cap, of semiconductor material, coupled to the supporting body and having an internal surface arranged facing the supporting body and a plurality of inlet holes. The sensor further includes a sensing structure, comprising a measuring chamber and a sensitive element, the sensitive element being formed at least partially in the supporting body and facing the measuring chamber; fluidic paths configured to couple the sensing structure with the environment external to the sensor through the inlet holes, and having an access section to the measuring chamber; and trapping structures defined in the supporting body. The trapping structures are in communication with respective fluidic paths and extend in the supporting body at least partially at a greater distance, from the internal surface of the cap, with respect to the access section of each fluidic path.Type: ApplicationFiled: November 26, 2024Publication date: June 12, 2025Applicant: STMicroelectronics International N.V.Inventors: Filippo DANIELE, Lorenzo BALDO, Silvia NICOLI -
Publication number: 20250185946Abstract: A wearable electronic device detects the breathing of a user based on bone conduction of sounds waves. The wearable electronic device includes an inertial sensor unit. The inertial sensor unit generates sensor data based on bone conduction of sound. The inertial sensor unit generates frequency domain data based on the sensor data. The inertial sensor unit detects breathing of the user by performing a classification process based on the frequency domain data.Type: ApplicationFiled: December 12, 2023Publication date: June 12, 2025Applicant: STMicroelectronics International N.V.Inventors: Alessandro MAGNANI, Federico RIZZARDINI
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Publication number: 20250194272Abstract: A semiconductor photodetector includes an active region made of a doped semiconductor material of a first conductivity type. The active region is configured to convert a light radiation into charge carriers and to store the charge carriers. At least one repulsion element is positioned within the active region and configured to repel charge carriers stored in the active region.Type: ApplicationFiled: December 5, 2024Publication date: June 12, 2025Applicant: STMicroelectronics International N.V.Inventor: Arthur ARNAUD
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Publication number: 20250192740Abstract: Described herein is an operational transconductance amplifier (OTA) with a constant current source that provides a constant current to a node. The OTA includes two input pairs of transistors: the first sources variable currents based on feedback and input voltages, while the second sinks variable currents also based on feedback and input voltages. A folded cascode arrangement includes two branches, with one branch including a Monticelli cell. A class-AB output stage is present, with its inputs connected across the Monticelli cell. Additionally, a bias stage mirrors and scales the constant current to generate control voltages. Within the folded cascode branches, compensation transistors are controlled by these control voltages, ensuring that various sourced and sunk variable currents are of equal magnitude, making the OTA input voltage independent.Type: ApplicationFiled: December 11, 2023Publication date: June 12, 2025Applicant: STMicroelectronics International N.V.Inventor: Lorenzo GIANCRISTOFARO
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Patent number: 12328962Abstract: An electronic device includes a stack of a first level having a SPAD, a second level having a quench circuit for said SPAD, and a third level having a circuit for processing data generated by said SPAD. A method for making the device includes: a) forming of the first level; b) bonding, on the first level, by molecular bonding, of a stack of layers including a semiconductor layer; and c) forming the quench circuit of the second level in the semiconductor layer.Type: GrantFiled: November 3, 2023Date of Patent: June 10, 2025Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Research &Development) LimitedInventors: Francois Guyader, Sara Pellegrini, Bruce Rae
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Patent number: 12327129Abstract: A processing system includes safety monitoring circuits configured to generate error signals by monitoring a microprocessor operations, a memory controller, and/or a resource. The system further includes fault collection sub-circuits, each including one or more error combination circuits, each including a first programmable register and being configured to receive a subset of the error signals, determine whether an error signal is asserted, and store to the first register error status data that identifies the asserted error signal. Each error combination circuit is configured to read enable data from the first register and generate a combined error signal based on the error status and enable data. The error management circuit includes a second programmable register and is configured to receive the combined error signals, read routing data from the second register, and generate for each microprocessor an error signal based on the combined error signals and routing data.Type: GrantFiled: April 4, 2022Date of Patent: June 10, 2025Assignees: STMicroelectronics Application GMBH, STMicroelectronics International N.V.Inventors: Roberto Colombo, Vivek Mohan Sharma
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Publication number: 20250185242Abstract: Lateral isolation regions are formed in a semiconductor substrate to delimiting active regions of the semiconductor substrate. A trench is then etched extending vertically in depth in the substrate through the lateral isolation regions and the active regions. The formation of the lateral isolation regions is configured to provide, at the location of where the etching of the trench is to be performed, enlarged portions of the lateral isolation regions delimiting thinned portions of the active regions. As a result, the bottom of the trench has a form having variations in depth with low portions facing the location of the trench that passes through the lateral isolation regions, and high portions facing the location of the trench that passes through the active regions.Type: ApplicationFiled: November 26, 2024Publication date: June 5, 2025Applicant: STMicroelectronics International N.V.Inventors: Carlos Augusto SUAREZ SEGOVIA, Simon JEANNOT, Catherine MARTINELLI, Nadia MIRIDI
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Publication number: 20250184188Abstract: Disclosed is a receiver that includes a pre-amplifier circuit and an amplifier circuit. The pre-amplifier circuit includes first and second input terminals that receive signals from a transmitter; first and second output terminals that output signals to the amplifier circuit; a first resistor having a first terminal coupled to the first input terminal, and a second terminal coupled to a first node; a second resistor having a first terminal coupled to the second input terminal, and a second terminal coupled to the first node; a third resistor having a first terminal coupled to the first output terminal, and a second terminal coupled to a second node; a fourth resistor having a first terminal coupled to the second output terminal, and a second terminal coupled to the second node; and a switch having a first terminal coupled to the first node, and a second terminal coupled to the second node.Type: ApplicationFiled: November 25, 2024Publication date: June 5, 2025Applicant: STMicroelectronics International N.V.Inventors: Sameer VASHISHTHA, Saiyid Mohammad Irshad RIZVI, Paras GARG