Patents Assigned to STMicroelectronics S.r.l.
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Patent number: 11592911Abstract: A pointing electronic device is provided with: an inertial measurement module, to generate motion input data, indicative of motion of the pointing electronic device, at an input data rate; a pointing determination unit, to implement a pointing algorithm at a processing data rate based on the motion input data, to generate screen-frame displacement data corresponding to 3D-space movements of the pointing electronic device, the processing data rate being higher than the input data rate. The pointing electronic device is further provided with a rate upscaling unit, interposed between the inertial measurement module and the pointing determination unit, to implement a data-rate upscaling of the motion input data, in order to generate upscaled motion input data to be processed by the pointing determination unit at a data rate matching the processing data rate, via a predictive data reconstruction of missing samples based on the actual motion input data.Type: GrantFiled: March 3, 2021Date of Patent: February 28, 2023Assignee: STMicroelectronics S.r.l.Inventors: Federico Rizzardini, Lorenzo Bracco, Stefano Paolo Rivolta, Marco Bianco, Paolo Rosingana, Alessandra Maria Rizzo Piazza Roncoroni
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Patent number: 11593664Abstract: A method can be performed prior to implementation of a neural network by a processing unit. The neural network comprising a succession of layers and at least one operator applied between at least one pair of successive layers. A computational tool generates an executable code intended to be executed by the processing unit in order to implement the neural network. The computational tool generates at least one transfer function between the at least one pair of layers taking the form of a set of pre-computed values.Type: GrantFiled: June 30, 2020Date of Patent: February 28, 2023Assignees: STMicroelectronics (Rousset) SAS, STMicroelectronics S.r.l.Inventors: Laurent Folliot, Pierre Demaj, Emanuele Plebani
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Patent number: 11594966Abstract: A converter circuit includes a half-bridge power circuit with a first and a second switch between an input node and a current node and between the current node ground, respectively. An inductor is coupled between the current node and an output node. Logic control circuitry is configured to switch the first and second switches to a current recirculation state and to a current charge state. The logic circuitry is configured to switch the switches from the current recirculation state to the current charge state as a result of a voltage indicator signal from an output voltage comparator being asserted while starting an on-time counter signal having an expiration value, and from the current charge state to the current recirculation state as a result of the on-time counter signal having reached its expiration value in combination with the voltage indicator signal from the voltage comparator being de-asserted.Type: GrantFiled: March 29, 2021Date of Patent: February 28, 2023Assignee: STMicroelectronics S.r.l.Inventor: Adalberto Mariani
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Patent number: 11594667Abstract: In one embodiment, a method includes forming a plurality of thermocouples coupled in series by forming first metal segments comprising a first metal, each of the first metal segments having a L-shape. The method further includes forming a plurality of deep openings to expose a first contact region of each of the first metal segments, and forming a plurality of shallow openings to expose a second contact region of each of the first metal segments. The method further includes forming second metal segments comprising a second metal over the dielectric layer. The second metal is a different type of metal than the first metal. Each of the second metal segments contacts one of the first contact region of the first metal segments through one of the plurality of deep openings and contacts one of the second contact region of the first metal segments through one of the plurality of shallow openings. The plurality of thermocouples is formed within a building component.Type: GrantFiled: November 22, 2019Date of Patent: February 28, 2023Assignee: STMicroelectronics S.r.l.Inventors: Sebastiano Ravesi, Giovanni Abagnale
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Patent number: 11593609Abstract: Embodiments of an electronic device include an integrated circuit, a reconfigurable stream switch formed in the integrated circuit along with a plurality of convolution accelerators and a decompression unit coupled to the reconfigurable stream switch. The decompression unit decompresses encoded kernel data in real time during operation of convolutional neural network.Type: GrantFiled: February 18, 2020Date of Patent: February 28, 2023Assignees: STMicroelectronics S.r.l., STMicroelectronics International N.V.Inventors: Giuseppe Desoli, Carmine Cappetta, Thomas Boesch, Surinder Pal Singh, Saumya Suneja
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Patent number: 11595039Abstract: A circuit includes a high-side switch and a low-side switch. A first inverter includes first and second discharge current paths activatable to sink first and second discharge currents, respectively, from the control terminal of the high-side switch. A second inverter includes first and second charge current paths activatable to source first and second charge currents to the control terminal of the low-side switch. A high-side sensing current path includes an intermediate high-side control node, and a low-side sensing current path includes an intermediate low-side control node. The second discharge current path is selectively enablable in response to a high-side detection signal at the intermediate high-side control node having a high logic value, and the second charge current path is selectively enablable in response to a low-side detection signal at the intermediate low-side control node having a low logic value.Type: GrantFiled: April 5, 2022Date of Patent: February 28, 2023Assignee: STMicroelectronics S.r.l.Inventors: Noemi Gallo, Edoardo Botti
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Publication number: 20230055825Abstract: A Single Input Dual Output converter includes a first switch coupling an input to a first inductor terminal, a second switch coupling a second inductor terminal to ground, a third switch coupling the second inductor terminal to a positive output, and a fourth switch coupling the first inductor terminal to a negative output. During time-shared control, the negative and positive outputs are independently served by conversion cycles. Each conversion cycle includes: a positive phase with a positive charge phase (closing only the first and second switches), followed by an additional phase (closing only the first and third switches for a given time duration), and followed by a positive discharge phase (closing only the third and fourth switches). Each conversion cycle further includes a negative phase with a negative charge phase (closing only the first and second switches) followed by a negative discharge phase (closing only the second and fourth switches).Type: ApplicationFiled: August 11, 2022Publication date: February 23, 2023Applicant: STMicroelectronics S.r.l.Inventors: Alessandro GASPARINI, Mauro LEONCINI, Claudio LUISE, Alberto CATTANI, Massimo GHIONI, Salvatore LEVANTINO
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Publication number: 20230055842Abstract: A semiconductor device comprises one or more registers having digital signals stored therein. The semiconductor device is configured for communication with one or more external devices and such communication may involve requests for access to portions of these register or registers. Register shield circuitry is provided comprising access detection circuitry configured to detect requests for access to these register portions in communication with the external device or devices. The register shield circuitry is configured to be selectively activated in a register shield mode to shield these register portions from undesired requests for access. When activated in the register shield mode, the register shield circuitry prevents access to these register portions in response to requests for access detected by the access detection circuitry.Type: ApplicationFiled: August 5, 2022Publication date: February 23, 2023Applicant: STMICROELECTRONICS S.r.l.Inventors: Salvatore Marco ROSSELLI, Giuseppe GUARNACCIA
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Publication number: 20230058091Abstract: A solid reagent containment unit is formed by a support; a frame body fixed to the support and delimiting internally, together with the support, an analysis volume; a reagent-adhesion structure within the analysis volume; and at least one reagent cavity, which extends within the reagent-adhesion structure. The reagent-adhesion structure is of an adhesion material embossable at temperatures lower by 6-8° C. than its own melting point and has a melting point such as not to interfere with the analysis. The reagent cavity forms a retention wall, laterally surrounding the reagent cavity, and houses dried reagents. The adhesion material is chosen among wax, such as paraffin, a polymer, such as polycaprolactone, a solid fat, such as cocoa butter, and a gel, such as hydrogel or organogel.Type: ApplicationFiled: November 4, 2022Publication date: February 23, 2023Applicant: STMICROELECTRONICS S.r.l.Inventors: Marco CEREDA, Lillo RAIA, Alessandro Paolo BRAMANTI
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Patent number: 11588408Abstract: An embodiment provides a circuit including a transformer having a primary winding coupled to an input port configured to receive an input voltage and a secondary winding configured to provide an output voltage at an output port, controller circuitry configured to switch on and off a current through the primary winding so that energy is transferred to the secondary winding while switching and supply circuitry connected to the controller circuitry, wherein the supply circuitry is coupled to an auxiliary winding of the transformer and configured to provide a supply voltage for the controller circuitry.Type: GrantFiled: April 26, 2021Date of Patent: February 21, 2023Assignee: STMicroelectronics S.r.l.Inventors: Alberto Bianco, Francesco Ciappa, Giuseppe Scappatura
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Patent number: 11586907Abstract: Embodiments of a device include an integrated circuit, a reconfigurable stream switch formed in the integrated circuit, and an arithmetic unit coupled to the reconfigurable stream switch. The arithmetic unit has a plurality of inputs and at least one output, and the arithmetic unit is solely dedicated to performance of a plurality of parallel operations. Each one of the plurality of parallel operations carries out a portion of the formula: output=AX+BY+C.Type: GrantFiled: February 20, 2019Date of Patent: February 21, 2023Assignees: STMICROELECTRONICS S.r.l., STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Surinder Pal Singh, Giuseppe Desoli, Thomas Boesch
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Patent number: 11587378Abstract: A device includes sensing circuitry, compression circuitry, and a memory. The sensing circuitry, in operation, generates sensor data. The compression circuitry is coupled to the sensing circuitry, and, in operation, determines environmental contexts based on variation rates of sensor data and compresses sensor data based on determined environmental contexts. The compressed data is stored in the memory.Type: GrantFiled: September 4, 2020Date of Patent: February 21, 2023Assignee: STMICROELECTRONICS S.r.l.Inventors: Marco Castellano, Marco Leo
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Patent number: 11587866Abstract: A method of manufacturing an integrated electronic device including a semiconductor body and a passivation structure including a frontal dielectric layer bounded by a frontal surface. A hole is formed extending into the frontal surface and through the frontal dielectric layer. A conductive region is formed in the hole. A barrier layer is formed in the hole and extends into the hole. A first coating layer covers a top and sides of a redistribution region of the conductive region and a second coating layer covers is formed covering the first coating layer. A capillary opening is formed extending into the first and second coating layers to the barrier layer. A cavity is formed between the redistribution region and the frontal surface and is bounded on one side by the first coating layer and on the other by the barrier structure by passing an aqueous solution through the capillary opening.Type: GrantFiled: August 21, 2020Date of Patent: February 21, 2023Assignee: STMICROELECTRONICS S.r.l.Inventors: Francesco Maria Pipia, Ivan Venegoni, Annamaria Votta, Francesca Milanesi, Samuele Sciarrillo, Paolo Colpani
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Patent number: 11588353Abstract: The present disclosure relates to a device comprising an inductive element and a first capacitive element series connected between a first node and a second node, a first MOS transistor connected between the first node and a third node configured to receive a reference potential, the second node being coupled directly or via a second MOS transistor to the third node, a second capacitive element connected between a fourth node and an interconnection node between the first capacitive element and the inductive element, a current generator configured to provide an AC current to the fourth node, and a switch connected between the fourth node and the third node.Type: GrantFiled: August 30, 2021Date of Patent: February 21, 2023Assignees: STMicroelectronics (Grand Ouest) SAS, STMicroelectronics S.r.l.Inventors: Lionel Cimaz, Antonio Borrello, Simone Ludwig Dalla Stella
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Publication number: 20230049088Abstract: A semiconductor device includes a pre-molded leadframe mounting substrate. The substrate includes a die pad (configured to have a semiconductor die mounted thereon) and a first electrically conductive pad and a second electrically conductive pad. A strip of insulating material is molded between the first and second electrically conductive pads to provide a mutually electrically insulation and extends in a longitudinal direction with the first electrically conductive pad and the second electrically conductive pad lying on opposite sides of the strip of insulating material. A semiconductor die is arranged on the die pad in register with the strip of insulating material. A single electrically conductive ribbon extending in register with the strip of insulating material electrically couples the semiconductor die with both the first and second electrically conductive pads to provide a common current flow path from the semiconductor die towards the first and the second electrically conductive pads.Type: ApplicationFiled: August 5, 2022Publication date: February 16, 2023Applicant: STMicroelectronics S.r.l.Inventor: Mauro MAZZOLA
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Publication number: 20230047815Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.Type: ApplicationFiled: October 31, 2022Publication date: February 16, 2023Applicant: STMICROELECTRONICS S.r.l.Inventors: Ferdinando IUCOLANO, Alessandro CHINI
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Publication number: 20230048422Abstract: A device for monitoring the health state is made in a chip including a semiconductor die integrating an electric potential sensor and a cardiac parameter determination unit. The potential sensor is configured to detect potential variations on the body of a living being and associated with a heart rhythm and to generate a cardiac signal. The cardiac parameter determination unit is configured to receive the cardiac signal and determine cardiac parameters indicative of a health state. In particular, the cardiac parameter determination unit is configured to detect triggering events and to determine features of the cardiac signal in time windows defined by the triggering events. The die also integrates a decision unit, configured to receive the cardiac parameters and generate a health signal based on a comparison with threshold values. The cardiac parameters include heart rate and QRS-complex.Type: ApplicationFiled: July 21, 2022Publication date: February 16, 2023Applicant: STMicroelectronics S.r.l.Inventors: Enrico Rosario ALESSI, Marco LEO, Luca GANDOLFI, Fabio PASSANITI, Marco CASTELLANO
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Publication number: 20230045861Abstract: A road condition detection device, to be coupled to the wheel of a vehicle, is provided with: an electrostatic charge variation sensor, to provide a charge variation signal indicative of an electrostatic charge variation associated with the rotation of the wheel; and a processing unit, coupled to the electrostatic charge variation sensor to receive the charge variation signal and furthermore for receiving a rotation speed signal indicative of the rotation speed of the wheel. In particular, the processing unit jointly processes the rotation speed signal and the charge variation signal to detect a road condition of a wet road condition and a dry road condition.Type: ApplicationFiled: July 22, 2022Publication date: February 16, 2023Applicant: STMicroelectronics S.r.l.Inventors: Fabio PASSANITI, Enrico Rosario ALESSI
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Patent number: 11579273Abstract: A method of operating electro-acoustical transducers such as PMUTs involves applying to the transducer an excitation signal over an excitation interval, acquiring at the transducer a ring-down signal indicative of the ring-down behavior of the transducer after the end of the excitation interval, and calculating, as a function of said ring-down signal, a resonance frequency of the electro-acoustical transducer. A bias voltage of the electro-acoustical transducer can be controlled as a function of the resonance frequency. An acoustical signal received can be transduced into an electrical reception signal and a damping parameter of the electro-acoustical transducer can be calculated as a function of the ring-down signal so that a cross-correlation reference signal can be synthesized as a function of the resonance frequency and the damping ratio of the electro-acoustical transducer.Type: GrantFiled: January 6, 2022Date of Patent: February 14, 2023Assignee: STMicroelectronics S.r.l.Inventors: Marco Passoni, Niccolò Petrini
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Patent number: 11581892Abstract: A method includes pre-charging a parasitic capacitance of a control node that is coupled to a control terminal of first and second transistors that have respective current paths that form a switched current path coupled between a load node and a storage node. Pre-charging the parasitic capacitance includes: making conductive a first auxiliary transistor that has a current path coupled between the storage node and the control node, or making conductive a second auxiliary transistor that has a current path coupled between the load node and the control node. The method further includes, after pre-charging the parasitic capacitance, making the switched current path conductive to couple the load node to the storage node.Type: GrantFiled: January 9, 2020Date of Patent: February 14, 2023Assignee: STMicroelectronics S.r.l.Inventor: Marco Zamprogno