Abstract: In an embodiment, a system for land vehicle navigation includes: a GNSS receiver providing GNSS data, a set of sensors positioned on a wheel of a vehicle and on board the vehicle; and a processing unit. An on-wheel unit is located on the wheel of the vehicle, the on-wheel unit including a first subset of sensors. An on-board unit includes a second subset of sensors configured to generate a second sensor data. The processing unit is configured to process the first and second sensor data to obtain the distance and the attitude of vehicle and to perform a fusion with the GNSS data.

Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.

Abstract: A method and apparatus for compensating and calibrating a bio-impedance measurement device are provided. In the method and apparatus, a memory stores a plurality of compensation parameters and a first detection channel receives a first detection signal, compensates the first detection signal using a first compensation parameter of the plurality of compensation parameters. In the method and apparatus, a second detection channel receives a second detection signal and a third detection signal and compensates the second and third detection signals using second and third compensation parameters of the plurality of compensation parameters and the compensated first detection signal. The impedance measurement device generates a first output signal representative of a first impedance measurement and a second output signal representative of a second impedance measurement based on the compensated first, second and third detection signals.

Abstract: A semiconductor device including one or more semiconductor dice, a lead frame including an array of signal-carrying leads electrically coupled with the semiconductor die, and a power supply connection for the at least one semiconductor die arranged centrally thereof.

Abstract: A circuit includes a set of LED driver devices and a controller including a set of nodes coupled to a first slave address pin and a second slave address pin in each LED driver devices in the set of LED driver devices. Each LED driver device includes: a finite state machine (FSM) configured to generate LED drive PWM-modulated signal patterns; an oscillator configured to generate a clock signal for the FSM; a first signal path activatable between the first slave address pin and the FSM; and a second signal path activatable between the FSM and the second slave address pin.

Abstract: The ROM device has a memory array including memory cells formed by an access element and a data storage element; a high voltage column decoder stage; a high voltage row decoder stage; an analog stage; and a writing stage, wherein the data storage elements are electrically non-programmable and non-modifiable. The memory array is formed by memory cells having a first logic state and by memory cells having a second logic state. The data storage element of the memory cells having the first logic state is formed by a continuous conductive path uninterruptedly connecting the access transistor to the respective bit line, the data storage element of the memory cells having the second logic state is formed by a region of dielectric material insulating the access transistor from the respective bit line.

Abstract: An integrated fluidic circuit has a supporting surface that carries a first fluid to be moved at a first functional region; a dielectric structure, defining the supporting surface; and an electrode structure, coupled to the dielectric structure for generating an electric field at the first functional region, such as to modify electrowetting properties of the interface between the first fluid and the supporting surface. The dielectric structure has a first spatially variable dielectric profile at the first functional region, thus determining a corresponding spatially variable profile of the electric field, and, consequently, of the electrowetting properties of the interface between the first fluid and the supporting surface. The integrated fluidic circuit may achieve mixing between the first fluid and a second fluid.

Abstract: In some embodiments, a processing system includes at least one hardware block configured to change operation as a function of configuration data, a non-volatile memory including the configuration data for the at least one hardware block, and a configuration module configured to read the configuration data from the non-volatile memory and provide the configuration data read from the non-volatile memory to the at least one hardware block. The configuration module is configured to: receive mode configuration data; read the configuration data from the non-volatile memory; test whether the configuration data contain errors by verifying whether the configuration data are corrupted and/or invalid; and activate a normal operation mode or an error operation mode based on whether the configuration data contain or do not contain errors.

Abstract: A packaged device, having a package, including a first dissipative region, a second dissipative region, a first connection element and a second connection element. A die of semiconductor material is arranged within the package, carried by the first dissipative region. The first and second dissipative regions extend at a distance from each other, and the first and second connection elements extend at a distance from each other between the first and second dissipative regions. The first dissipative region, the second dissipative region, the first connection element, and the second connection element are hollow and form a circuit containing a cooling liquid.

Abstract: A PWM controlled multi-phase resonant voltage converter may include a plurality of primary windings powered through respective half-bridges, and as many secondary windings connected to an output terminal of the converter and magnetically coupled to the respective primary windings. The primary or secondary windings may be connected such that a real or virtual neutral point is floating.

Abstract: A cascade of amplifier stages has a differential input and a differential output. The cascade of amplifier stages includes at least one differential amplifier circuit including first and second transistors, at least one of the first and second transistors having a control terminal and a body terminal. A mismatch between the first and second transistors generates an input offset. A feedback network couples the differential output to the body terminal in order to cancel the input offset. The feedback network includes a low-pass filter and a differential amplifier stage.

Abstract: A protection circuit for an automotive wiring harness includes an input node receiving a sensing signal indicating intensity of current in a conductor, an output node emitting a current control output signal to reduce the current and/or emitting a warning signal indicating the current intensity having reached a limit value. Signal processing circuitry coupled to the input node compares the current intensity with a reference value, and produces a comparison signal indicating whether the current intensity exceeds the reference value. A counting circuitry driven by the comparison signal counts in a first count direction as a result of the comparison signal indicating that the current intensity exceeds the reference value. Latching circuitry coupled to the counter circuitry generates the output signal at the output node as a result of the count value of the counter circuitry reaching a limit value.

Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference formed by a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.

Abstract: An electronic device determines an estimate of angular position based on an accelerometric signal supplied by an accelerometric sensor and as a function of at least one of a gyroscopic signal from a gyroscopic sensor and a magnetic signal from a magnetic-field sensor. A processing module implements a complementary filter, which is provided with a first processing block, a second processing block, and a combination block. The first processing block receives the acceleration signal and an input signal indicative of the magnetic signal and generates a geomagnetic quaternion. The second processing block receives a signal indicative of the gyroscopic signal (gyro) and generates a gyroscopic quaternion. The combination block determines the estimate ({circumflex over (q)}) of angular position by complementarily combining the geomagnetic quaternion and the gyroscopic quaternion based on a combination factor that has a dynamic value and an adaptive value and that varies as a function of the operating conditions.

Abstract: An electrostatically actuated oscillating structure includes a first stator subregion, a second stator subregion, a first rotor subregion and a second rotor subregion. Torsional elastic elements mounted to the first and second rotor subregions define an axis of rotation. A mobile element is coupled to the torsional elastic elements. The stator subregions are electrostatically coupled to respective regions of actuation on the mobile element. The stator subregions exhibit an element of structural asymmetry such that the electrostatic coupling surface between the first stator subregion and the first actuation region differs from the electrostatic coupling surface between the second stator subregion and the second actuation region.

Abstract: A switching circuit includes a switching circuit stage configured to supply a load via filter networks. Control circuitry is provided to control alternate switching sequences of transistors in the half-bridges of the switching circuit stage. A current flow line is provided between the output nodes of the half-bridges including an inductance between two switches. First and second capacitances are coupled with the output nodes of the half-bridges. The control circuitry switches first and second switches to the conductive state at intervals in the alternate switching sequences of the transistors in the half-bridges between switching the first pair of transistors to a non-conductive state and switching the second pair of transistors to a conductive state.

Abstract: A sensing structure is presented for use in testing integrated circuits on a substrate. The sensing structure includes a probe region corresponding to a conductive region for connecting to the integrated circuit. A first sensing region at least partially surrounds the probe region. A plurality of sensing elements connects in series such that a first of the plurality of sensing elements has two terminals respectively connected to the first sensing region and the probe region. And a second of the plurality of sensing elements has two terminals respectively connected to the probe region and a first reference potential.

Abstract: An ohmic-inductive electrical load, such as an electric motor, for example, for a hard-disk drive, is driven by supplying thereto a load current via a switching power stage supplied with a source current delivered by a supply source. The driving action may include sensing the load current; estimating the source current starting from the load current sensed; generating a feedback signal that assumes different values as a function of the result of the comparison between the source current estimated and a source-current threshold value; and driving the switching power stage via the feedback signal, increasing or decreasing, respectively, as a function of the different values assumed by the feedback signal, the load current, thereby controlling the source current.

Abstract: A testing architecture for integrated circuits on a wafer includes at least one first circuit of a structure test element group (TEG) realized in a scribe line providing separation between first and second integrated circuits. At least one pad is shared by a second circuit inside at least one of the first and second integrated circuits and the first circuit. Switching circuitry is coupled to the at least one pad and to the first and second circuits.

Abstract: An amplification interface includes an input terminal receiving a sensor current and an output terminal supplying an output voltage. An analog integrator is connected to the input terminal and supplies the output voltage. A current generator is connected to the input of the analog integrator and generates a compensation current based on a drive signal. A control circuit generates the drive signal for the current generator based on a control signal representing an offset in the sensor current supplied by the sensor. The current generator generates, based on the driving signal, a positive or negative current. The control circuit determines a first duration and a second duration as a function of the control signal representing the offset in the sensor current, during the measurement interval, and sets the driving signal to a first logic value for the first duration and to a second logic value for the second duration.