Abstract: A DC-DC converter circuit including at least: a first step down converter having a first pair of switching devices in a half bridge configuration. A second step down converter includes a second pair of switching devices in a half bridge configuration. The first and second step down converters are connected in parallel to an output node connected to an output coil and receive command signals. A feedback loop includes a synchronization module receiving the gate control signals of high side switching devices and adjusts as a function of the gate control signals a delay in a signal path from the command signal to each gate control signal of the high side switching device to synchronize the gate control signals.

Abstract: A phase-change memory device includes a memory array including a first memory cell and a second memory cell, each comprising a phase-change element and a selector, connected respectively to a first local bitline and a second local bitline, which are in turn connected, respectively, to a first main bitline and a second main bitline. The parasitic capacitance of the main bitlines is precharged at a supply voltage. When the local bitlines are selected to access a respective logic datum stored in the phase-change element, the parasitic capacitance of the local bitlines is first charged using the charge previously stored in the parasitic capacitance of the main bitlines and then discharged through the respective phase-change elements. Reading of the logic datum is made by comparing the discharge times.

Abstract: A semiconductor power device has: a die, with a front surface and a rear surface, and with an arrangement of projecting regions on the front surface, which define between them windows arranged within which are contact regions; and a package, which houses the die inside it. A metal frame has a top surface and a bottom surface; the die is carried by the frame on the top surface; an encapsulation coating coats the frame and the die. A first insulation multilayer is arranged above the die and is formed by an upper metal layer, a lower metal layer, and an intermediate insulating layer; the lower metal layer is shaped according to an arrangement of the projecting regions and has contact projections, which extend so as to electrically contact the contact regions, and insulation regions, interposed between the contact projections, in positions corresponding to the projecting regions.

Abstract: A method and apparatus for secondary side current mode control of a converter are provided. In the method and apparatus, an output voltage of the converter is detected, where the converter has primary and secondary windings that are galvanically isolated in respective primary and secondary sides. A secondary control signal is generated in the secondary side based at least in part on the output voltage and a reference voltage. The secondary control signal is converted to a primary control signal provided in the primary side. The converter is driven in the primary side based at least in part on the primary control signal and a current sense signal indicative of a current flowing through the primary winding.

Abstract: A smart button for use in a network formed on a garment includes a housing and an antenna carried within the housing to communicate with elements of the network. A functional element is carried within the housing. An electronic circuit is carried within the housing and coupled to the antenna and the at least one functional element. The housing is formed by a stem carrying a head, and the antenna is housed within the head.

Abstract: An optical integrated circuit device includes a semiconductor substrate and a first waveguide made of a first material and disposed over the semiconductor substrate. The first waveguide includes a parallel region and a tapered region. The optical integrated circuit device further includes a first cladding structure disposed over and surrounding the parallel region of the first waveguide, a first extension made of the first material and disposed over the semiconductor substrate, and an electrostatic discharge (ESD) protection structure electrically coupled to the first extension. The first extension physically contacts the parallel region of the first waveguide. The first extension includes a first portion within the first cladding structure and a second portion outside the first cladding structure.

Abstract: A voltage-to-time converter circuit receives a first voltage signal and produces a PWM-modulated signal having a duty-cycle proportional to the first voltage signal. A current integrator circuit receives the PWM-modulated signal from the voltage-to-time converter circuit block and produces an output signal by integrating a current signal from a current source over integration time intervals having a duration which is a function of the duty-cycle of the PWM-modulated signal. The current signal is proportional to a second voltage signal. The output signal is accordingly proportional to a product of the first voltage signal and the current signal, which is furthermore proportional to a product of the first voltage signal and the second voltage signal.

Abstract: Described herein is a MEMS acoustic transducer device provided with a micromechanical detection structure that detects acoustic-pressure waves and supplies a transduced electrical quantity, and with an integrated circuit operatively coupled to the micromechanical detection structure and having a reading module that generates at output an audio signal as a function of the transduced electrical quantity. The integrated circuit is further provided with a recognition module, which recognizes a of sound activity event associated to the transduced electrical quantity. The MEMS acoustic transducer has an output that supplies at output a data signal that carries information regarding recognition of the sound activity event.

Abstract: Disclosed herein is a circuit including first and second input circuits. The first input circuit is configured to receive first and second logic signals and to source current to first and second control nodes if at least one of the first and second logic signals is at a logic low. The second input circuit is configured to receive the first and second logic signals and to sink current from the first and second control nodes if at least one of the first and second logic signals is at a logic high. A first output circuit is configured to source current to an output node when current is sunk from the first control node. A second output circuit is configured to sink current from the output node when current is sourced to the second control node. A latch is coupled to the output node.

Abstract: A non-volatile memory device has a circuit branch associated to a bit line connected to a memory cell. When the memory cell is read, in a precharging step, the bit line is precharged. In a characteristic shift step, the memory cell is activated, and a current source is activated to supply a shift current to the first bit line and cause the bit line to charge or discharge on the basis of the datum stored in the memory cell. In a detection step, the current source is deactivated, the memory cell is decoupled, and the bit line is coupled to an input of a comparator stage that compares the voltage on the bit line with a reference voltage to supply an output signal indicating a datum stored in the memory cell.

Abstract: The microfluidic device has a plurality of ejector elements. Each ejector element includes a first region, accommodating a first fluid flow channel and an actuator chamber; a second region, accommodating a fluid containment chamber; and a third region, accommodating a second fluid flow channel. The fluid containment chamber is fluidically coupled to the first and to the second fluid flow channels. The second region is formed from a membrane layer, from a membrane definition layer, mechanically coupled to the membrane layer and having a membrane definition opening, and a fluid chamber defining body, mechanically coupled to the membrane definition layer and having a chamber defining opening, with a width greater than the width of the membrane definition opening. The width of the membrane is thus defined by the width of the chamber defining opening.

Abstract: A MEMS triaxial magnetic sensor device includes a sensing structure having: a substrate; an outer frame, which internally defines a window and is elastically coupled to first anchorages fixed with respect to the substrate by first elastic elements; a mobile structure arranged in the window, suspended above the substrate, which is elastically coupled to the outer frame by second elastic elements and carries a conductive path for flow of an electric current; and an elastic arrangement operatively coupled to the mobile structure. The mobile structure performs, due to the first and second elastic elements and the arrangement of elastic elements, first, second, and third sensing movements in response to Lorentz forces from first, second, and third magnetic-field components, respectively. The first, second, and third sensing movements are distinct and decoupled from one another.

Abstract: A semiconductor device includes: one or more semiconductor dice, a die pad supporting the semiconductor die or dice, a package molded onto the semiconductor die or dice supported by said die pad, wherein the die pad is exposed at the surface of the package, and the exposed die pad with an etched pattern therein to form at least one electrical contact land in the die pad.

Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.

Abstract: The present disclosure relates to a precursor solution for the preparation of a ceramic of the BZT-?BXT type, where X is selected from Ca, Sn, Mn, and Nb, and ? is a molar fraction selected in the range between 0.10 and 0.90, said solution comprising: 1) at least one barium precursor compound; 2) a precursor compound selected from the group consisting of at least one calcium compound, at least one tin compound, at least one manganese compound, and at least one niobium compound; 3) at least one anhydrous precursor compound of zirconium; 4) at least one anhydrous precursor compound of titanium; 5) a solvent selected from the group consisting of a polyol and mixtures of a polyol and a secondary solvent selected from the group consisting of alcohols, carboxylic acids, esters, ketones, ethers, and mixtures thereof; and 6) a chelating agent, as well as method of using the same.

Abstract: An integrated circuit card with a memory space includes memory space locations for storing user profile data of a plurality of user profiles. The memory space can be partitioned in segments of memory space locations. A segment map includes segment map memory locations with the memory space locations in the memory space coupled to respective segment map memory locations in the segment map. The memory space locations in the memory space can be allocated to the user profile data by recording in the respective segment map memory locations in the segment map the profile in the plurality of user profiles to which the memory space locations in the memory space are reserved.

Abstract: An array of Geiger-mode avalanche photodiodes is formed in a die and includes: an internal dielectric structure, arranged on the die; and an external dielectric region arranged on the internal dielectric structure. The external dielectric region is formed by an external material that absorbs radiation having a wavelength that falls in a stop-band with low wavelength and transmits radiation having a wavelength that falls in a pass-band with high wavelength, at least part of the pass-band including wavelengths in the infrared. The internal dielectric structure is formed by one or more internal materials that substantially transmit radiation having a wavelength that falls in the stop-band and in the pass-band and have refractive indices that fall in an interval having an amplitude of 0.4. In the stop-band and in the pass-band the external dielectric region has a refractive index with the real part that falls in the above interval.

Abstract: A device includes a transceiver, which, in operation, exchanges data packets over a wireless communication link with a remote device during connection events separated by a determined connection interval. The device includes data processing circuitry, which, in operation, measures an indication of a duration of time between at least two consecutive connection events associated with the remote device and adjusts a bit rate based on the measured indication of the duration of time and the determined connection interval.

Abstract: A semiconductor chip is mounted on a leadframe. A first portion of an insulating package for the semiconductor chip is formed from laser direct structuring (LDS) material molded onto the semiconductor chip. A conductive formation (provided by laser-drilling the LDS material and plating) extends between the outer surface of the first portion of insulating package and the semiconductor chip. An electrically conductive clip is applied onto the outer surface of the first portion of the insulating package, with the electrically conductive clip electrically coupled to the conductive formation and the leadframe. A second portion of the insulating package is made from package molding material (epoxy compound) molded onto the electrically conductive clip and applied onto the outer surface of the first portion of the insulating package.

Abstract: A circuit includes an input port receiving an input signal having a first frequency. A phase-shifter network is coupled to the input port, receives the input signal, and produces therefrom first and second signals in quadrature with one another. Frequency multiplier circuitry has a common node and includes a first rectifier for rectifying the first signal to produce a first rectified signal having a second frequency that is twice the first frequency and to be applied to the common node, and a second rectifier rectifying the second signal to produce a second rectified signal having the second frequency and to be applied to the common node. A combination of the first and second rectified signals is available at the common node and includes harmonic contents at a frequency that is fourfold the first frequency.