Abstract: An OFDM (orthogonal frequency division multiplexing) transmitter includes an inverse fast Fourier transform circuit, which, in operation, generates, based on digital input data, a complex time-varying digital signal having real and imaginary components; and a multiplexer adapted to generate a time-multiplexed digital signal by time-multiplexing one or more of the real components with one or more of the imaginary components.

Abstract: In an embodiment, a method includes receiving in parallel first data and second data; and delivering in series the first and second data, where the first data comprises electric power delivery configuration data. In some embodiments, delivering in series the first and second data includes delivering the first and second data wirelessly.

Abstract: A transmitter/receiver device include an antenna, a voltage source, a radio frequency receiver connected to the antenna and powered by the voltage source, a radio frequency transmitter connected to the antenna and powered by the voltage source, and a switch coupled to the antenna, the receiver and the transmitter and configured to couple/decouple the antenna from the transmitter or from the receiver. The antenna is shared between the transmitter and the receiver. The receiver includes a radio frequency stage that includes an amplifier device having an input coupled to the antenna. The amplifier device includes an amplifier switch configured to connect or disconnect the amplifier device from the voltage source.

Abstract: An artificial-neuron device includes an integration-generation circuit coupled between an input at which an input signal is received and an output at which an output signal is delivered, and a refractory circuit inhibiting the integrator circuit after the delivery of the output signal. The refractory circuit is formed by a first MOS transistor having a first conduction-terminal coupled to a supply node, a second conduction-terminal coupled to a common node, and a control-terminal coupled to the output, and a second MOS transistor having a first conduction-terminal coupled to the input, a second conduction-terminal coupled to a reference node at which a reference voltage is received, and a control-terminal coupled to the common node. A resistive-capacitive circuit is coupled between the supply node and the reference node and having a tap coupled to the common node, with the inhibition duration being dependent upon a time constant of the resistive-capacitive circuit.

Abstract: An artificial neuron includes a first capacitive node of application of a membrane potential of the neuron. A first transistor is configured to discharge the first capacitive node. A second capacitive node is driven according to the membrane potential and delivers a potential for controlling the first transistor. A second transistor is configured to discharge the second capacitive node. The second transistor is controlled according to a potential present at the second capacitive node.

Abstract: A semiconductor substrate includes a doped region having an upper surface. The doped region may comprise a conduction terminal of a diode (such as cathode) or a transistor (such as a drain). A silicide layer is provided at the doped region. The silicide layer has an area that only partially covers an area of the upper surface of the doped region. The partial area coverage facilitates modulating the threshold voltage and/or leakage current of an integrated circuit device.

Abstract: An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.

Abstract: An optical filter includes a carrier layer made of a first material. A periodic grating of posts is disposed on the carrier layer in a periodic pattern configured by characteristic dimensions. The posts are made of a second material. A layer made of a third material encompasses the periodic grating of posts and covers the carrier layer. The third material has a refractive index that is different from a refractive index of the second material. Characteristic dimensions of the periodic grating of posts are smaller than an interfering wavelength and are configured to selectively reflect light at the interfering wavelength on the periodic grating of posts.

Abstract: An electro-optic device may include a photonic chip having an optical grating coupler at a surface. The optical grating coupler may include a first semiconductor layer having a first base and first fingers extending outwardly from the first base. The optical grating coupler may include a second semiconductor layer having a second base and second fingers extending outwardly from the second base and being interdigitated with the first fingers to define semiconductor junction areas, with the first and second fingers having a non-uniform width. The electro-optic device may include a circuit coupled to the optical grating coupler and configured to bias the semiconductor junction areas and change one or more optical characteristics of the optical grating coupler.

Abstract: An orthomode junction for separating and/or combining orthogonally-polarized radiofrequency wave signals, comprises a body which has a main cavity forming a main waveguide, which has a blind end, and auxiliary cavities forming auxiliary waveguides, which communicate laterally with the main cavity in the vicinity of the blind end thereof, and a deflection insert situated at the blind end of the main cavity and facing the auxiliary cavities, the deflection insert having different shapes on the side of the auxiliary cavities respectively.

Abstract: An integrated artificial neuron device includes an input signal node, an output signal node and a reference supply node. An integrator circuit receives and integrates an input signal to produce an integrated signal. A generator circuit receives the integrated signal and, when the integrated signal exceeds a threshold, delivers the output signal. The integrator circuit includes a main capacitor coupled between the input signal node and the reference supply node. The generator circuit includes a main MOS transistor coupled between the input signal node and the output signal node. The main MOS transistor has a gate that is coupled to the output signal node, and a substrate that is mutually coupled to the gate.

Abstract: A device includes a first switch, a first irreversibly programmable memory point, and a second irreversibly programmable memory point coupled in parallel with the first irreversibly programmable memory point. The first switch and the parallel combination of the first and second irreversibly programmable memory points are coupled in series between a first node and a second node.

Abstract: A cell includes a Z2-FET-type structure that is formed with two front gates extending over an intermediate region between an anode region and a cathode region. The individual front gates of the two front gates are spaced apart by a distance that is shorter than 40% of a width of each individual front gate.

Abstract: The present description concerns a method of manufacturing a first wafer, intended to be assembled to a second wafer by molecular bonding, including the successive steps of: forming a stack of layers at the surface of a substrate; and successive chemical etchings of the edges of said layers from the layer of the stack most distant from the substrate, across a smaller and smaller width.

Abstract: A bipolar transistor includes a collector. The collector is produced by a process wherein a first substantially homogeneously doped layer is formed at the bottom of a cavity. A second gradually doped layer is then formed by diffusion of dopants of the first substantially homogeneously doped layer.

Abstract: Binary data is processed through a differential pre-encoder, which includes a simple modulo-2 addition. This step is used to cancel the propagation error that can be introduced by duo-binary modulation and to simplify demodulation. Next the duo-binary encoder introduces controlled Inter Symbol Interference between a previously sent bit and a present bit to compress the spectral density closer to the DC. Next a 60-GHz carrier is modulated and transmitted over differential transmission lines.

Abstract: An optical modulator uses an optoelectronic phase comparator configured to provide, in the form of an electrical signal, a measure of a phase difference between two optical waves. The phase comparator includes an optical directional coupler having two coupled channels respectively defining two optical inputs for receiving the two optical waves to be compared. Two photodiodes are configured to respectively receive the optical output powers of the two channels of the directional coupler. An electrical circuit is configured to supply, as a measure of the optical phase shift, an electrical signal proportional to the difference between the electrical signals produced by the two photodiodes.

Abstract: An integrated optoelectronic or optical device is formed by a polarization-splitting grating coupler including two optical waveguides, a common optical coupler and flared optical transitions between the optical coupler and the optical waveguides. The optical coupler is configured for supporting input/output of optical waves. A first region of the optical coupler lies at a distance from the flared optical transitions. The first region includes a first recessed pattern. Second regions of the optical coupler lie between the first region and the flared optical transitions, respectively, in an adjoining relationship. The second regions include a second recessed pattern different from the first recessed pattern.

Abstract: A method includes generating, by a first spiking neuron, an event detection signal indicating a time of detection of an event in a data flow. The event detection signal is transmitted from the first spiking neuron to a second spiking neuron. The second spiking neuron generates a spike delayed, with respect to the time of detection of the event, according to an amplitude of the event. The delayed spike is included in a coded signal.