Abstract: An integrated circuit device and method for classifying electrical devices is disclosed. A reference current response of a plurality of electrical devices is determined and stored in a memory. Real-time current response of a specific electrical device is measured and stored in the memory. A processor compared the measured real-time current response of the specific electrical device to the reference current responses of the plurality of electrical devices. A classification of the electrical device is then made based on the comparison.

Abstract: A system of detecting biometric and non-biometric, standard smart card devices includes a smart card host and smart card device reader, which is operable for receiving an Answer to Reset signal and determining whether the smart card device comprises a biometric or non-biometric, standard smart card device. If a biometric smart card device is detected, the smart card reader is operable for applying power used for standard smart card device operation to a first contact and applying power used by a biometric circuit to a second contact, and if a non-biometric, standard smart card device is detected, applying power only to the first contact.

Abstract: A semiconductor structure including a first active area under which is buried a first reflective layer and a least one second active area under which is buried a second reflective layer, wherein the upper surface of the second reflective layer is closer to the upper surface of the structure than the upper surface of the first reflective layer.

Abstract: A decoder for error correction an encoded message, such as one encoded by a turbo encoder, with reduced iterations due to an improved stopping criterion. The decoder includes an error correction loop that iteratively processes a message that is encoded prior to transmittal over a communication channel. The error correction loop generates, such as with a Reed-Solomon decoder, an error location polynomial in each iterative process. A stopping mechanism in the decoder allows an additional iteration of the message decoding based on the error location polynomial, such as by obtaining the degree of the error location polynomial and comparing it to a threshold. In one example, the threshold is the maximum number of symbol errors correctable by the Reed-Solomon code embodied in the decoder. The stopping mechanism allows additional iterations when the stopping criterion (or polynomial degree) is greater than the maximum number of symbol errors correctable by the Reed-Solomon code.

Abstract: A method and system for producing a noble metal film includes the step of sputtering a noble metal on a substrate thus obtaining a film. The method and system further includes the step of subjecting the film to a thermal treatment, thus obtaining the noble metal film.

Abstract: An integrated circuit for a smart card in accordance with an exemplary embodiment includes a transceiver and a processor for communicating with a host device via the transceiver. More particularly, the processor provides at least one default descriptor to the host device, and cooperates with the host device to perform an enumeration based upon the at least one default descriptor. Moreover, the processor also detects a system event and, responsive to the system event, provides at least one alternate descriptor to the host device and cooperates with the host device to perform a new enumeration based thereon.

Abstract: Circuitry including an output circuit having a first variable resistance block coupled between a first supply voltage and an output node, the first variable resistance block having a plurality of selectable resistive elements coupled in series with at least one resistor between the first supply voltage and the output node, the output circuit having an output impedance determined by the resistance of the first variable resistance block; and a compensation circuit for regulating the impedance of the first variable resistance block of the output circuit, the compensation circuit having a second variable resistance block coupled between the first supply voltage and the first node of an external resistor, the second node of the external resistor being coupled to a second supply voltage, wherein the second variable resistance block comprises a plurality of selectable resistive elements coupled in series with at least one resistor between the first supply voltage and the first node of the external resistor, and wher

Abstract: A system and method to optimize the quality of a modulated signal. In one aspect, an AM demodulator is used in conjunction with proper bandwidth selection of an FM signal. For example, the AM demodulator can be used to generate an instantaneous absolute value of the FM signal. The average value of the FM signal over a period of time is subtracted from the instantaneous absolute value in order to determine a variance in amplitude in the FM signal. In another aspect, several filters may be tested and the one having the lowest variance in amplitude may be used in order to select the filter having the desirable bandwidth.

Abstract: A method and the related circuit protect against malfunctioning of the feedback loop in switching power supplies. More particularly, the circuit identifies a condition of excessively high voltage at the output. In one embodiment the circuit for the protection against malfunctioning of the feedback loop of a switching power supply comprises: circuitry that generates a voltage proportional to the output voltage of the switching power supply; a comparator for comparing the voltage proportional to the output voltage with a reference voltage; a counter coupled to the comparator and capable of supplying an output signal when said voltage proportional to the output voltage exceeds said reference voltage a threshold number of times; said output signal is indicative of a malfunctioning of the feedback loop.

Abstract: The disclosure relates a compensated output buffer circuit providing an improved slew rate control and a method for minimizing the variations in the current slew rate of the buffer over process, voltage and temperature (PVT) conditions. The output buffer circuit includes a split-gate compensated driver and a slew rate control circuit. Accordingly, a desired slew rate can be maintained with fewer variations over wide range of variations in PVT conditions.

Abstract: A method for encapsulating a thin-film lithium-ion type battery, including the steps of: forming, on a substrate, an active stack having as a lower layer a cathode collector layer extending over a surface area larger than the surface area of the other layers; forming, over the structure, a passivation layer including through openings at locations intended to receive anode collector and cathode collector contacts; forming first and second separate portions of an under-bump metallization, the first portions being located on the walls and the bottom of the openings, the second portions covering the passivation layer; and forming an encapsulation layer over the entire structure.

Abstract: A porous silicon wafer including, on its upper surface side, multiple recesses, this upper surface being coated with a porous silicon layer having pores smaller than those of the wafer bulk.

Abstract: Semiconductor protection devices, and related methods and systems, especially devices for providing series current limiting. The device typically comprises two regenerative building blocks and/or MOSFETs connected back-to-back in series, where one of the MOSFETs/Regenerative Building Blocks has an extra voltage probe electrode that provides a regenerative signal with self-limited voltage to the other via coupling to its gate electrode.

Abstract: A secure method and system of digital data transmission between a sender and a receiver, including a phase of receiver authentication by a symmetrical authentication key sharing algorithm with no transmission of the key, a phase of data watermarking by using the authentication key as the watermarking key, and a phase of transmission of the watermarked data.

Abstract: An electronic differential switch is provided that is connected to a phase cable and a neutral cable of an electric network. The electronic differential switch includes a first winding associated with a second winding, at least one toroid associated with the first winding, a diode bridge, a driving relay for a main switch connected to the phase and neutral cables, an integrated circuit for measuring a differential current flowing in the first winding and generating a driving signal, and at least one driven switch coupled to the integrated circuit and driven by the driving signal. The first and second windings are coupled to one another through the integrated circuit and the diode bridge. The at least one driven switch is coupled to the driving relay through the diode bridge so as to excite the driving relay and close the main switch, or release the driving relay and open the main switch. Also provided is a method for controlling an alarm condition in an electric network.

Abstract: A process for packaging a number of micro-components on the same substrate wafer, in which each micro-component is enclosed in a cavity. This process includes making a covering plate comprising a re-useable matrix, a polymer layer, and a metal layer; covering the wafer with the covering plate; applying a contact pressure equal to at least one bar on the covering plate and on the wafer; heating the metal layer during pressing until sealing is obtained, each cavity thus being provided with a sealing area and closed by metal layer; and dissolving the polymer to recover and recycle the matrix.

Abstract: A circuit for estimating propagated carries in an adder starting from operands that include actual addition inputs or at least one earlier carry, the circuit performs statistical circuit operations with independent binary traffic for the operands. Preferably, this binary traffic is independent and equiprobable or quasi-equiprobable binary traffic, and the adder is a leading zero anticipatory logic integer adder producing a number having the same number of leading zeroes as the result of the integer addition performed. The carry value may be produced from a logic function (e.g., Karnaugh Map, Quine-McClusky) of the operands, as a logic combination of the operands covering all the 1s in the logic function.

Abstract: A package includes a substrate provided with a passing opening and a MEMS device. The MEMS device includes an active surface wherein a portion of the MEMS device is integrated sensitive to the chemical/physical variations of a fluid. The active surface of the MEMS device faces the substrate and is spaced therefrom, the sensitive portion being aligned to the passing opening. A protective package incorporates the MEMS device and the substrate, leaving at least the sensitive portion of the MEMS device exposed through the passing opening of the substrate.

Abstract: A semiconductor device includes a semiconductor substrate, a photon avalanche detector in the semiconductor substrate. The photon avalanche detector includes an anode of a first conductivity type and a cathode of a second conductivity type. A guard ring is in the semiconductor substrate and at least partially surrounds the photon avalanche detector. A passivation layer of the first conductivity type is in contact with the guard ring to reduce an electric field at an edge of the photon avalanche detector.

Abstract: A scan chain architecture includes a cascade of flip-flop cells each having at least one input and output or an inverted output. The output or inverted output of a flip-flop is connected to the input of the subsequent flip-flop. The connection between two consecutive flip-flops of the scan chain is selected according to the status of a given flip-flop cell, the status of a previous cell, and the status of the connection between these cells.