Abstract: The method and circuit corrects errors in an active pixel sensor which generates an output indicative of illumination intensity and which may experience an error in the output as a result of artifacts which produce an erroneous output. The approach includes determining the output from the pixel, comparing the output with a threshold value, and if the output is lower that the threshold value identifying the existence of an erroneous output and storing a value in a latching device in response thereto. A maximum value is generated in response to the latching device to replace the erroneous output, thereby correcting the error. The present invention switches the system from the analog to digital domain with respect to the issue of artifacts by using a latch to store a value which is then used to replace the actual output if the output is wrong.
Type:
Grant
Filed:
September 28, 2006
Date of Patent:
February 1, 2011
Assignee:
STMicroelectronics (Research and Development) Limited
Abstract: A wear leveling solution is proposed for use in a storage device based on a flash memory. The flash memory includes a plurality of physical blocks, which are adapted to be erased individually. A corresponding method starts with the step for erasing one of the physical blocks. One of the physical blocks being allocated for storing data is selected; this operation is performed in response to the reaching of a threshold by an indication of a difference between a number of erasures of the erased physical block and a number of erasures of the selected physical block. At least the data of the selected physical block being valid is copied into the erased physical block. The selected physical block is then erased.
Abstract: The selection of at least one back-modulation element of an electromagnetic transponder from among a plurality of resistive and/or capacitive modulation elements of the load of an oscillating circuit of the transponder, including selecting the modulation element(s) according to a binary message received from a read/write terminal.
Abstract: A method is provided for block writing in an electrically programmable non-volatile memory, in which a block to be written in the memory includes at least one word. The method includes determining a word write time by dividing a fixed block write time by the number of words in the block to be written, and controlling the memory to successively write each word in the memory during the write time.
Type:
Grant
Filed:
April 2, 2008
Date of Patent:
February 1, 2011
Assignee:
STMicroelectronics SA
Inventors:
Ahmed Kari, Christophe Moreaux, David Naura, Pierre Rizzo
Abstract: A camera module lens cap is provided to protect a camera module in a mobile device where the camera module is exposed. The camera module lens cap includes an optically transparent member for positioning adjacent a camera lens, and a housing for carrying the optically transparent member. The housing includes an overhanging lip for engaging a base of the camera module.
Abstract: A device and method for driving a converter circuit that supplies a charge via a first electronic switch and a second electronic switch alternately turned on and off. A generator module generates a memory signal, indicating the duration of a first dead-time interval. A delay module, sensitive to the memory signal controls turning-on of the first electronic switch with a delay, with respect to turning-off of the second electronic switch, so that a second dead-time interval has a duration substantially equal to the duration of the first dead-time interval.
Abstract: A method for forming a MIM-type capacitor by filling of trenches by conformal depositions of insulating materials and of conductive materials, two successive electrodes of the capacitor including on either side of a thin vertical insulating layer at least one conductive layer of same nature, including the step of lowering the level of the conductive layers with respect to the level of the insulating layer separating them.
Type:
Grant
Filed:
May 9, 2007
Date of Patent:
February 1, 2011
Assignee:
STMicroelectronics S.A.
Inventors:
Sébastien Cremer, Cédric Perrot, Claire Richard
Abstract: A power supply circuit capable of providing two regulated voltages based on a D.C. input voltage, including a boost converter and a buck-boost converter, the circuit including a single inductive element common to the boost and buck-boost converters.
Abstract: An interface device, such as for a System-on-Chip (SoC) bus, transfers data from an input queue through an output to a target. The interface device includes a buffer network for buffering input data when the target is not available for receiving the data. A multiplexer switches between a first operating condition for directing to the target the data from the input queue, and a second operating condition for directing to the target the buffered data from the buffer network. A finite-state machine selectively switches the multiplexer between the first operating condition and the second operating condition based on an acknowledgement signal received from the target. This indicates the availability of the target for receiving the data.
Type:
Application
Filed:
July 9, 2010
Publication date:
January 27, 2011
Applicant:
STMicroelectronics S.r.I.
Inventors:
Francesco Giotta, Salvatore Pisasale, Giuseppe Falconeri
Abstract: The invention relates to a method for organizing the registers of a peripheral in memory, the peripheral including at least one control register to be addressed in memory to store configuration data of the peripheral, one transmission register to be addressed in memory to store data to be transmitted from the memory to the peripheral, and one reception register to be addressed in memory to store data to be transmitted from the peripheral to the memory, the method including: duplicating, within a data memory range, the transmission/reception register to different contiguous addresses; and implementing in memory the control registers at contiguous addresses at the level of a memory range adjacent to the memory range where the transmission/reception register has been duplicated.
Abstract: A radiofrequency signal power amplification circuit may include a signal input for receiving the radiofrequency signal, an amplification stage coupled to the signal input and having at least one power transistor, a biasing stage for delivering a bias voltage to the amplification stage, and a processing stage. The processing stage may include a processing input coupled to the signal input, a processing output for delivering a bias current modulated at least in amplitude to the biasing stage, and an amplitude modulator coupled between the processing input and the processing output and configured to determine an envelope signal representative of the envelope of the radiofrequency signal, for modulating the amplitude of the envelope signal based on a variable voltage setpoint and for generating the amplitude-modulated bias current based on the modulated envelope signal.
Type:
Application
Filed:
July 22, 2010
Publication date:
January 27, 2011
Applicant:
STMicroelectronics SA
Inventors:
Didier Belot, Laurent Leyssenne, Eric Kerherve, Yann Deval
Abstract: A linear voltage regulator includes a Miller frequency compensation having a movable zero, which tracks the frequency of the load pole as the load condition changes. The compensated voltage regulator maintains stability under variable load conditions. Because of the Miller effect, DC open-loop gain and bandwidth are not sacrificed for stability. The compensated voltage regulator can therefore maintain high power supply rejection ratio (PSRR).
Abstract: A forward converter circuit includes a transformer having a primary winding and a secondary winding. A first transistor is coupled in series with the primary winding and a second transistor is coupled in series with the secondary winding. A control circuit generating control signals for controlling operation of the first and second transistors. The control signals are generated responsive to the values in certain triggered counting circuits satisfying programmable thresholds.
Abstract: An imaging system for a scanner includes a sensor and a rod lens. The sensor has a linear array of photosensitive elements arranged in three rows and disposed at an angle such that the rows are at different distances from the lens and the object being scanned. When changes in focus occur, for example in scanning a book or a 3D object, the photosensitive elements giving the sharpest image are selected. The angle is achieved by mounting the sensor to a PCB via solder bumps arranged along one side of the sensor.
Abstract: A sensor module has first and second sensor arrays formed on a substrate, with the first and second sensor arrays adapted to share common readout circuitry and shared read out for a pair of sensors on a single array.
Abstract: A semiconductor package includes a substrate board and a semiconductor die attached to a top surface of that substrate board. A heat spreader is provided over the semiconductor die. A stiffening ring is positioned surrounding the semiconductor die, the stiffening ring being attached to the top surface of the substrate board and attached to a bottom surface of the plate portion of the heat spreader. Space is left on the board outside of the stiffening ring to support the installation of passive components to the substrate board. An external ring may be included, with that external ring being interconnected to the stiffening ring by a set of tie bars. Alternatively, the heat spreader includes an integrally formed peripheral sidewall portion.
Type:
Application
Filed:
July 21, 2009
Publication date:
January 27, 2011
Applicant:
STMicroelectronics Asia Pacific PTE LTD (Singapore)
Abstract: An electronic device includes a substrate provided with a passing opening and a MEMS device including an active surface wherein a portion of the MEMS device is integrated sensitive to chemical/physical variations of a fluid. The active surface of the MEMS device faces the substrate and is spaced therefrom, the sensitive portion being aligned to the opening. A protective package incorporates at least partially the MEMS device and the substrate, leaving at least the sensitive portion of the MEMS device, and the opening of the substrate exposed. A barrier element is positioned in an area which surrounds the sensitive portion to realize a protection structure for the MEMS device, so that the sensitive portion is free.
Abstract: A generator of synchronization pulses intended for at least two registers, including a first input intended to receive a clock signal and at least one output intended to deliver the pulses on the clock input of said registers, and at least one second input intended to receive a signal for forcing the output, independently from the clock signal, to make said registers transparent.
Abstract: Power MOS device of the type comprising a plurality of elementary power MOS transistors having respective gate structures and comprising a gate oxide with double thickness having a thick central part and lateral portions of reduced thickness. Such device exhibiting gate structures comprising first gate conductive portions overlapped onto said lateral portions of reduced thickness to define, for the elementary MOS transistors, the gate electrodes, as well as a conductive structure or mesh. Such conductive structure comprising a plurality of second conductive portions overlapped onto the thick central part of gate oxide and interconnected to each other and to the first gate conductive portions by means of a plurality of conducive bridges.
Type:
Grant
Filed:
November 21, 2005
Date of Patent:
January 25, 2011
Assignee:
STMicroelectronics, S.r.l.
Inventors:
Angelo Magri, Ferruccio Frisina, Giuseppe Ferla
Abstract: An antenna is formed with a self-supporting structure (1), a dielectric structure (2), and a conducting structure (3), each structure being formed from at least one structural element (10; 21, 22; 31-34). The structural elements of the different structures (1, 2, 3) constitute a stack in which these elements (10; 21, 22; 31-34) are connected to each other, and the dielectric structure (2) is formed in the stack by nano-imprinting.
Type:
Grant
Filed:
December 14, 2006
Date of Patent:
January 25, 2011
Assignee:
STMicroelectronics S.A.
Inventors:
Guillaume Bouche, Sébastien Montusclat, Daniel Gloria