Abstract: A phase change memory including an ovonic threshold switch is formed using a pulsed direct current (DC) deposition chamber using pulsed DC. Pulsed DC is used to deposit a chalcogenide film. Pulsed DC may be also used to deposit a carbon film.
Type:
Grant
Filed:
October 10, 2007
Date of Patent:
February 15, 2011
Assignee:
STMicroelectronics S.R.L.
Inventors:
Roger Hamamjy, Kuo-Wei Chang, Sean Jong Lee, Chong W. Lim
Abstract: An embodiment of a process for forming an interface between a silicon carbide (SiC) layer and a silicon oxide (SiO2) layer of a structure designed to conduct current is disclosed. A first epitaxial layer having a first doping level is homo-epitaxially grown on a substrate. The homo-epitaxial growth is preceded by growing, on the first epitaxial layer, a second epitaxial layer having a second doping level higher than the first doping level. Finally, the second epitaxial layer is oxidized so as to be totally removed. Thereby, a silicon oxide layer of high quality is formed, and the interface between the second epitaxial layer and silicon oxide has a low trap density.
Type:
Grant
Filed:
February 8, 2008
Date of Patent:
February 15, 2011
Assignee:
STMicroelectronics, S.r.l.
Inventors:
Giovanni Abagnale, Dario Salinas, Sebastiano Ravesi
Abstract: A protocol-based communication between a host device (e.g., MP3 player, digital camera, palmtop, etc.) and an interface (e.g., flash mass storage card) is established automatically by providing protocol-supporting facilities in the interface, each facility supporting communication with the host device based on a respective protocol, by sending a query message from the host device to the interface specifying at least one protocol for use in protocol-based communication, by searching, within the plurality of protocol-supporting facilities provided in the interface one protocol-supporting facility supporting the protocol proposed in the query message, and if such protocol-supporting facility is found within the plurality of protocol-supporting facilities provided in the interface, by setting up the protocol-based communication between the host device and the interface based on the protocol proposed in the query message issued from the host device.
Type:
Grant
Filed:
May 25, 2006
Date of Patent:
February 15, 2011
Assignee:
STMicroelectronics S.r.l.
Inventors:
Flavio Gajo, Francesco Sforza, Stefania Stucchi, Loris Giuseppe Navoni, Michele Borgatti
Abstract: A memory stores data in an encrypted form. A modifiable register stores a memory address, a0, defining a boundary separating the memory into two regions. The lower region stores data encrypted using a key B, and the upper region stores data encrypted using a different key A. Data stored on the boundary address is encrypted using key A. Accordingly, when data is read from a memory address a, key A is used to decrypt the data if a?a0, and key B is used if a<a0. However, when data is written to a memory address a, then key A is used to encrypt the data if a?a0+1, key B is used if a<a0+1. When data is written to the boundary address, a0, the position of the boundary is caused to increase by one unit.
Type:
Grant
Filed:
September 18, 2006
Date of Patent:
February 15, 2011
Assignee:
STMicroelectronics Limited
Inventors:
Andrew Dellow, Peter Bennett, Rodrigo Cordero
Abstract: Circuit nodes are identified which, in unpowered mode, can be charged with positive or negative charges but cannot be discharged. Then protective elements are added to allow the discharge of these nodes. These elements do not affect the operation of the circuit in powered mode. Discharges of the two polarities are handled, positive and negative. The circuit is thus more resistant to ESD and passes CDM tests.
Abstract: A circuit for detecting attacks by contacting an integrated circuit chip comprising means for applying a random signal to a first terminal of at least one conductive path formed in at least one first metallization level of the chip, means for comparing the applied signal with a signal present on a second terminal of the path, and means for delaying the comparison time with respect to the application time, of a duration longer than or equal to the propagation delay through the first path.
Abstract: A photovoltaic device may include a housing having a transparent pupil receiving a collimated beam of radiation, and photovoltaic cell arrays being positioned on respective inner surfaces of the housing, each photovoltaic cell array sensing a respective spectral range of the radiation different from the other photovoltaic cell arrays. The photovoltaic device may further include dichroic filters being positioned along an optical axis of the transparent pupil and splitting the collimated beam into a corresponding divided beams of different spectrums, and mirrors corresponding to the divided beams. Each mirror may have reflecting surfaces, receive a respective divided beam, subdivide the received divided beam into reflected beams from the reflecting surfaces, and illuminate an active area of a photovoltaic cell of the respective array.
Abstract: A microelectromechanical sensing structure is provided with a mobile element adapted to be displaced as a function of a quantity to be detected, and first fixed elements, capacitively coupled to the mobile element and configured to implement with the mobile element first detection conditions. The sensing structure is further provided with second fixed elements, capacitively coupled to the mobile element and configured to implement with the mobile element second detection conditions, which are different from the first detection conditions. In particular, the first and second detection conditions differ with respect to a full-scale or a sensitivity value in the detection of the aforesaid quantity.
Type:
Grant
Filed:
October 26, 2007
Date of Patent:
February 15, 2011
Assignee:
STMicroelectronics S.R.L.
Inventors:
Angelo Merassi, Sarah Zerbini, Hubert Geitner, Marco Del Sarto
Abstract: A control circuit controls a driving circuit of a discharge lamp. The driving circuit comprises a half bridge and a clock generator that determines the switching frequency of the half bridge. The control circuit comprises a regulator that regulates the value of the switching frequency when the value of the voltage across the lamp exceeds a threshold value.
Abstract: A device is provided for electrically connecting an integrated circuit chip. The device includes a main board, an intermediate board, and electrical connection balls in a space separating the boards. In the space, a peripheral zone comprises a peripheral matrix of balls, a central zone comprises a central matrix of balls, a first secondary zone comprises a matrix of electrical connection vias linked to the balls of the two adjacent rows of balls of the peripheral matrix, and a second secondary zone comprises a matrix of electrical connection vias linked to balls of the central matrix. The first secondary zone and the second secondary zone are separated by an intermediate zone that includes at least a first part having at least one complementary row of electrical connection balls, and a second part having complementary electrical connection vias linked to the balls of this complementary row.
Type:
Grant
Filed:
August 19, 2009
Date of Patent:
February 15, 2011
Assignee:
STMicroelectronics S.A.
Inventors:
Pierre Bormann, Luc Morineau, Jacques Chavade
Abstract: A method and apparatus are provided for controlling services provided at a first electronic device at a second electronic device. A plurality of electronic devices connected to a network provide services in the form of providing data to the network, or allowing the data to be manipulated. Each service is represented as a manipulable data object created at the device providing the service. Each object contains sufficient information to allow the service the object represents to be controlled. The objects are transmitted over the network and are stored in an object list maintained by a master device. Any compatible device may then retrieve an object from the object list and use the information contained in it to fully control the service.
Type:
Grant
Filed:
August 6, 2004
Date of Patent:
February 15, 2011
Assignee:
STMicroelectronics Limited
Inventors:
Julian Marcus Wilson, Steven Nicholas Haydock, Brendan O'Connor
Abstract: The present disclosure relates to reduction in the effect of kickback in comparators by means of charge injection implemented by means of voltage controlled switches with attributes similar to those of an input differential pair. The voltage controlled switches produce charge to neutralize the charge loss during latching of inputs in the comparator.
Abstract: A method of read or write access by an electronic component of data, including generating a first secret key for a first data of an ordered list of data to access, and for each data of the list, following the first data, generating a distinct secret key by means of a deterministic function applied to a secret key generated for a previous data of the list, and the application of a cryptographic operation to each data to be read or to be written of the list, carried out by using the secret key generated for the data.
Abstract: A multi-chip system in which at least one of the chips includes a performance parameter encoded thereon. After system assembly, the performance parameter can be obtained by a companion chip and used to automatically or semi-automatically fine tune the companion chip to the specific parameters of the at least one chip.
Abstract: An adaptive predistorter for applying a predistortion gain to an input signal to be amplified by a power amplifier having a variable supply voltage, the predistorter including: a predistortion gain block adapted to apply a complex gain to a complex input signal; a first table implemented in a first memory and comprising a 2-dimensional array of cells storing complex gain values, the first table adapted to output the complex gain values based on an amplitude of the input signal and the value of the variable supply voltage of the power amplifier; and a second table implemented in a second memory and including a 2-dimensional array of cells storing gain update values for updating the complex gain values of the first table, the gain update values being generated based on an output signal of said power amplifier.
Abstract: An analog T switch is disclosed which has high isolation in the off state. The analog T switch can include series-connected NMOS transistors having separate gate control. The gates of the NMOS transistors can be isolated from one another to improve off state isolation of the analog T switch. The analog switch can include series-connected PMOS transistors having separate gate control. The gates of the PMOS transistors can be isolated from one another to improve off state isolation of the analog T switch. The analog T switch can include a substrate voltage control circuit that controls the voltage of the substrate regions in which the PMOS transistors are formed. The substrate voltage control circuit can isolate the substrate regions of the PMOS transistors from one another in the off state to improve off state isolation of the analog T switch.
Type:
Application
Filed:
August 7, 2009
Publication date:
February 10, 2011
Applicant:
STMicroelectronics Asia Pacific Pte Ltd
Abstract: A surface of a substrate comprising microcavities leading out of the substrate is placed in contact with an aqueous solution comprising a plurality of suspended particles and a fabric. Perpendicular pressure is applied the expanse of the substrate between the fabric and the surface of the substrate, and relative movement of the fabric and the surface is applied to the expanse of the substrate. At least one particle is thus fed into each microcavity, therein forming a porous material that is a catalyst material for nanothread or nanotube growth.
Type:
Application
Filed:
March 30, 2009
Publication date:
February 10, 2011
Applicants:
Commissariat A L'Energie Atomique Et Aux Energies Alternatives, STMicroelectronics (Crolles 2 ) SAS
Inventors:
Jean-Christophe Coiffic, Maurice Rivoire
Abstract: A method is provided for controlling a converter of the multiphase interleaving type. According to the method, there is detected when a change of the load applied to an output terminal of the converter occurs. All the phases of the converter are simultaneously turned on, and a driving interleaving phase shift is recovered to restart a normal operation of the converter. A controller for carrying out such a method is also provided.
Abstract: The invention relates to a single-crystal layer of a first semiconductor material including single-crystal nanostructures of a second semiconductor material, the nanostructures being distributed in a regular crystallographic network with a centered tetragonal prism.
Type:
Grant
Filed:
December 16, 2004
Date of Patent:
February 8, 2011
Assignees:
STMicroelectronics S.A., STMicroelectronics Crolles 2 SAS
Inventors:
Daniel Bensahel, Yves Campidelli, Oliver Kermarrec
Abstract: The present invention relates to a non-volatile memory comprising a memory array comprising functional memory cells and non-functional memory cells linked to at least one non-functional word line. A word line address decoder comprises a special decoding section linked to the non-functional word line, for selecting the non-functional word line when a functional word line is read-selected, such that non-functional memory cells are selected simultaneously with the functional memory cells, and distort the reading of the functional memory cells. Application particularly to integrated circuits for smart cards.