Abstract: An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.

Abstract: The block de-interleaving system includes an input for receiving a set of time-aligned blocks or interleaved data, physical memory unit, and a de-interleaving block for writing the blocks in the memory in a first predetermined manner and reading the blocks from the memory in a second predetermined manner to de-interleave the data of the blocks. The physical memory unit may include several different physical memories, and the de-interleaving block is adapted to completely write and read a block into and from one physical elementary memory.

Abstract: The method of determining a focus measure from an image includes detecting one or more edges in the image by processing the image with one or more first order edge detection kernels adapted to reject edge phasing effects. A first measure of the strength of each of the edges, and the contrast of each of the edges may be determined. The method may include normalizing the first measure of the strength of each of the edges by the contrast of each of the edges to obtain a second measure of the strength of each of the edges, and resealing the second measure of the strength of each of the edges. The method may also include selecting one or more of the edges from the image in accordance with the second measure of their strengths, and calculating the focus measure from the second measure of the strengths of the selected edges.

Abstract: A bipolar device is integrated in an active layer, wherein delimitation trenches surround respective active areas housing bipolar transistors of complementary types. Each active area accommodates a buried layer; a well region extending on top of the buried layer; a top sinker region extending between the surface of the device and the well region; a buried collector region extending on top of the well region and laterally with respect to the top sinker region; a base region, extending on top of the buried collector region laterally with respect to the top sinker region; and an emitter region extending inside the base region. The homologous regions of the complementary transistors have a similar doping level, being obtained by ion-implantation of epitaxial layers wherein the concentration of dopant added during the growth is very low, possibly zero.

Abstract: An electrostatic micromotor is provided with a fixed substrate, a mobile substrate facing the fixed substrate, and electrostatic-interaction elements enabling a relative movement of the mobile substrate with respect to the fixed substrate in a movement direction; the electrostatic micromotor is also provided with a capacitive position-sensing structure configured to enable sensing of a relative position of the mobile substrate with respect to the fixed substrate in the movement direction. The capacitive position-sensing structure is formed by sensing indentation, extending within the mobile substrate from a first surface thereof, and by first sensing electrode, facing, in given operating condition, the sensing indentation.

Abstract: A Schmitt trigger circuit includes a first inverter having an input coupled to an input terminal; a second inverter having an input coupled to the input terminal; a first transistor having a source coupled to VDD, a drain coupled to an output of the first inverter, and a gate coupled to an output terminal; a second transistor having a source coupled to ground, a drain coupled to an output of the second inverter, and a gate coupled to the output terminal; a third transistor having a source coupled to VDD, a drain coupled to the output terminal, and a gate coupled to the output of the first inverter; and a fourth transistor having a source coupled to ground, a drain coupled to the output terminal, and a gate coupled to the output of the second inverter.

Abstract: A method of forming an image sensor having a sensor, a cover, and a filter, that may include applying a filter layer to a cover layer by masking the cover layer with a predetermined pattern and applying the filter layer by a deposition process. The method may also include bonding the cover layer to a sensor layer including a plurality of sensors. The predetermined pattern may result in a filter layer which is aligned with each sensor. There may be gaps in the filter layer around each sensor.

Abstract: A structure for protecting an integrated circuit against electrostatic discharges, including a device for removing overvoltages between first and second power supply rails; and a protection cell connected to a pad of the circuit including a diode having an electrode, connected to a region of a first conductivity type, connected to the second power supply rail and having an electrode, connected to a region of a second conductivity type, connected to the pad and, in parallel with the diode, a thyristor having an electrode, connected to a region of the first conductivity type, connected to the pad and having a gate, connected to a region of the second conductivity type, connected to the first rail, the first and second conductivity types being such that, in normal operation, when the circuit is powered, the diode is non-conductive.

Abstract: An embodiment of a MOS device resistant to ionizing-radiation, has: a surface semiconductor layer with a first type of conductivity; a gate structure formed above the surface semiconductor layer, and constituted by a dielectric gate region and a gate-electrode region overlying the dielectric gate region; and body regions having a second type of conductivity, formed within the surface semiconductor layer, laterally and partially underneath the gate structure. In particular, the dielectric gate region is formed by a central region having a first thickness, and by side regions having a second thickness, smaller than the first thickness; the central region overlying an intercell region of the surface semiconductor layer, set between the body regions.

Abstract: A system and method for verifying the authenticity of instructions retrieved from a memory for execution by a processor. In one embodiment, an instruction monitor monitors execution parameters associated with the retrieved instruction and resets the system in response to an indication that an instruction is not authentic.

Abstract: A method of manufacturing a vertical power MOS transistor on a wide band gap semiconductor substrate having a wide band gap superficial semiconductor layer, including the steps of forming a screening structure on the superficial semiconductor layer that leaves a plurality of areas of the superficial semiconductor layer exposed, carrying out at least a first ion implantation of a first type of dopant in the superficial semiconductor layer for forming at least one deep implanted region, carrying out at least a second ion implantation of the first type of dopant in the superficial semiconductor layer for forming at least one implanted body region of the MOS transistor aligned with the deep implanted region, carrying out at least one ion implantation of a second type of dopant in the superficial semiconductor layer for forming at least an implanted source region of the MOS transistor inside the at least one implanted body region, and a low budget activation thermal process of the first and second dopant types sui

Abstract: A fuel cell is entirely fabricated on a single monocrystalline silicon substrate, and substantially overcomes leak proofing and wafer bonding difficulties and criticalities while ensuring an intrinsic sturdiness of the planarly integrated functional structure of the fuel cell. The integrated fuel cell is formed in an oxidized porous silicon region on a monocrystalline silicon substrate that is pervious to fluid flow and is electrically nonconductive with the monocrystalline silicon substrate.

Abstract: A device, such as a pump capacitor or an energy storing inductor, is charged by coupling it to a voltage source. Thereafter, the device is connected in parallel to one of the capacitors or capacitance cells to be charged, and the charging of the device and successive connections of it in parallel to a selected capacitor of the series of capacitors for charging it are replicated for all the capacitors of the series. The sequence of different connections of the device to the charge voltage source and to the selected one of the capacitors of the series is actuated through a plurality of coordinately controlled switches that establish distinct current circulation paths, according to a switched-capacitor or switched inductor techniques driven by respective periodic control signals that may be generated from a master clock signal.

Abstract: A method for providing cascaded trie-based network packet search engines is provided. A search command is received at one of the network packet search engines. The search command comprises a specific search key. A determination of a longest prefix match based on the specific search key is made at the network packet search engine. A determination is made at the network packet search engine regarding whether the longest prefix match comprises an overall longest prefix match among the cascaded network packet search engines such that any of the cascaded network packet search engines may comprise the overall longest matching prefix independently of position relative to the other cascaded network packet search engines.

Abstract: Disk drive spindle jitter is comprised of electrical noise, error due to pair pole asymmetry, and random disk speed variances. Error caused by pair pole asymmetry can be identified and compensated for by detecting over a single rotation of a rotor a plurality of zero cross signals. These signals can be statistically analyzed over a period of a plurality of revolutions of the rotor so as to identify the systematic error caused by pair poles. Once identified, this pair pole error can be used to modify zero cross signals and/or modify commutation signal driving the disk so as to arrive at a more accurate determination of disk speed and to precisely control the speed of the disk.

Abstract: Device comprising a camera module with automatic focusing itself comprising an optical chip (8) and an optical block (7), the optical block (7) integrating at least an objective (3), at least a focusing means (11) for adjusting the focus of the objective (3), the optical chip (8) integrating at least an image sensor (14) placed on a first face of a substrate of the optical chip (8). This optical chip (8) also includes a microprocessor (4) placed on the same substrate, receiving image signals originating from the image sensor (14) and generating a control signal based on the said image signals, that is applied to the said focusing means (11) to focus the objective (3).

Abstract: A transistor including a germanium-rich channel. The germanium-rich channel is produced by oxidation of the silicon contained in the silicon-germanium intermediate layer starting from the lower surface of the said intermediate layer. The germanium atoms are therefore caused to migrate towards the upper surface of the silicon-germanium intermediate layer, and are stopped by the gate insulating layer. The migration of the atoms during the oxidation step is thus less prejudicial to the performance of the transistor, since the gate insulator of the transistor has already been produced and is not modified during this step. The migration of the germanium atoms towards the gate insulator, which is immobile, leads to a limitation of the surface defects between the channel and the insulator.

Abstract: An image sensor including a first substrate having a first surface intended to be illuminated and a second surface on the side of which is formed a plurality of photodetection areas, said second surface being covered with a stack of interconnect levels including metal layers topped with insulating material, and of a second substrate placed on the insulating material of the last interconnect level, in which are formed vias in contact with connection elements of the interconnect levels, at least one of the interconnect levels including conductive shielding areas aligned with the photodetection areas.

Abstract: An embodiment of a discharge circuit comprises an output circuit with one output connected to an electrical load to absorb a discharge current given by the load when a logic signal commands a discharge of the load. The discharge circuit also comprises a control circuit to give the output circuit an appropriate control signal so that a slope of an output potential of the output circuit diminishes gradually when the logic signal commands a discharge of the load. Limiting the slope of the output potential gradually (and not suddenly) may limit the electromagnetic radiation generated by these variations.

Abstract: A voltage-level translator circuit including two pairs of branches in parallel, each pair including a low-impedance branch, where the low-impedance branches can be activated or deactivated. A possible application is the voltage level switching of data originating from an integrated circuit.