Patents Assigned to STMicroelectronics
  • Patent number: 7877252
    Abstract: An automatic speech recognition method includes converting an acoustic signal into a digital signal; determine a power spectrum of at least one portion of the digital signal; and non-linearly determining envelope values of the power spectrum at a plurality of respective frequencies, based on a combination of the power spectrum with a filter function. Non-linearly determining envelope values involves calculating each envelope value based on a respective number of values of the power spectrum and of the filter function and the respective number of values is correlated to the respective frequency of the envelope value.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: January 25, 2011
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luigi Arnone, Alberto Amilcare Savi
  • Patent number: 7876290
    Abstract: A device for controlling a matrix screen includes a scanning circuit. The scanning circuit includes a row control block which successively selects each row, and a column control block which, for each selected row, selects or deselects a set of columns of the screen with the aid of column selection or deselection signals. The temporal evolution of each column selection signal and of each column deselection signal includes a first and a second part separated by an intermediate porch. The column control block, for each column of the screen, determines if the corresponding column has to be selected or deselected, determines the value of the capacitance seen by the column termed the column-capacitance, and adjusts temporal evolution characteristics of the selection or deselection signal of at least one column to be selected or deselected as a function of the determined value of its column-capacitance.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: January 25, 2011
    Assignee: STMicroelectronics S.A.
    Inventors: Jean-Raphaël Bezal, Eric Cirot
  • Patent number: 7877236
    Abstract: An integrated circuit includes a first storage location, a first generator, a converter, and a second generator. The first storage location is operable to store a first adjustment value. The first generator is coupled to the first storage location, is operable to generate a first signal having a first characteristic, and includes a first adjuster operable to change the first characteristic in response to the first adjustment value. The converter is coupled to the first storage location and is operable to generate from the first adjustment value a modified adjustment value. The second generator is coupled to the converter, is operable to generate a second signal having a second characteristic, and includes a second adjuster operable to change the second characteristic in response to the modified adjustment value.
    Type: Grant
    Filed: July 27, 2007
    Date of Patent: January 25, 2011
    Assignees: STMicroelectronics Asia Pacific Pte Ltd, Hynix Semiconductor Inc.
    Inventors: Donghyun Seo, Kijun Nam, Seokseong Yoon
  • Patent number: 7876504
    Abstract: An optical die, which is intended to be placed in front of an optical sensor of a semiconductor component, has an optically useful zone having an optical axis and exhibiting a variable refractive index. Specifically the refractive index of the die is variable in an annular peripheral zone lying between a radius Ru enveloping the useful zone and a smaller radius Ro. The index is varies as a function of radial distance from a higher value near the smaller radius Ro to a lower value near the radius Ru. The function of the variable refractive index lies between a maximum and minimum profile.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: January 25, 2011
    Assignee: STMicroelectronics (Grenoble) SAS
    Inventors: Emmanuelle Vigier-Blanc, Guillaume Cassar, Thierry Lepine
  • Patent number: 7876972
    Abstract: A method for correcting an image from defects and filtering from Gaussian noise corrects each pixel of the image when it is considered defective and filters it from Gaussian noise in one-pass. The one-pass improves the speed for performing the correcting and filtering. The drawbacks associated with choosing incompatible defect correction and filtering operations are overcome.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: January 25, 2011
    Assignee: STMicroelectronics S.R.L.
    Inventors: Angelo Bosco, Arcangelo Ranieri Bruna
  • Patent number: 7876153
    Abstract: A transconductor circuit, particularly according to the multi-tanh principle, having a first input node and a second input node, a first differential amplifier coupled to the first and second input nodes, and having a first offset voltage, and a second differential amplifier coupled to the first and second input nodes, and having a second offset voltage different from the first offset voltage. A first resistance circuit is coupled between the first differential amplifier and at least one current source, and a second resistance circuit is coupled between the second differential amplifier and the at least one current source. Varying of the current sources enables control of the transconductance without degrading linearity.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: January 25, 2011
    Assignee: STMicroelectronics Design and Application GmbH
    Inventor: Sebastian Zeller
  • Patent number: 7875915
    Abstract: An integrated circuit includes at least one photodiode associated with a read transistor. The photodiode is formed from a stack of three semiconductor layers comprising a buried layer, an floating substrate layer and an upper layer. The drain region and/or the source region of the transistor are incorporated within the upper layer. The buried layer is electrically isolated from the upper layer so as to allow the buried layer to be biased independently of the upper layer.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: January 25, 2011
    Assignee: STMicroelectronics S.A.
    Inventors: François Roy, Arnaud Tournier
  • Patent number: 7876971
    Abstract: A system renders a primitive of an image to be displayed, for instance in a mobile 3D graphic pipeline, the primitive including a set of pixels. The system locates the pixels in the area of the primitive, generates, for each pixel located in the area, a set of associated sub-pixels, borrows a set of sub-pixels from neighboring pixels, subjects the set of associated sub-pixels and the borrowed set of pixels to adaptive filtering to create an adaptively filtered set of sub-pixels, and further filters the adaptively filtered set of sub-pixels to compute a final pixel for display. Preferably, the set of associated sub-pixels fulfils at least one of the following: the set includes two associated sub-pixels and the set includes associated sub-pixels placed on pixel edges.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: January 25, 2011
    Assignee: STMicroelectronics S.r.l.
    Inventors: Pierluigi Gardella, Massimiliano Barone, Edoardo Gallizio, Danilo Pau
  • Publication number: 20110012785
    Abstract: A system and method of locating the position of a satellite or a user using a satellite positioning system. The system and method includes receiving, at a terminal, satellite positioning data for at least one specified time period over a communications channel. In addition, the system includes storing, at the terminal, the satellite positioning data for the at least one specified time period. Responsive to an event at a later time, the system generally calculates, at the terminal, the satellite position at the later time based only on the satellite positioning data for the at least one specified time period.
    Type: Application
    Filed: September 29, 2010
    Publication date: January 20, 2011
    Applicant: STMicroelectronics (Research & Development) Limited
    Inventor: Philip Mattos
  • Publication number: 20110012693
    Abstract: A method for forming a resonator including a resonant element, the resonant element being at least partly formed of a body at least partly formed of a first conductive material, the body including open cavities, this method including the steps of measuring the resonator frequency; and at least partially filling said cavities.
    Type: Application
    Filed: June 4, 2010
    Publication date: January 20, 2011
    Applicant: STMicroelectronics S.A.
    Inventors: Fabrice Casset, Cédric Durand
  • Publication number: 20110012267
    Abstract: An integrated device, including: a first conductive region; a second conductive region set at a distance from the first conductive region; an etch-stop layer, made of a first dielectric material, at least partially overlapped on the first and second conductive regions; an insulating layer, made of a second dielectric material, different from the first, overlapped on the first and second conductive regions and on the etch-stop layer; at least one through opening extending through the insulating layer and the etch-stop layer; and a barrier layer, made of a third dielectric material, different from the first, set between the first conductive region and the etch-stop layer and between the second conductive region and the etch-stop layer.
    Type: Application
    Filed: July 15, 2010
    Publication date: January 20, 2011
    Applicant: STMicroelectronics S.r.l.
    Inventors: Riccardo Depetro, Stefano Manzini
  • Patent number: 7872894
    Abstract: A memory cell is protected against current or voltage spikes. The cell includes a group of redundant data storage nodes for the storage of information in at least one pair of complementary nodes. The cell further includes circuitry for restoring information to its initial state following a current or voltage spike which modifies the information in one of the nodes of the pair using the information stored in the other node. The data storage nodes of each pair in the cell are implanted on opposite sides of an opposite conductivity type well from one another within a region of a substrate defining the boundaries of the memory cell.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: January 18, 2011
    Assignee: STMicroelectronics S.A.
    Inventors: Philippe Roche, Francois Jacquet
  • Patent number: 7871880
    Abstract: A method manufactures a vertical power MOS transistor on a semiconductor substrate comprising a first superficial semiconductor layer of a first conductivity type, comprising: forming trench regions in the first semiconductor layer, filling in said trench regions with a second semiconductor layer of a second conductivity type, to form semiconductor portions of the second conductivity type contained in the first semiconductor layer, carrying out an ion implantation of a first dopant type in the semiconductor portions for forming respective implanted body regions of said second conductivity type, carrying out an ion implantation of a second dopant type in one of the implanted body regions for forming an implanted source region of the first conductivity type inside one of the body regions, carrying out an activation thermal process of the first and second dopant types with low thermal budget suitable to complete said formation of the body and source regions.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: January 18, 2011
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ferruccio Frisina, Mario Giuseppe Saggio
  • Patent number: 7873515
    Abstract: A method includes receiving a sequence of frames containing audio information and determining that a frame is missing in the sequence of frames. The method also includes comparing the frame that precedes the missing frame to the received frames to identify a selected frame. The method further includes identifying a replacement frame comprising the frame that follows the selected frame. In addition, the method includes inserting the replacement frame into the sequence of frames in place of the missing frame.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: January 18, 2011
    Assignee: STMicroelectronics Asia Pacific Pte. Ltd.
    Inventors: Kabi P. Padhi, Sudhir K. Kumar, Sapna George
  • Patent number: 7871832
    Abstract: The generation of a chip identifier supporting at least one integrated circuit, which includes providing a cutout of least one conductive path by cutting the chip, the position of the cutting line relative to the chip conditioning the identifier.
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: January 18, 2011
    Assignee: STMicroelectronics S.A.
    Inventor: Fabrice Marinet
  • Patent number: 7873510
    Abstract: A system and method for adaptive rate control in audio processing is provided. The process could include receiving uncompressed audio data from an input and generating MDCT spectrum for each frame of the uncompressed audio data using a filterbank. The process could also include estimating masking thresholds for current frame to be encoded based on the MDCT spectrum. The masking thresholds reflect a bit budget for the current frame. The process could also include performing quantization of the current frame based on the masking thresholds. After the quantization of the current frame, the bit budget for next frame is updated for estimating the masking thresholds of the next frame. The process could also include encoding the quantized audio data.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: January 18, 2011
    Assignee: STMicroelectronics Asia Pacific Pte. Ltd.
    Inventors: Evelyn Kurniawati, Sapna George
  • Patent number: 7872326
    Abstract: A process for manufacturing an array of bipolar transistors, wherein deep field insulation regions of dielectric material are formed in a semiconductor body, thereby defining a plurality of active areas, insulated from each other and a plurality of bipolar transistors are formed in each active area. In particular, in each active area, a first conduction region is formed at a distance from the surface of the semiconductor body; a control region is formed on the first conduction region; and, in each control region, at least two second conduction regions and at least one control contact region are formed. The control contact region is interposed between the second conduction regions and at least two surface field insulation regions are thermally grown in each active area between the control contact region and the second conduction regions.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: January 18, 2011
    Assignee: STMicroelectronics S.r.l.
    Inventors: Michele Magistretti, Fabio Pellizzer, Augusto Benvenuti
  • Patent number: 7873191
    Abstract: A capacitive array comprising at least two capacitive entities, comprising a substrate layer. The substrate layer comprises a comb comprising at least four substantially identical teeth, and, for each capacitive entity, a set of fingers comprising one or more interlinked fingers. At least two sets of fingers comprise a different number of fingers, each finger being nested between two teeth of the comb and being substantially identical to the other fingers. The fingers of each set of fingers are substantially distributed symmetrically relative to a median axis of the comb. The comb and the fingers are integrated in a single block.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: January 18, 2011
    Assignee: STMicroelectronics S.A.
    Inventor: Jérôme Bach
  • Patent number: 7871894
    Abstract: A process for manufacturing a suspended structure of semiconductor material envisages the steps of: providing a monolithic body of semiconductor material having a front face; forming a buried cavity within the monolithic body, extending at a distance from the front face and delimiting, with the front face, a surface region of the monolithic body, said surface region having a first thickness; carrying out a thickening thermal treatment such as to cause a migration of semiconductor material of the monolithic body towards the surface region and thus form a suspended structure above the buried cavity, the suspended structure having a second thickness greater than the first thickness. The thickening thermal treatment is an annealing treatment.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: January 18, 2011
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Pietro Corona, Flavio Francesco Villa, Gabriele Barlocchi
  • Publication number: 20110006032
    Abstract: A method of metal deposition may include chemically modifying a surface of a substrate to make the surface hydrophobic. The method may further include depositing a layer of metal over the hydrophobic surface and masking at least a portion of the deposited metal layer to define a conductive metal structure. The method may also include using an etching agent to etch unmasked portions of the deposited metal layer.
    Type: Application
    Filed: July 13, 2010
    Publication date: January 13, 2011
    Applicant: STMicroelectronics S.r.l.
    Inventors: Fabrizio PORRO, Luigi Giuseppe Occhipinti