Abstract: A chip with a built-in self-test (BIST) component capable of testing the linearity of an ADC is described herein. The BIST component uses hardware registers to facilitate a sliding histogram technique to save space on the chip. A subset of detected digital codes are analyzed, and DNL and INL calculations are performed by a controller to determine whether any of the digital codes in the subset exceed maximum or minimum DNL and INL thresholds. New digital codes being detected by the ADC are added to the subset as lower-value digital codes are pushed out of the subset, maintaining the same number of digital codes being analyzed as the subset moves from lower codes detected during lower voltages to higher codes detected at higher voltages. A synchronizer and pointer ensure that the subset moves through the digital codes at the same rate as the analog input ramp source.
Type:
Grant
Filed:
April 10, 2013
Date of Patent:
August 12, 2014
Assignee:
STMicroelectronics International N.V.
Inventors:
Ravindranath Ramalingaiah Munnan, Raghu Ravindran, Ravi Shekhar
Abstract: A circuit includes a direct current (DC) gate termination impedance having an impedance for DC signals higher than a maximum impedance DC at which dendrite growth occurs in the circuit, and a radio frequency (RF) gate termination impedance having an impedance for RF signals lower than a maximum impedance at which RF stability for the circuit is maintained for an application.
Abstract: A method for protecting at least first data of a non-volatile memory from which the extraction of this first data is triggered by the reading or the writing, by a processor from or into the memory, of second data independent from the first data, said first data being provided to a circuit which the processor cannot access.
Abstract: A current reuse device including a first stage provided with a first input for a first input signal and a first output for a first output signal; a second stage comprising a second input for a second input signal and a direct current terminal operating as a ground terminal for alternate signals; a first inductor connected to a first output and to the direct current terminal so that the first and second stages share a direct current; a second inductor reciprocally coupled to the first inductor and connected to the second input in order to generate the second input signal as a function of the first output signal.
Type:
Grant
Filed:
September 5, 2012
Date of Patent:
August 12, 2014
Assignee:
STMicroelectronics S.r.l.
Inventors:
Vittorio Giammello, Egidio Ragonese, Giuseppe Palmisano
Abstract: A control device for a resonant converter, the control device including a first circuit to integrate at least one signal indicating a half wave of a current circulating in a primary winding of a transformer; the first circuit is structured to generate at least a control signal of the switching circuit depending on the integrated signal. The control device includes a second circuit to impose the equality of a switching-on time period of the first and second switches.
Type:
Grant
Filed:
December 27, 2010
Date of Patent:
August 12, 2014
Assignee:
STMicroelectronics S.r.l.
Inventors:
Claudio Adragna, Aldo Vittorio Novelli, Christian Leone Santoro
Abstract: An embodiment is a method, and related system, to implement the square root extraction operation, which grants a 32 bits precision, which has high execution speed and is able to process a decimal radicand. An embodiment relates to a method for controlling an electric machine, comprising the detection of the value of at least one electrical quantity characterizing the machine operation and processing the detected value of said electrical quantity. The control method controls the machine operation on the basis of this processing. In particular the processing of the detected value of the electrical quantity comprises calculating a square root of a radicand value related to the detected value of electrical quantities.
Abstract: An energy scavenging device includes an electromagnetic transducer adapted to generate a current in response to accelerations impressed thereto. The device also includes a power switching stage input with the current generated by the electromagnetic transducer, having a network of controlled switches adapted to alternately deliver on output nodes of the switching stage an output current that does not invert its sign and to short-circuit the transducer. There is an output capacitor coupled between the output nodes of the power stage. A controller having a sensor coupled to the electromagnetic transducer is to sense the current flowing therethrough, the controller being adapted to drive the switches of the power stage in order to either short-circuit the electromagnetic transducer or to direct the current flowing through the transducer to charge the output capacitor.
Abstract: A method for protecting data against power analysis attacks includes at least a first phase of executing a cryptographic operation for ciphering data in corresponding enciphered data through a secret key. The method includes at least a second phase of executing an additional cryptographic operation for ciphering additional data in corresponding enciphered additional data. An execution of the first and second phases is undistinguishable by the data power analysis attacks. Secret parameters are randomly generated and processed by the at least one second phase. The secret parameters include an additional secret key ERK for ciphering the additional data in the corresponding enciphered additional data.
Type:
Grant
Filed:
June 29, 2007
Date of Patent:
August 12, 2014
Assignee:
STMicroelectronics International N.V.
Inventors:
Giovanni Fontana, Saverio Donatiello, Giovanni Di Sirio
Abstract: A passive bond pad condition sense structure may be configured to be electrically stimulated and tested for detecting an anomalous or altered electrical characteristic caused by stress or aging of the bond pad capacitively coupled to it. The related bond pad condition testing or monitoring system may include relatively simple stimulating and sensing circuits that may be wholly embedded in the integrated circuit device.
Abstract: A method for forming the gate insulator of a MOS transistor, including the steps of: a) forming a thin silicon oxide layer at the surface of a semiconductor substrate; b) incorporating nitrogen atoms into the silicon oxide layer by plasma nitridation at a temperature lower than 200° C., to transform this layer into a silicon oxynitride layer; and c) coating the silicon oxynitride layer with a layer of a material of high dielectric constant, wherein steps b) and c) follow each other with no intermediate anneal step.
Type:
Grant
Filed:
April 10, 2012
Date of Patent:
August 12, 2014
Assignee:
STMicroelectronics (Crolles 2) SAS
Inventors:
Olivier Gourhant, David Barge, Clément Gaumer, Mickaël Gros-Jean
Abstract: A method of resetting a photosite is disclosed. Photogenerated charges accumulated in the photosite are reset by recombining the photogenerated charges with charges of opposite polarity.
Type:
Grant
Filed:
July 18, 2011
Date of Patent:
August 12, 2014
Assignees:
STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
Abstract: A circuit includes a first circuit module with a first input node, a second input node and an output node. The first circuit module receives an input signal at the first input node and generates an amplified signal at the output node. The circuit further includes a second circuit module coupled between the output node and a reference potential line. The second circuit selectively draws a current from the output node in response to a first control signal. The first control signal is generated in response to sensing a voltage fluctuation at a power supply node which supplies power to the first circuit module.
Abstract: A dynamic element matching (DEM) scheme is implemented in a crawling code generator for converting a b-bit binary input code into a (2b?1)-bit digital output code. A random generator determines for every conversion step a direction. A decimal difference between the current and previous binary input is calculated. The new crawling output code is determined based on the previous crawling output code, the direction and the decimal difference. The DEM scheme is used in a digital-to-analog converter such that the crawling output code switches digital-to-analog converting elements that output analog signals that are then summed to be the final analog signal.
Abstract: A high-voltage vertical power component including a silicon substrate of a first conductivity type, and a first semiconductor layer of the second conductivity type extending into the silicon substrate from an upper surface of the silicon substrate, wherein the component periphery includes: a porous silicon ring extending into the silicon substrate from the upper surface to a depth deeper than the first layer; and a doped ring of the second conductivity type, extending from a lower surface of the silicon surface to the porous silicon ring.
Type:
Application
Filed:
February 7, 2013
Publication date:
August 7, 2014
Applicants:
Universite Francois Rabelais, STMicroelectronics (Tours) SAS
Abstract: A method of PWM regulating a motor through a half-bridge drive stage includes sampling the motor current to obtain sampled values during driving intervals or during current decay intervals, and comparing a last sampled value with a current threshold. The motor is coupled in a slow decay electrical path for the duration of a current decay interval if the last sampled value does not exceed the current threshold. Otherwise the motor is coupled in a fast decay electrical path for a portion of the duration of the current decay interval, and is coupled in the slow decay electrical path for a remaining part of the duration of the same current decay interval.
Type:
Application
Filed:
January 30, 2014
Publication date:
August 7, 2014
Applicant:
STMicroelectronics S.r.I.
Inventors:
Paolo PASCALE, Federico Magni, Ezio Galbiati, Giuseppe Maiocchi, Michele Berto Boscolo
Abstract: An integrated magnetic sensor formed by a semiconductor chip having a surface and accommodating a magnetic via and a sensing coil. The magnetic via is formed by a cylindrical layer of ferromagnetic material that extends perpendicular to the surface of the first chip and has in cross-section an annular shape of a circular or elliptical or curvilinear type. The sensing coil surrounds the magnetic via at a distance and is connected to an electronic circuit.
Abstract: A MOS transistor including, above a gate insulator, a conductive gate stack having a height, a length, and a width, this stack having a lower portion close to the gate insulator and an upper portion, wherein the stack has a first length in its lower portion, and a second length shorter than the first length in its upper portion.
Type:
Application
Filed:
January 31, 2014
Publication date:
August 7, 2014
Applicants:
STMicroelectronics S.A., Commissariat à I'Énergie Atomique et aux Énergies Alternatives, STMicroelectronics (Crolles 2) SAS
Inventors:
Heimanu Niebojewski, Yves Morand, Cyrille Le Royer
Abstract: A method for forming a back-side illuminated image sensor, including the steps of: a) forming, from the front surface, doped polysilicon regions, of a conductivity type opposite to that of the substrate, extending in depth orthogonally to the front surface and emerging into the first layer; b) thinning the substrate from its rear surface to reach the polysilicon regions, while keeping a strip of the first layer; c) depositing, on the rear surface of the thinned substrate, a doped amorphous silicon layer, of a conductivity type opposite to that of the substrate; and d) annealing at a temperature capable of transforming the amorphous silicon layer into a crystallized layer.
Type:
Application
Filed:
April 7, 2014
Publication date:
August 7, 2014
Applicants:
STMicroelectronics S. A., STMicroelectronics (Crolles 2) SAS
Abstract: An embodiment of a motor controller includes first and second supply nodes, a motor-coil node, an isolator, a motor driver, and a motor position signal generator. The isolator is coupled between the first and second supply nodes, and the motor driver is coupled to the second supply node and to the motor-coil node. The motor position signal generator is coupled to the isolator and is operable to generate, in response to the isolator, a motor-position signal that is related to a position of a motor having at least one coil coupled to the motor-coil node. By generating the motor-position signal in response to the isolator, the motor controller or another circuit may determine the at-rest or low-speed position of a motor without using an external coil-current-sense circuit.
Abstract: An electrical-optical modulator may function at high data rates and may be realized in comparably low cost silicon base technology, typically in BJT, BiCMOS or CMOS technologies. The output signal path may include a high transition frequency BJT and by using an active load constituted by a MOS driven by an inverted version of the modulating signal that drives the BJT, the falling edge of the output signal is sped up.
Type:
Application
Filed:
January 22, 2014
Publication date:
August 7, 2014
Applicant:
STMICROELECTRONICS S.r.I.
Inventors:
Maurizio ZUFFADA, Enrico Stefano TEMPORITI MILANI, Antonio FINCATO