Abstract: The first electrode of the transistor may include a first electrically conductive region provided within the semiconductor substrate. The second electrode may include a second electrically conductive region provided within the semiconductor substrate. The first and second regions may be separated by the substrate region, and the control electrode may include a third electrically conductive region provided within the substrate. The third electrically conductive region may be both separated from the substrate region by an insulating region and electrically coupled to the substrate region by a junction diode intended to be reverse-biased.

Abstract: The disclosure relates to a method of reading and writing memory cells, each including a charge accumulation transistor in series with selection transistor, including applying a selection voltage to a gate of the selection transistor of the memory cell; applying a read voltage to a control gate of the charge accumulation transistor of the memory cell; applying the selection voltage to a gate of the selection transistor of a second memory cell coupled to the same bitline; and applying an inhibition voltage to a control gate of the charge accumulation transistor of the second memory cell, to maintain the transistor in a blocked state.

Abstract: An embodiment of a semiconductor power device provided with: a structural body made of semiconductor material with a first conductivity, having an active area housing one or more elementary electronic components and an edge area delimiting externally the active area; and charge-balance structures, constituted by regions doped with a second conductivity opposite to the first conductivity, extending through the structural body both in the active area and in the edge area in order to create a substantial charge balance. The charge-balance structures are columnar walls extending in strips parallel to one another, without any mutual intersections, in the active area and in the edge area.

Abstract: A trench is formed in a semiconductor substrate by depositing an etch mask on the substrate having an opening, etching of the trench through the opening, and doping the walls of the trench. The etching step includes a first phase having an etch power set to etch the substrate under the etch mask, and a second phase having an etch power set smaller than the power of the first phase. Further, the doping of the walls of the trench is applied through the opening of the etch mask.

Abstract: An integrated circuit includes an output pad, an alarm output pad, and a test mode output pad. A first multi-bit register is programmable to store programmable data such as data that identifies a customer for whom the integrated circuit has been manufactured. A second multi-bit register is programmable to store customer specified threshold data. A first circuit selectively couples the first and second multi-bit registers to the output pad. The first circuit is operable responsive to the integrated circuit being placed into a test mode to perform parallel-to-serial conversion of either the customer identification data stored in the first multi-bit register or the customer specified threshold data stored in the second multi-bit register and drive the converted data for output through the output pad. The integrated circuit further includes a tamper detection circuit operable responsive to the customer specified threshold data to generate a tamper alarm signal.

Abstract: An insulated gate semiconductor device, comprising: a semiconductor body having a front side and a back side opposite to one another; a drift region, which extends in the semiconductor body and has a first type of conductivity and a first doping value; a body region having a second type of conductivity, which extends in the drift region facing the front side of the semiconductor body; a source region, which extends in the body region and has the first type of conductivity; and a buried region having the second type of conductivity, which extends in the drift region at a distance from the body region and at least partially aligned to the body region in a direction orthogonal to the front side and to the back side.

Abstract: A method of generation, by a digital processing device, of a first high dynamic range digital image from second and third digital images of a same scene, including, for at least one point of the first image: determining a brightness index; comparing this index with at least one of first, second, third, and fourth decreasing thresholds stored in a memory; and determining the value of the point by taking into account the value of the index.

Abstract: A method for manufacturing a fin MOS transistor from an SOI-type structure including a semiconductor layer on a silicon oxide layer coating a semiconductor support, this method including the steps of: a) forming, from the surface of the semiconductor layer, at least one trench delimiting at least one fin in the semiconductor layer and extending all the way to the surface of the semiconductor support; b) etching the sides of a portion of the silicon oxide layer located under the fin to form at least one recess under the fin; and c) filling the recess with a material selectively etchable over silicon oxide.

Abstract: A current mirror circuit provides a current to drive a load. A noise cancelling circuit is provided to keep the load current constant in spite of variations in the supply voltage. The noise cancelling circuit includes an auxiliary current path which branches from the load current path. The length-to-width ratios of transistors of the circuit are selected to provide the desired noise cancellation while maintaining device stability.

Abstract: Applicant has recognized and appreciated the desirability of powering an actuator using power drawn from one or both of an energy storage device and a spindle motor. In some embodiments, following a loss of external power to a hard disk drive, the hard disk drive (or one or more components thereof) determines whether to provide the actuator with power drawn from the spindle motor or to provide the actuator with power drawn from the spindle motor and from the energy storage device. In some embodiments, the hard disk drive (or the component(s) thereof) may additionally or alternatively determine whether to charge the energy storage device using power drawn from the spindle motor. In some embodiments, the drive may make the determinations based on an amount of power that the actuator is to consume at a time and an amount of power that the spindle motor can provide at the time.

Abstract: The disclosure relates to a hot electron injection MOS transistor, comprising source and drain regions formed in a semiconductor substrate, a control gate, and a floating gate comprising electrically conductive nanoparticles. The control gate comprises a first portion arranged at a first distance from the substrate, a second portion arranged at a second distance less than the first distance from the substrate, and an intermediary portion linking the first and the second portions.

Abstract: A switch includes at least one input configured to receive data and at least two outputs configured to send data to at least two further switches in a network via at least two output links. Each output link has a known hop value. The switch further includes a direction determinator that determines a routing direction for the data from information identifying a relative location of the switch in the network and information identifying a destination of said data. A distributor within the switch processes the routing direction and direction information about each output link in order to select one of said at least two outputs for outputting said data. The selection that is made prioritizes output links for selection which have relatively higher known hop values.

Abstract: A method that includes forming a first level of active circuitry on a substrate, forming a first probe pad electrically connected to the first level of active circuitry where the first probe pad having a first surface, contacting the first probe pad with a probe tip that displaces a portion of the first probe pad above the first surface, and performing a chemical mechanical polish on the first probe pad to planarize the portion of the first probe pad above the first surface. The method also includes forming a second level of active circuitry overlying the first probe pad, forming a second probe pad electrically connected to the second level of active circuitry, contacting the second probe pad with a probe tip that displaces a portion of the probe pad, and chemically mechanically polishing the second probe pad to remove the portion displaced.

Abstract: A photodetector includes a photodiode and output circuitry coupled to the photodiode. The photodetector is configurable for operation in at least two modes. A first configurable mode operates the photodetector as an integrating sensor. In this first mode, a bias voltage across the photodiode is set below the breakdown voltage of the photodiode and the output circuitry is configured to read an analog integration output voltage from the photodiode. A second configurable mode operates the photodetector as a single photon avalanche detector. In this second mode, the bias voltage across the photodiode is set above the breakdown voltage of the photodiode and the output circuitry is configured to read an avalanche output voltage.

Abstract: A gate of a transistor in an integrated circuit is protected against the production of an interconnection terminal for a source/drain region. The transistor includes a substrate, at least one active zone formed in the substrate, at least one insulating zone formed in the substrate and a gate, the gate being formed above an active zone. A dielectric layer is formed on the transistor, the dielectric layer covering the gate. The dielectric layer is then etched while leaving it remaining at least on the gate so that the gate is electrically insulated from other elements formed above the dielectric layer. This etching is preferably carried out using a mask which was used for fabricating the gate and a mask which was used for fabricating the insulating zone.

Abstract: A protocol for inter-cell communication in a cognitive radio wireless access network using beacon period framing is disclosed. By establishing scheduled use of beacon periods within each frame of a super-frame among a plurality of participating cells in a wireless access network, efficient and reliable communication can take place eliminating beacon packet collisions and bandwidth wastage. Within each super-frame exits 16 data frames of fixed size which can each include both a data transmission portion and a beacon period. A protocol is established by which announcement, reserved, and free-to-use beacon periods are established within the super-frames associated with a particular spectrum. By coordinating communication between cells on the beacon period, collision between cells by simultaneous attempts to transmit or bandwidth wastage of periods in which no transmission takes place can be avoided.

Abstract: A method for forming gate, source, and drain contacts on a MOS transistor having an insulated gate including polysilicon covered with a metal gate silicide, this gate being surrounded with at least one spacer made of a first insulating material, the method including the steps of a) covering the structure with a second insulating material and leveling the second insulating material to reach the gate silicide; b) oxidizing the gate so that the gate silicide buries and covers the a silicon oxide; c) selectively removing the second insulating material; and d) covering the structure with a first conductive material and leveling the first conductive material all the way to a lower level at the top of the spacer.

Abstract: Embodiments of the present disclosure are related to manufacturing system-in-packages at wafer-level. In particular, various embodiments are directed to adhering a first wafer to a second wafer and adhering solder balls to contact pads of the first wafer. In one embodiment, a first wafer having first and second surfaces is provided. The first wafer includes bond pads located on the first surface that are coupled to a respective semiconductor device located in the first wafer. A second wafer having an electrical component located therein is provided. A conductive adhesive is provided on at least one of the first wafer and the second wafer. Conductive balls are provided on the bond pads on the first surface of the first wafer. The conductive balls and the conductive adhesive are heated to cause the conductive balls to adhere to the bond pad and the conductive adhesive to adhere the first wafer to the second wafer.

Abstract: A microelectromechanical gyroscope includes a body and a sensing mass, which is movable with a degree of freedom in response to rotations of the body about an axis. A self-test actuator is capacitively coupled to the sensing mass for supplying a self-test signal. The capacitive coupling causes, in response to the self-test signal, electrostatic forces that are able to move the sensing mass in accordance with the degree of freedom at an actuation frequency. A sensing device detects transduction signals indicating displacements of the sensing mass in accordance with the degree of freedom. The sensing device is configured for discriminating, in the transduction signals, spectral components that are correlated to the actuation frequency and indicate the movement of the sensing mass as a result of the self-test signal.

Abstract: A MEMS detection structure is provided with: a substrate having a top surface, on which a first fixed-electrode arrangement is set; a sensing mass, extending in a plane and suspended above the substrate and above the first fixed-electrode arrangement at a separation distance; and connection elastic elements that support the sensing mass so that it is free to rotate out of the plane about an axis of rotation, modifying the separation distance, as a function of a quantity to be detected along an axis orthogonal to the plane. The MEMS detection structure also includes: a coupling mass, suspended above the substrate and connected to the sensing mass via the connection elastic elements; and an anchoring arrangement, which anchors the coupling mass to the substrate with a first point of constraint, set at a distance from the axis of rotation and in a position corresponding to the first fixed-electrode arrangement.