Patents Assigned to STMicroelectronics
  • Publication number: 20140097481
    Abstract: The present disclosure relates to a method for manufacturing a non-volatile memory on a semiconductive substrate, comprising the steps of implanting in the depth of the substrate a first doped region forming a source region of selection transistors, forming in the substrate a buried gate comprising deep parts extending between an upper face of the substrate and the first doped region, implanting between two adjacent deep parts of the buried gate, a second doped region forming a common drain region of common selection transistors of a pair of memory cells, the selection transistors of the pair of memory cells thus having channel regions extending between the first doped region and the second doped region, along faces opposite the two buried gate adjacent deep parts, and implanting along opposite upper edges of the buried gate, third doped regions forming source regions of charge accumulation transistors.
    Type: Application
    Filed: October 1, 2013
    Publication date: April 10, 2014
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Francesco La Rosa, Stephan Niel, Arnaud Regnier, Yoann Goasduff
  • Publication number: 20140100778
    Abstract: A first position of a satellite is calculated at a first time in dependence on received orbit data corresponding to an orbit path of the satellite. An orbit path of the satellite is modeled from the first position at the first time to a second time to determine a second position of the satellite at the second time. A third position of the satellite is then calculated at the second time in dependence on the received orbit data. The second position and third position are compared to determine a validity of the orbit data.
    Type: Application
    Filed: December 13, 2013
    Publication date: April 10, 2014
    Applicant: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventor: Peter Bagnall
  • Publication number: 20140096606
    Abstract: A semiconductor detector of gravitational waves of a first frequency may include an oscillator having a metal coated oscillating member over a metal coated semiconductor substrate to be subjected to a Casimir attraction force towards the semiconductor substrate. The oscillator may be configured to exert a force to counterbalance the Casimir attraction force causing the oscillating member oscillates with a main harmonic resonance frequency equal to the first frequency. A displacement sensor may be coupled to the substrate and oscillating member and configured to sense oscillations and to generate corresponding sense signals. A pass-band filter may be tuned to the main harmonic resonance frequency and configured to generate band-pass replica signals of the sense signals, and an airtight package may be configured to keep a vacuum between the oscillating member and the semiconductor substrate. An array of semiconductor detectors and a method of detecting gravitational waves are also disclosed.
    Type: Application
    Filed: September 30, 2013
    Publication date: April 10, 2014
    Applicant: STMicroelectronics S.r.l.
    Inventors: Davide Giuseppe Patti, Alessandro Mascali, Alfio Russo
  • Publication number: 20140098032
    Abstract: A method comprises during a frame period finding a first EFT noise influenced sensor of a touch screen panel, determining whether the first EFT noise influenced sensor is located at a last transmitting/driving line of the touch screen panel, designating the frame period as a noise influenced frame period using an absolute value threshold if the first EFT noise influenced sensor is not located at the last transmitting/driving line and designating the frame period as the noise influenced frame period using a percentage threshold if the first EFT noise influenced sensor is located at the last transmitting/driving line.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicant: STMICROELECTRONICS ASIA PACIFIC PTE LTD (SINGAPORE)
    Inventors: HonSiong Ng, Praveesh Chandran, Mythreyi Nagarajan, Ravi Bhatia
  • Publication number: 20140099763
    Abstract: Embodiment of the present invention provides a method of forming a semiconductor device. The method includes providing a semiconductor substrate; epitaxially growing a silicon-carbon layer on top of the semiconductor substrate; amorphizing the silicon-carbon layer; covering the amorphized silicon-carbon layer with a stress liner; and subjecting the amorphized silicon-carbon layer to a solid phase epitaxy (SPE) process to form a highly substitutional silicon-carbon film. In one embodiment, the highly substitutional silicon-carbon film is formed to be embedded stressors in the source/drain regions of an nFET transistor, and provides tensile stress to a channel region of the nFET transistor for performance enhancement.
    Type: Application
    Filed: October 8, 2012
    Publication date: April 10, 2014
    Applicants: STMICROELECTRONICS, INC., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: EMRE ALPTEKIN, ABHISHEK DUBE, HENRY K. UTOMO, REINALDO A. VEGA, BEI LIU
  • Publication number: 20140098617
    Abstract: A package includes a first die and a second die. An interface connects the first die and the second die. At least one of the first and second dies includes a memory. The interface is configured to transport both control signals and memory transactions. A multiplexing circuit multiplexes the control signals and the memory transactions onto the interface such that connections of the interface are shared by the control signals and the memory transactions.
    Type: Application
    Filed: December 10, 2013
    Publication date: April 10, 2014
    Applicants: STMicroelectronics S.r.l., STMicroelectronics (Research & Development) Limited
    Inventors: Andrew Michael Jones, Stuart Ryan, Alberto Scandurra
  • Publication number: 20140099769
    Abstract: Isolation trenches are etched through an active silicon layer overlying a buried oxide on a substrate into the substrate, and through any pad dielectric(s) on the active silicon layer. Lateral epitaxial growth of the active silicon layer forms protrusions into the isolation trenches to a lateral distance of at least about 5 nanometers, and portions of the isolation trenches around the protrusions are filled with dielectric. Raised source/drain regions are formed on portions of the active silicon layer including a dielectric. As a result, misaligned contacts passing around edges of the raised source/drain regions remain spaced apart from sidewalls of the substrate in the isolation trenches.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicants: INTERNATIONAL BUSINESS MACHINES CORP., STMICROELECTRONICS, INC.
    Inventors: Nicolas Loubet, Qing Liu, Shom Ponoth
  • Patent number: 8694710
    Abstract: A method of conversion by at least one interface circuit connected between a first bus including at least one data wire and one clock wire, and at least one second single-wire bus, of a transmission between a master circuit connected to the first bus and at least one slave circuit connected to the second bus, wherein a speculative read command is sent to the slave circuit before interpreting the state of a bit for controlling a reading or a writing, originating from the master circuit.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Gilles Bas, Hervé Chalopin, François Tailliet
  • Patent number: 8694716
    Abstract: A method for writing and reading data in a main nonvolatile memory having target pages in which data are to be written and read, the method including providing a nonvolatile buffer having an erased area, providing a volatile cache memory, and receiving a write command to update a target page with updating data the length of which can be lower than the length of a page. The method also includes, in response to the write command, writing the updating data into the erased area of the nonvolatile buffer, together with management data of a first type, and recording an updated version of the target page in the cache memory or updating in the cache memory a previously updated version of the target page.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: April 8, 2014
    Assignees: STMicroelectronics International N.V., STMicroelectronics Design and Application GmbH
    Inventors: Marco Bildgen, Juergen Boehler
  • Patent number: 8692247
    Abstract: An integrated circuit comprising a mechanical device for electrical switching comprising a first assembly being thermally deformable and having a beam held at at least two different locations by at least two arms, the beam and the arms being metal and disposed within the same metallization level, and further comprising at least one electrically conducting body. The first assembly has a first configuration at a first temperature and a second configuration at a second temperature different from the first temperature. The beam is out of contact with the electrically conducting body in one configuration in contact with the body in the other configuration. The beam establishes or breaks an electrical link passing through the said at least one electrically conducting body and through the said beam in the different configurations.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Pascal Fornara, Christian Rivero, Antonio di-Giacomo
  • Patent number: 8693074
    Abstract: An apparatus is formed from a double active layer silicon on insulator (DSOI) substrate that includes first and second active layers separated by an insulating layer. An electrostatic comb drive is formed from the substrate to include a first comb formed from the first active layer and a second comb formed from the second active layer. The comb drive may be used to impart a tilting motion to a micro-mirror. The method of manufacturing provides comb teeth exhibiting an aspect ratio greater than 1:20, with an offset distance between comb teeth of the first and second combs that is less than about 6 ?m.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics International N.V.
    Inventors: Moshe Medina, Pinchas Chaviv, Yaron Fein
  • Patent number: 8693256
    Abstract: A non-volatile memory device integrated in a chip of semiconductor material. An embodiment of a memory device includes a plurality of memory cells. Each memory cell includes a first well and a second well of a first type of conductivity that are formed in an insulating region of a second type of conductivity. The memory cell further includes a first, a second, and a third region of the second type of conductivity that are formed in the first well; these regions define a selection transistor of MOS type and a storage transistor of floating gate MOS type that are coupled in series. Moreover, the memory device includes a selection gate of the selection transistor, a floating gate of the storage transistor, and a control gate of the storage transistor formed in the second well; the control gate is capacitively coupled with the floating gate.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Pasotti, Davide Lena, Fabio De Santis
  • Patent number: 8693956
    Abstract: A method for evaluating the current coupling factor between an electromagnetic transponder and a terminal, wherein a ratio between data, representative of a voltage across an oscillating circuit of the transponder and obtained for two values of the resistive load, is compared with one or several thresholds.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Luc Wuidart
  • Patent number: 8692612
    Abstract: The present disclosure relates to an electronic regulation device of a variable capacitance of an integrated circuit having a time parameter depending on the variable capacitance. The regulation device includes a regulation loop, and is configured to generate in output a plurality of binary regulation signals.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Pierangelo Confalonieri, Federico Guanziroli, Germano Nicollini
  • Patent number: 8692761
    Abstract: An apparatus for displaying images. The apparatus comprises: an LCD panel comprising a plurality of pixels for displaying the images; and a backlight comprising a plurality of light sources. Each of the plurality of light sources is associated with one of a plurality of zones and each of the plurality of zones comprises a plurality of grid points. A controller coupled to the LCD panel and the backlight is configured to retrieve contour data associated with each of the plurality of light sources. The contour data is associated with a 3-D contour shape comprising a plurality of facets, each facet associated with at least one of the plurality of grids. The controller is configured to determine a brightness level of at least one pixel in a first grid based on a slope value associated with a first facet associated with the first grid.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics, Inc.
    Inventor: Greg Neal
  • Patent number: 8693165
    Abstract: A device for generating electrical energy from the heat dissipated by a heat source, comprising: a capacitor comprising two electrodes between which a ferroelectric material is present, said capacitor being arranged so as to be positioned to capture all or part of the heat dissipated by said heat source; a capacitive element a first electrode of which is connected to a first electrode of said capacitor; a recovery circuit interposed between the second electrode of said capacitor and the second electrode of the capacitive element, and able to have the current flowing between said second electrodes pass through it. a mechanism adapted to move the capacitor with respect to the heat source, said mechanism having at least one arm able to move between two positions, the capacitor being closer to the heat source in one of the two positions.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Thomas Skotnicki, Stéphane Monfray
  • Patent number: 8693562
    Abstract: A process receives a composite signal transmitted via a nonlinear data transmission channel, with the composite signal having a first signal UL and a second signal LL. The process includes the following: demodulating and decoding the first signal UL by using a first demodulation and decoding chain in order to regenerate first information of the first signal UL; recoding and shaping to produce a continuous time waveform; applying a nonlinearity function based on a set of coefficients updated according to an adaptive correlation calculation process to the continuous time waveform; subtracting the result of the nonlinearity function from the composite signal in order to generate a result E; and demodulating and decoding the result E by using a second demodulation and decoding chain in order to regenerate second information of the second signal LL.
    Type: Grant
    Filed: May 13, 2004
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics S.A.
    Inventor: Jacques Meyer
  • Patent number: 8694599
    Abstract: Information codes are arranged in pieces comprised of chunks of bytes over a network, such as a Peer-to-Peer overlay network, including a set of peer terminals. A first peer identifies missing chunks in the received pieces and requests such missing chunks from other peers. The chunks are subjected to a fountain code encoding wherein the chunks in a piece are X-ORed. The first peer is therefore capable of reconstructing a received piece encoded with fountain codes from a combination of linearly independent chunks corresponding to the piece. The chunks are transmitted over the network with a connection-less protocol, without retransmission of lost packets, preferably with a UDP protocol.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics S.R.L.
    Inventors: Alexandro Sentinelli, Andrea Lorenzo Vitali, Alessandro Cattaneo
  • Patent number: 8694877
    Abstract: A modified soft output Viterbi algorithm (SOVA) detector receives a sequence of soft information values and determines a best path and an alternate path for each soft information value and further determines, when the best and alternate paths lead to the same value for a given soft information value, whether there is a third path departing from the alternate path that leads to an opposite decision with respect to the best path for a given soft information value. The SOVA detector then considers this third path when updating the reliability of the best path. The modified SOVA detector achieves max-log-map equivalence effectively through the Fossorier approach and includes modified reliability metric units for the first N stages of the SOVA detector, where N is the memory depth of a given path, and includes conventional reliability metric units for the remaining stages of the detector.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics, Inc.
    Inventors: Sivagnanam Parthasarathy, Lun Bin Huang, Alessandro Risso
  • Patent number: 8691684
    Abstract: A power transistor for use in an audio application is laid out to minimize hot spots. Hot spots are created by non-uniform power dissipation or overly concentrated current densities. The source and drain pads are disposed relative to each other to facilitate uniform power dissipation. Interleaving metal fingers and upper metal layers are connected directly to lower metal layers in the absence of vias to improve current density distribution. This layout improves some fail detection tests by 17%.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd.
    Inventors: Guo Hua Zhong, Mei Yang