Abstract: A multi-fin FINFET device may include a substrate and a plurality of semiconductor fins extending upwardly from the substrate and being spaced apart along the substrate. Each semiconductor fin may have opposing first and second ends and a medial portion therebetween, and outermost fins of the plurality of semiconductor fins may comprise an epitaxial growth barrier on outside surfaces thereof. The FINFET may further include at least one gate overlying the medial portions of the semiconductor fins, a plurality of raised epitaxial semiconductor source regions between the semiconductor fins adjacent the first ends thereof, and a plurality of raised epitaxial semiconductor drain regions between the semiconductor fins adjacent the second ends thereof.

Abstract: A circuit includes a current source intended to be series-connected with a load between two terminals of application of a first D.C. voltage. An element limits the voltage across the load and a circuit controls the value of the current in the current source with the current flowing in the element.

Abstract: Systems and methods for generating a CDMA signal s(t) comprising N components involves assigning to each of the N components one unique spreading sequence an selected from a set of M spreading sequences with M?N, modulating the symbols dn of each component on the assigned unique spreading sequence an, and combining the N symbols dn each being spread with its own unique spreading sequence an to a CDMA signal s(t). The assigned spreading sequences an are selected such that all selected pairs within the set of N spreading sequences are orthogonal or very close to be orthogonal so that cross-correlation components between all spreading sequences an are close to zero or zero.

Abstract: An image processing arrangement includes an input to receive an indicator of a power characteristic related to an image processing arrangement and an image processor to process an image based on the indicator of the power characteristic.

Abstract: A method of analog to digital voltage conversion including: generating a quadratic signal based on an analog time varying reference signal; generating a ramp signal based on the quadratic signal; and converting an analog input voltage to a digital output value based on a time duration determined by a comparison of the analog input voltage with the ramp signal.

Abstract: A system for edge enhancement includes an input unit to receive an input signal Yin, a vertical enhancement unit to perform a vertical enhancement of an edge of the input signal Yin to generate an output YEV, and a horizontal enhancement unit to perform a horizontal enhancement of the edge of the input signal Yin to generate an output YEH. The system also includes a local gradient analysis unit to generate a local gradient direction GradDir and a local gradient magnitude GradMag based at least partly upon the input signal Yin, and a mixer to generate an output Yout by mixing the output YEV with the output YEH using the local gradient direction GradDir. The system further includes an output unit to output the output Yout.

Abstract: The present disclosure is directed to an integrated circuit having a substrate and a first and a second interconnect structure over the substrate. Each interconnect structure has a first conductive layer over the substrate and a second conductive layer over the first conductive layer. The integrated circuit also includes a thin film resistor over a portion of the substrate between the first and the second interconnect structure that electrically connects the first conductive layers of the first and second interconnect structures.

Abstract: An electromagnetic transponder includes an antenna circuit capable of providing signals to a charge pump. The pump includes a first transistor connected to a first capacitor. The transponder also includes means for applying a voltage alternating between first and second values between the gate and the conduction terminal on the side of the first capacitor of the first transistor.

Abstract: An electronic circuit is disclosed for driving a switching amplifier. The electronic circuit is configured for generating, when operating in a switch-on mode, a driving signal for driving the switching amplifier. The driving signal carries a plurality of pulses having: an pulse width increasing between contiguous pulses of the plurality of pulses according to a step value having modulus equal to two and odd values; a polarity alternating between the contiguous pulses.

Abstract: A strain enhanced transistor is provided having a strain inducing layer overlying a gate electrode. The gate electrode has sloped sidewalls over the channel region of the transistor.

Abstract: The present disclosure relates to a method of controlling the manufacturing of integrated circuits, comprising steps of determining parameters that are characteristic of a curve of radiation intensity applied to a semiconductor wafer through a mask, in critical zones of structures to be formed on the wafer, for each of the critical zones, placing a measuring point in a multidimensional space each dimension of which corresponds to one of the characteristic parameters, placing control points in the multidimensional space that are spread around an area delimited by the measuring points, so as to delimit an envelope surrounding the area, for each control point, defining control structures each corresponding to a control point, generating a mask containing the control structures, applying a process involving the generated mask to a semiconductor wafer, and analyzing the control structures transferred to the wafer to detect any defects therein.

Abstract: A management apparatus is described of a rotating motor and a load during power loss; the apparatus comprises a first switching circuit coupled with the rotating motor and a controller of said first switching circuit. The controller is configured to drive the first switching circuit so as to convert a back-electromotive force voltage developed in the rotating motor into a power supply voltage for the load. The first switching circuit is driven in accordance with a first duty cycle. The apparatus comprises a second switching circuit coupled with the load and driven in accordance with a second duty cycle. The controller is configured to vary said first and said second duty cycles to keep the power supply voltage for the load above or equal to a threshold voltage.

Abstract: An image sensor including a plurality of pixels each including a charge collection region including an N-type region bounded by P-type regions and having an overlying P-type layer; and an insulated gate electrode positioned over the P-type layer and arranged to receive a gate voltage for conveying charges stored in the charge collection region through the P-type layer.

Abstract: An interconnect arrangement includes a plurality of tag allocators. Each tag allocator is configured to receive at least one stream of a plurality of packet units and further configured to tag each packet unit. Each packet unit is tagged with one of a set of n tags where n is greater than two. At least one stream is tagged with a sequence of tags that is different from a sequence of tags used for at least one other of said streams. The interconnect arrangement also includes a router configured to receive a plurality of streams of tagged packet units and to arbitrate between the streams such that packet units having a same tag are output in a group.

Abstract: According to one embodiment of the present disclosure, a touch controller includes a touch frame processing component adapted to receive sensor signals containing information about a touch point on a touch screen. The touch frame processing component processes the sensor signals to generate touch information associated with each touch point. A touch coordinate processing component is coupled to receive touch information from the touch frame processing component and includes virtual area parameters that define a plurality of virtual areas on the touch screen. The touch coordinate processing component is operable to identify which one of the plurality of virtual areas contains the current touch point and to report or filter the current touch point as a function of the identified virtual area.

Abstract: A multimedia sink device comprises: 1) a connector configured to be connected to an adaptor cable; 2) detection circuitry configured to detect when the adaptor cable is connected to the connector; and 3) hot plug detection (HPD) circuitry configured to determine if a configuration circuit is coupled to an HPD line of the multimedia sink device. In response to a determination that the configuration circuit is coupled to the HPD line, the HPD circuitry determines if the configuration circuit is associated with the adaptor cable. The HPD circuitry reads configuration data from the configuration circuit associated with the adaptor cable. The configuration data indicates the configuration circuit is resident in the cable adaptor and causes the multimedia sink device to increase a voltage level of a power supply voltage provided by the multimedia sink device to a multimedia source device via the adaptor cable.

Abstract: A touch controller processes a captured data frame and detects the presence of touch points in the data frame. The data frame includes a plurality of digital capacitance values organized as groups of sense line data and the touch controller determines for each digital capacitance value in a group of sense line data the difference between the digital capacitance value and an associated no-touch threshold to generate a baseline delta value for each digital capacitance value in the group. The touch controller selects the minimum baseline delta and adjusts each digital capacitance value in the group by the minimum baseline delta to generate adjusted sense line data. The touch control generates adjusted sense line data for each group of sense line data in the data frame and thereafter processes the groups of adjusted sense line data to detect the presence of touch points in the data frame.

Abstract: The present disclosure is directed to a system and method for forming a plurality of packaged dice on a carrier, the carrier including a storage medium configured to store an indication of a total number of unpackaged dice on the carrier. The forming includes providing a quantity of molding compound to a molding module based on the total number of the unpackaged dice on the carrier. The providing includes accessing the indication of the total number of the unpackaged dice on the carrier from the storage medium, determining the quantity of molding compound based on the indication of the total number of unpackaged dice on the carrier, and molding the unpackaged dice into the packaged dice using the quantity of molding compound.

Abstract: A system for decoding frequency modulated signals includes a glue logic module, a key matrix, and a driver coupled to the key matrix. The glue logic module provides a pre-scaled frequency signal, while the key matrix receives the pre-scaled frequency signal. The driver decodes the pre-scaled frequency signal to generate at least one event update corresponding to a frequency of the pre-scaled frequency signal.

Abstract: The disclosure relates to an integrated circuit electrically powered by a supply voltage and comprising a memory electrically erasable and/or programmable by means of a second voltage greater than the supply voltage. The integrated circuit comprises means for receiving the second voltage by the intermediary of a reception terminal of the supply voltage or by the intermediary of a reception or emission terminal of a data or clock signal. Applicable in particular to electronic tags comprising a reduced number of interconnection terminals.