Abstract: An embodiment of a non-volatile memory device includes: a memory array, having a plurality of non-volatile logic memory cells arranged in at least one logic row, the logic row including a first row and a second row sharing a common control line; and a plurality of bit lines. Each logic memory cell has a direct memory cell, for storing a logic value, and a complementary memory cell, for storing a second logic value, which is complementary to the first logic value in the corresponding direct memory cell. The direct memory cell and the complementary memory cell of each logic memory cell are coupled to respective separate bit lines and are placed one in the first row and the other in the second row of the respective logic row.

Abstract: Adaptive scaling digital techniques attempt to place the system close to the timing failure so as to maximize energy efficiency. Rapid recovery from potential failures is usually by slowing the system clock and/or providing razor solutions (instruction replay.) These techniques compromise the throughput. This application presents a technique to provide local in-situ fault resilience based on dynamic slack borrowing. This technique is non-intrusive (needs no architecture modification) and has minimal impact on throughput.

Abstract: A non-volatile memory device includes a plurality of memory cells, with each memory cell for storing a bit having a first logic value or a second logic value. An input is for receiving a word defined by bits to be stored in the plurality of memory cells. Programming circuitry is for programming a corresponding memory cell for each bit having the first logic value. Forming circuitry is for receiving the word from the input and for providing to the programming circuitry at least one additional word defined by bits to also be stored in the plurality of memory cells. The forming circuitry includes processing circuitry for calculating a current maximum number of simultaneously programmable bits, and logic circuitry for generating the additional word, with the additional word having a number of bits having the first logic value equal to the current maximum number.

Abstract: A digital frequency divider including a parallel output register, a presettable asynchronous counter and a decoder. The parallel output register contains a desired count value. The presettable asynchronous counter has its preset data inputs coupled to the output of the parallel output register. The decoder receives its input from the data outputs of the presettable asynchronous divider and its output coupled to the load input of the presettable asynchronous counter.

Abstract: Semiconductor protection devices, and related methods and systems, especially devices for providing series current limiting. The device typically comprises two regenerative building blocks and/or MOSFETs connected back-to-back in series, where one of the MOSFETs/Regenerative Building Blocks has an extra voltage probe electrode that provides a regenerative signal with self-limited voltage to the other via coupling to its gate electrode.

Abstract: An ultra-thin Quad Flat No-Lead (QFN) semiconductor chip package having a leadframe with lead terminals formed by recesses from both the top and bottom surfaces and substantially aligned contact areas formed on either the top or bottom surfaces. A die is electrically connected to the plurality of lead terminals and a molding compound encapsulates the leadframe and die together so as to form the ultra-thin QFN package. Accordingly, the substantially aligned contact areas are exposed on both the top and bottom surfaces of the package. The present disclosure also provides an ultra-thin Optical Quad Flat No-Lead (OQFN) semiconductor chip package, a stacked semiconductor module comprising at least two QFN semiconductor chip packages, and a method for manufacturing an ultra-thin Quad Flat No-Lead (QFN) semiconductor packages.

Abstract: An integrated circuit integrated on a semiconductor material die and adapted to be at least partly tested wirelessly, wherein circuitry for setting a selected radio communication frequencies to be used for the wireless test of the integrated circuit are integrated on the semiconductor material die.

Abstract: A charge transfer device formed in a semiconductor substrate and including an array of electrodes distributed in rows and columns, wherein: each electrode is formed in a cavity with insulated walls formed of a groove which generally extends in the row direction, having a first end closer to an upper row and a second end closer to a lower row; and the electrodes of two adjacent rows are symmetrical with respect to a plane orthogonal to the sensor and comprising the direction of a row.

Abstract: An integrated circuit is formed having an array of memory cells located in the dielectric stack above a semiconductor substrate. Each memory cell has two adjustable resistors and two heating elements. A dielectric material separates the heating elements from the adjustable resistors. One heating element alters the resistance of one of the resistors by applying heat thereto to write data to the memory cell. The other heating element alters the resistance of the other resistor by applying heat thereto to erase data from the memory cell.

Abstract: The present disclosure is directed to a camera module that includes at least a semiconducting die, an image-sensing circuit, a lens, a lens aperture, and a coating that adheres to an exterior surface of the camera module. The coating is opaque to light and prevents light from accessing the camera other than through the lens aperture. The opaque coating is applied as a fluid and is cured. In one embodiment, a mask material is selectively applied to exterior surfaces of the semiconducting die, electrical interconnect layers, glass layers, the lens body, or the lens aperture. After applying the opaque coating, the selectively applied mask material is removed. Methods of selectively applying a mask material include applying a conformable and peelably releasable dope-like material, placing an array of joined, selectively shaped rigid masks over an array of assemblies, and applying a conformable mask material that is heat-expandable.

Abstract: A method for manufacturing an integrated circuit includes forming in a substrate a measuring circuit sensitive to mechanical stresses and configured to supply a measurement signal representative of mechanical stresses exerted on the measuring circuit. The measuring circuit is positioned such that the measurement signal is also representative of mechanical stresses exerted on a functional circuit of the integrated circuit. A method of using the integrated circuit includes determining from the measurement signal the value of a parameter of the functional circuit predicted to mitigate an impact of the variation in mechanical stresses on the operation of the functional circuit, and supplying the functional circuit with the determined value of the parameter.

Abstract: A IEEE 802.11 Wireless Local Area Network (WLAN) system of an access point (AP) and one or more stations (STAB) reduces power consumption and increases battery life of power efficient low power STAB by decreasing the amount of time that a power efficient low power STA remains in an awake state. After indicating power efficient low power operation during association with an AP supporting such operation, the power efficient low power STA may enter the doze state from the time that the power efficient low power STA sends a PS-Poll until the power efficient low power STA receives the buffered DATA frame from the AP. While implementing the power efficient PS-Poll method, the AP can send the buffered DATA frame to the STA SIFS after the AP sends an ACK to the received PS-Poll from the STA.

Abstract: A device is provided that includes a first die having a first alignment structure that includes a plurality of first transmission columns arranged in a pattern and a second die positioned on the first die, the second die having a second alignment structure that includes a plurality of second transmission columns arranged in the same pattern as the first transmission columns. The first and second transmission columns are each coplanar with a first surface and a second surface of the first and second die, respectively.

Abstract: In an embodiment, a first individual image and a second individual image constituting an encoded stereoscopic image, for example in JPEG format with respective levels of encoding quality and united in a multiple-image file, for example of the Multiple-Picture Object (MPO) type. The second level of encoding quality is lower than the first level of encoding quality. During decoding, the first individual image encoded with a first level of encoding quality and the second individual image encoded with a second level of encoding quality lower than the first level of encoding quality are extracted from the multiple-image file, then using information of the first extracted individual image for enhancing the second extracted individual image.

Abstract: An embodiment of a MOS transistor includes a layer of semiconductor material, drain regions having a first conductivity type alternately formed in the layer with body regions having a second conductivity type, a first insulating layer disposed over the surface of the layer of semiconductor material, at least one gate-precursor region of conductive material disposed over the first insulating layer, a second insulating layer disposed over the first insulating layer and the gate-precursor region, a third insulating layer disposed over the second insulating layer, at least one source opening formed by removing overlapping portions of the second insulating layer, the third insulating layer, the gate-precursor region, and by at least partially removing a corresponding portion of the first insulating layer. The embodiment may also include at least one source-precursor region extending into the layer of semiconductor material from a surface portion below the at least one source opening.

Abstract: A semiconductive device is fabricated by forming, within a semiconductive substrate, at least one continuous region formed of a material having a non-uniform composition in a direction substantially perpendicular to the thickness of the substrate.

Abstract: A module operates in a proximity detection mode and a gesture detection mode. The module includes an illumination source, radiation sensors and a controller. When in proximity detection mode, the illumination source emits radiation, the radiation sensors measure the radiation level, and the controller adjusts the measured radiation level to substantially cancel the contribution attributable to ambient radiation to determine the presence of a proximate object by. When in the gesture recognition mode, the level of radiation incident on the sensors is individually sampled, and the controller determines object movement by comparing the changes in the measured radiation levels over a plurality of the samples. Ambient radiation contribution is not removed from the sampled radiation levels during the gesture recognition mode.

Abstract: An optical navigation device is provided for detecting movement of a pointer, such as a finger, in three dimensions. A sensor obtains images of the pointer which have been illuminated by an illumination source, and an image scaling module determines the difference in size between images acquired by the image sensor to determine the difference in height of the pointer between images.

Abstract: A passive cable adaptor for connecting a data source device with a display device is described. The adaptor has a packet-based interface connector at one end, the connector having a positive main link pin, a negative main link pin, a positive auxiliary channel pin, and a negative auxiliary channel pin. At the other end is a micro serial interface connector, wherein multimedia content is transmitted over the cable adaptor and electrical power is supplied over the cable adaptor simultaneously. The cable adaptor has an auxiliary and hot plug detect (HPD) controller utilized to map the auxiliary channel and HPD signals of the packet-based digital display to the micro serial interface ID signal.

Abstract: The electric behavior of a reverse-biased PN junction diode is modeled by measuring the value of voltage V present across the diode and the value of the corresponding current I running through this diode, the voltage V varying within a range of values including the value of diode breakdown voltage. A representation of a function ln ? ( I - I s ) according to voltage V is established from the measured values of current I and of voltage V, IS being the saturation current of the diode. A linear function representative of a substantially linear portion of the function, characterized by voltages V greater than breakdown voltage VBK in terms of absolute value, is determined. An avalanche multiplication factor MM is then calculated by MM = 1 + ? ( - slbv · V + bv bv ) , with parameter slbv equal to the ordinate at the origin of the linear function, and parameter slbv/bv equal to the slope of the linear function.