Abstract: A boost circuit is used for power factor correction (PFC). In a low power application, transition mode control is utilized. However, switching frequency varies with different input voltages, and over a wide input voltage range, the switching frequency can become too high to be practical. To address this issue, a boost circuit is provided whose effective inductance changes as a function of input voltage. By changing the inductance, control is exercised over switching frequency.
Abstract: The device for generating a reference current proportional to absolute temperature comprises processing means connected to the terminals of a core and designed to equalize the voltages across the terminals of the core, the core being designed to then be traversed by an internal current proportional to absolute temperature, and an output module designed to deliver to an output terminal the said reference current on the basis of the said internal current; the processing means comprise a self-biased amplifier possessing at least one first stage arranged according to a folded setup and comprising first PMOS transistors arranged in a setup of the common-gate type, and a feedback stage whose input is connected to the output of the amplifier and whose output is connected to the input of the first stage as well as to at least one terminal of the core.
Abstract: A system for decoding frequency modulated signals includes a glue logic module, a key matrix, and a driver coupled to the key matrix. The glue logic module provides a pre-scaled frequency signal, while the key matrix receives the pre-scaled frequency signal. The driver decodes the pre-scaled frequency signal to generate at least one event update corresponding to a frequency of the pre-scaled frequency signal.
Abstract: A chemical sensor is provided on a first semiconductor die. A potentiostat is provided on a second semiconductor die. An analog to digital converter and a microcontroller are provided on a third semiconductor die. The first die is configured to be connected to the second die. The second die is configured to be connected to the third die. The chemical sensor detects a chemical in the surrounding environment and outputs a signal to the analog to digital converter. The analog to digital converter converts the signal to a digital signal and outputs the digital signal to the microcontroller. The microcontroller provides a measurement of the concentration of the chemical in the surrounding environment.
Abstract: A capacitive touch sensor includes horizontal lines vertical lines. Switching circuitry is coupled to the horizontal and vertical lines of the capacitive touch sensor. The switching circuitry is operable in a first mode to configure the horizontal lines as receive lines and the vertical lines as transmit lines for making a cross-capacitance measurement. In one implementation, the switching circuit is further operable in a second mode to configure the horizontal lines as transmit lines and the vertical lines as receive lines for making an additional cross-capacitance measurement. In another implementation, the switching circuit is further operable in a second mode to configure the vertical lines for making a self capacitance measurement. The various capacitance measurements from the first and second modes are algorithmically combined to obtain a total capacitance measurement having a reduced noise component.
Abstract: An embodiment of a crystal oscillator circuit includes leakage-current compensation, transconductance enhancement, or both leakage-current compensation and transconductance enhancement. Such an oscillator circuit may draw a reduced operating current relative to a conventional oscillator circuit, and thus may be suitable for battery or other low-power applications.
Abstract: A method for creating a photolithography mask from a set of initial mask cells arranged to form an initial mask. The set includes first and second initial mask cells having a mask element in common within an initial region of the initial mask. The method includes a creation of a first modified mask cell and of a second modified mask cell including OPC processing operations, a comparison of the position of the mask element in common between the first modified mask cell and the second modified mask cell, and if the result of the comparison is greater than a threshold, a creation of a new mask region including an optical proximity correction processing operation on the initial region, and a creation of the photolithography mask from the new mask region.
Abstract: There is disclosed an apparatus for implementing special mode playback operations in a digital video recorder. The apparatus comprises an Intra frame indexing device capable of receiving an incoming MPEG video stream and identifying therein data packets associated with Intra frames, wherein the Intra frame indexing device modifies header information in a first data packet associated with a first Intra frame to include location information identifying a storage address of a second data packet associated with a second Intra frame.
Abstract: The present disclosure provides a system and method for relieving stress and providing improved heat management in a 3D chip stack of a multichip package. A stress relief apparatus is provided to allow the chip stack to adjust in response to pressure, thereby relieving stress applied to the chip stack. Additionally, improved heat management is provided such that the chip stack adjusts in response to thermal energy generated within the chip stack to remove heat from between chips of the stack, thereby allowing the chips to operate as desired without compromising the performance of the chip stack.
Abstract: An optical element or module is designed to be placed in front of an optical sensor of a semiconductor component. At least one optically useful part of the element or module is provided through which the image to be captured is designed to pass. A method for obtaining such an optical element or module includes forming at least one through passage between a front and rear faces of the element or module. The front and rear faces are covered with a mask. Ion doping is introduced through the passage. As a result, the element or module has a refractive index that varies starting from a wall of the through passage and into the optically useful part. An image capture apparatus includes an optical imaging module having at least one such element or module.
Abstract: An SRAM having two capacitors connected in series between respective bit storage nodes of each memory cell. The two inverters of the memory cell are powered by a positive voltage and a low voltage. The two capacitors are connected to each other at a common node. A leakage current generator is coupled to the common node. The leakage current generator supplies to the common node a leakage current to maintain a voltage which is approximately halfway between the voltages of the high and low SRAM supplies.
Type:
Grant
Filed:
March 8, 2013
Date of Patent:
February 18, 2014
Assignees:
STMicroelectronics, Inc., STMicroelectronics S/A, Medtronics, Inc.
Inventors:
Kevin K. Walsh, Paul F. Gerrish, Larry E. Tyler, Mark A. Lysinger, David C. McClure, François Jacquet
Abstract: An organic thin film transistor includes a dielectric layer and an active layer overlapping the dielectric layer, a source contact and a drain contact arranged on a surface of the active layer opposite the dielectric layer and mutually separated by an intermediate region, the source contact and drain contact having first and second inner walls, respectively, facing the intermediate region, and a gate contact arranged on a portion of another surface of the dielectric layer opposite the active layer and having first and second side walls aligned with the first and second inner walls, respectively.
Type:
Grant
Filed:
June 4, 2009
Date of Patent:
February 18, 2014
Assignee:
STMicroelectronics S.r.l.
Inventors:
Roberta Cuozzo, Anna Morra, Teresa Napolitano
Abstract: An embodiment of a vertical-conduction integrated electronic device formed in a body of semiconductor material which includes: a substrate made of a first semiconductor material and with a first type of conductivity, the first semiconductor material having a first bandgap; an epitaxial region made of the first semiconductor material and with the first type of conductivity, which overlies the substrate and defines a first surface; and a first epitaxial layer made of a second semiconductor material, which overlies the first surface and is in direct contact with the epitaxial region, the second semiconductor material having a second bandgap narrower than the first bandgap. The body moreover includes a deep region of a second type of conductivity, extending underneath the first surface and within the epitaxial region.
Type:
Grant
Filed:
August 30, 2011
Date of Patent:
February 18, 2014
Assignee:
STMicroelectronics S.r.l.
Inventors:
Ferruccio Frisina, Mario Giuseppe Saggio, Angelo Magri'
Abstract: A package includes a first die and a second die, at least one of said first and second dies being a memory. The dies are connected to each other through an interface. The interface is configured to transport a plurality of control signals. The number of control signals is greater than a width of the interface. At least one of the first and second dies performs a configurable grouping so as to provide a plurality of groups of control signals. The signals within a group are transmitted across the interface together.
Abstract: An analog to digital conversion includes a multiplexor circuit for receiving analog input signals and, responsive to a select input, an analog to digital converter circuit to convert a selected analog signal into a digital signal, a conversion starting device to send a conversion start signal on the basis of a trigger event, the conversion starting device being responsive to a select input, a sequencer to control the analog to digital converter circuitry to execute one sequence conversion on the basis of one conversion sequence instruction, and a FIFO register block to receive conversion sequence instructions and being able to queue each new received conversion sequence instruction if an actual conversion sequence is in progress and to control the sequencer to execute a new sequence conversion instruction after the conversion sequence is executed.
Abstract: There is provided a circuit and method for detecting a bad clock condition on a clock signal that includes sampling the value of the clock signal at a first plurality of time delays following a rising edge on the clock signal. This method also includes sampling the value of the clock signal at a second plurality of time delays following a falling edge on the clock signal.
Abstract: An embodiment of a manager includes at least one input node configured to receive information regarding a region of an integrated circuit, and a determiner configured to determine, in response to the information, a likelihood that the region will cause an error. For example, the region may include a memory, and contents of the memory may be transferred to another, more reliable memory, if the likelihood that the memory will cause an error in the data that it stores equals or exceeds a likelihood threshold.
Type:
Application
Filed:
August 12, 2013
Publication date:
February 13, 2014
Applicant:
STMicroelectronics International N.V.
Inventors:
Deepak BARANWAL, Digvijay Pratap SINGH, Kaushik SAHA
Abstract: A Schottky photodiode may include a monocrystalline semiconductor substrate having a front surface, a rear surface, and a first dopant concentration and configured to define a cathode of the Schottky photodiode, a doped epitaxial layer over the front surface of the monocrystalline semiconductor substrate having a second dopant concentration less than the first dopant concentration, and parallel spaced apart trenches in the doped epitaxial layer and having of a depth less than a depth of the doped epitaxial layer.
Abstract: A transmission channel configured to transmit high-voltage pulses and to receive echoes of the high-voltage pulses includes a high voltage buffer, a voltage clamp and a switch. The voltage clamp may include clamping transistors and switching off transistors coupled together in series with body diodes in anti-series. The transmission channel may include a reset circuit configured to bias the transmission channel between pulses. The switch may include a bootstrap circuit.
Type:
Grant
Filed:
June 29, 2012
Date of Patent:
February 11, 2014
Assignee:
STMicroelectronics S.r.l.
Inventors:
Sandro Rossi, Giulio Ricotti, Davide Ugo Ghisu, Antonio Ricciardo
Abstract: A memory architecture includes a plurality of local input and output circuitries, with each local input and output circuitry associated with at least one memory bank. The memory architecture also includes a global input and output circuitry, which includes a plurality of global sub-write circuitries, is coupled to the plurality of local input and output circuitries One global sub-write circuitry is enabled and provides a write-data to a selected local input and output circuitry.