Abstract: A method of testing error correction/detection logic may involve providing each of a set of n data bit combinations to the error correction/detection logic. Each data bit combination has n bits, and the n data bit combinations may be created by creating an initial data bit combination whose data bits have the same logical value and then shifting a bit having the opposite value across the initial data bit combination. In response to being provided with the n data bit combinations, the error correction/detection logic generates a set of check bits for each of the n data bit combinations. The set of check bits generated by the error correction/detection logic for each of the n data bit combinations may then be verified.

Abstract: A system and method for designing a data center. For each unique piece of equipment (e.g., a specific type/model of computer server, storage array, communication device) that may be installed in a data center, or each unique configuration of a piece of equipment, an equipment unit (EU) is defined to describe the equipment requirements or characteristics regarding power, cooling, size, weight, connectivity and/or other factors. An interchangeable equipment unit (IEU) may be defined to reflect the worst-case requirements of multiple pieces of equipment that may be interchanged or substituted (e.g., two different storage arrays). The total requirements of a desired equipment layout are determined from the EUs, and may be compared to the capacities of the data center space regarding available power, cooling, physical size, weight restrictions, etc. If any requirements exceed a data center capacity, the equipment or layout may be altered or the data center may be restructured.

Abstract: A method is provided, the method comprising defining an actual size of each variable in a programming language at a declaration time when the actual size of the respective variable can be defined and declaring at least one variable in the programming language to have a dynamic size at the declaration time when the actual size of the at least one variable is not known. The method also comprises defining the actual size of the at least one variable in the programming language when the actual size of the at least one variable becomes known after the declaration time.

Abstract: A distributed simulation system includes a plurality of nodes. Each node is configured to simulate a portion of a system under test. The simulation is performed as a series of timesteps. The transition between timesteps is synchronized in the plurality of nodes. In one implementation, the distributed simulation system includes a hub which is configured to synchronize the transition between timesteps in the plurality of nodes. For example, in one embodiment, the hub may receive commands from each of the plurality of nodes. If each command indicates that the corresponding node is capable of completing the timestep, the hub transmits a command to each node indicating that the timestep is complete. The nodes may begin processing the next timestep in response to the command. In other embodiments, a hub may not be included.

Abstract: Post-manufacture compensation for a sensing offset can be provided, at least in part, by selectively exposing one of a pair of cross-coupled transistors in a sense amplifier to a bias voltage selected to cause a compensating shift in a characteristic of the exposed transistor. Such exposure may be advantageously provided in situ by causing the sense amplifier to sense values purposefully skewed toward a predominate value selected to cause the compensating shift. In some realizations, purposefully skewed values (e.g., value and value_1) are introduced directly into the sense amplifier. In some realizations, an on-chip test block is employed to identify and characterize sensing mismatch.

Abstract: A hybrid system for updating cache including a first computer system coupled to a database accessible by a second computer system, said second computer system including a cache, a cache update controller for concurrently implementing a user defined cache update policy, including both notification based cache updates and periodic based cache updates, wherein said cache updates enforce data coherency between said database and said cache, and a graphical user interface for selecting between said notification based cache updates and said periodic based cache updates.

Abstract: An e-mail handling system, wherein e-mail messages are entered, transported and stored, comprises a central key repository, means for encrypting a message using a key associated with the message, means for adding the key to the central key repository; and means for deleting the key for a message when the message is to be made unrecallable.

Abstract: A method for detecting a phantom write error in a data storage system is described. In one embodiment, upon receiving a read command pertaining to a data block stored on a storage medium, two version identifiers associated with the data block are compared. A first version identifier is stored within the data block and a second version identifier is stored outside of the data block. If the version identifiers do not match, the possible occurrence of a phantom write error is detected.

Abstract: A system includes a plurality of resources and a plurality of requesters. A first portion of the resources are reserved for a particular time period in the system during a first arbitration phase, in response to prescheduling requests. During a second arbitration phase a second portion of the resources are allocated in response to regular requests, the first portion of the resources which are reserved being unavailable to the regular requests.

Abstract: A method and mechanism for arbitrating and transmitting data. A first transaction and a second transaction are detected. The first transaction is targeted to a first domain and the second transaction is targeted to a second domain different than the first domain. Subsequent to receiving the transactions, arbitration domains corresponding to each are determined. In response to detecting the arbitration domains are not equal, the first and second transaction may be transmitted concurrently. However, if the arbitration domains are determined to be equal, arbitration is performed and transmission of the first and second transactions is serialized. Also contemplated is generating masks corresponding to each of the received transactions. The masks which are generated include an indication of the target domain of the corresponding transaction. When the transaction is conveyed to a port for transmittal, its mask is conveyed as well.

Abstract: The present invention provides a method and apparatus for inter-domain data transfer. The method includes mapping a memory region of a source device into a central device and mapping a memory region of a target device into the central device. The method further includes transferring data from the mapped memory region of the source device to the mapped memory region of the target device.

Abstract: A method for identifying a least recently used cache entry in a cache. The method includes receiving a cache access request, determining whether the contents of the main memory address are present in the cache, associating, when the contents of the main memory address are not present in the cache, updating more significant bits of a pseudo least recently used pointer when the contents of the main memory address are not present in the cache, and updating more significant bits and less significant bits of the pseudo least recently used pointer when the contents of the main memory address are present in the cache. The cache access request is associated with a main memory address. The memory address has a set within the cache and the set includes a plurality of ways.

Abstract: One embodiment of the present invention provides a system that systematically monitors and records performance parameters for a computer system. During operation, the system periodically measures values for a set of performance parameters associated with the computer system while the computer system continues operating. The system then records the values on a data storage device, wherein the recording process keeps track of temporal relationships between events in different performance parameters. The system subsequently allows the recorded values for the set of performance parameters to be analyzed.

Abstract: Class of Service (CoS) is a mechanism that allows a user to share attributes between directory entries in a way transparent to an application. A CoS scheme includes a CoS Definition entry and a CoS Template entry. These two entries interact to provide attribute values to target entries within their CoS “scope”. In Classic CoS, an attribute-value pair is matched with a target entry based on the target entry's DN. The CoS Definition entry, which is stored as an LDAP subentry below the branch at which it is effective, identifies the type of CoS being used. The Template entry contains a list of attribute values that are shared. Any change made to the template entry's attribute values is automatically applied to all entries that share the attribute.

Abstract: In a data cache unit that exchanges data signal groups with at least two execution units, the operation of the data cache unit is implemented as a three-stage pipeline in order to access data at the speed of the system clock. The data cache unit has a plurality of storage cell banks. Each storage cell bank has valid bit array unit and a tag unit for each execution unit incorporated therein. Each valid bit array unit has a valid/invalid storage cell associated with each data group stored in the storage cell bank. The valid bit array units have a read/write address port and snoop address port. During a read operation, the associated valid/invalid signal is retrieved to determine whether the data signal group should be processed by the associated execution unit. In a write operation, a valid bit is set in the valid/invalid bit location(s) associated with the storage of a data signal group (or groups) during memory access.

Abstract: Systems and methods consistent with this invention provide for efficient processing, caching and routing of XML documents through the use of a proxy server. The proxy server is coupled to at least one client computer and a plurality of remote servers on the Internet. The proxy server is adapted in this preferred embodiment to receive a document request in the form of a uniform resource locator (URL) from a client computer and to determine whether the document is an unprocessed XML document. If the document is an unprocessed XML document, the proxy server is further adapted to search a local cache for a processed version of the document, and to transmit the processed document to the requesting client. In the event the document is not found in local storage, the proxy server is adapted to process the XML document, route it to the client and then store the file in local storage in anticipation of subsequent requests for the same document.

Abstract: One embodiment of the present invention provides a system that tests the motion performance of an electronic display system, wherein the electronic display system includes a display, graphics processing software, graphics processing circuitry, and an interface coupling the display and the graphics processing circuitry. The system starts by receiving a request to measure an amount of distortion of an object in motion. In response to the request, the system measures the amount of distortion of the object in motion. In a variation on this embodiment, measuring the amount of distortion of the object in motion involves placing a ruler on a boundary of the object where the distortion occurs, increasing the width of the ruler until it covers the distortion, and then measuring the width to determine the size of the distortion.

Abstract: Mechanisms and techniques provide a system that operates in a computerized device to index content. Such a system allows registration of content indexing services and then receives repository content of at least one type. The system identifies a content indexing service associated with the at least one type of repository content from the set of available content indexing services. The system operates the content indexing service on the repository content to produce classification data or metadata derived from the repository content in addition to original classification data. The system then associates the classification data to a registry of classification data to allow indexing access to the repository content based on the classification data. By automatically indexing content, more comprehensive indexing is supported.

Abstract: A computer arrangement with a processor (5) and at least one memory unit (7, 9, 11, 13) connected to the processor (5) and including dynamic random access memory (13), wherein the computer arrangment is arranged to use but not to refresh at least part of the dynamic random access memory (13) while running a program.

Abstract: A processing core comprising R-number of processing pipelines each comprising N-number of processing paths. Each of the R-number of processing pipelines are synchronized together to operate as a single very long instruction word (VLIW) processing core. The VLIW processing core is configured to process R×N-number of VLIW sub-instructions in parallel. In addition, the R-number of pipelines can be configured to operate independently as separately operating pipelines. In accordance with one embodiment of the present invention, each of the R-number of processing pipelines comprises S-number of register files, such that the processing core comprises R×S-number of register files. In accordance with another embodiment of the present invention, each of the R-number of processing pipelines comprises one register file for every two of the N-number of processing paths, such that S=N/2.