Patents Assigned to Sun Microsystems
  • Patent number: 7020699
    Abstract: A system for analyzing test result data from a plurality of test systems capable of producing the test result data in disparate formats is provided. The system includes a data processing block, a memory data structure, and a database. The data processing block is designed to receive the test result data in the disparate formats so as to produce an identifiable result data. The memory data structure is designed to store the identifiable result data in a table format. The database stores the identifiable result data obtained from the memory data structure. The identifiable result data has a uniform format for analyzing the test result data from the plurality of test systems.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: March 28, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Weiqiang Zhang, Konstantin I. Boudnik
  • Patent number: 7020820
    Abstract: Disclosed are novel methods and apparatus for efficiently providing instruction-based BIST of external memory. In an embodiment, a built-in self-testing system is disclosed. The system includes an external memory module, an on-chip memory controller coupled to the external memory module, an on-chip built-in self-test (BIST) module coupled to the on-chip memory controller, and an interface controller coupled to the BIST module to provide an interface to access the BIST module. The on-chip memory controller may send and receive data to and from the external memory module. And, the BIST module may include an instruction register to store a plurality of instructions.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: March 28, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Olivier Caty, Ismet Bayraktaroglu, Amitava Majumdar
  • Patent number: 7020079
    Abstract: One embodiment of the present invention provides a system for bypassing use of a protocol checksum during communications across a reliable network link. The system operates by configuring a communication system to bypass use of the checksum during communications across the reliable network link. When the system subsequently receives an outbound packet to be transmitted to a destination across the reliable network link, the system sends the outbound packet to the destination without computing the checksum for the outbound packet. In one embodiment of the present invention, upon receiving an inbound packet from a source across the reliable network link, the system accepts the inbound packet without re-computing the checksum, wherein re-computation of the checksum is required by the communication protocol to verify that the inbound packet was received without errors.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: March 28, 2006
    Assignee: SUN Microsystems, Inc.
    Inventor: Hsiao-Keng J. Chu
  • Patent number: 7017145
    Abstract: Provided is a method, system, program, and data structures for generating a user interface. An application program processes data and generates application output and a user interface module processes the application output to generate output data to render on an output device. The user interface module generates output data to render on the output device in response to processing statements in the user interface module. The user interface module reaches a processing point where the user interface module does not include statements to generate output data. After reaching the processing point, the user interface module receives an interaction object from the application program specifying data to generate as output data. The user interface module then generates output data to render on the output device from the interaction object.
    Type: Grant
    Filed: May 9, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun MIcrosystems, Inc.
    Inventor: Julian S. Taylor
  • Patent number: 7016499
    Abstract: A method and apparatus for securely communicating ephemeral information from a first node to a second node. In a first embodiment, the first node encodes and transmits an ephemeral message encrypted at least in part with an ephemeral key, from the first node to the second node. Only the second node has available to it the information that is needed to achieve decryption by an ephemeral key server of a decryption key that is needed to decrypt certain encrypted payload information contained within the message communicated from the first node to the second node. In a second embodiment the first node transmits to the second node an ephemeral message that is encrypted at least in part with an ephemeral key. The ephemeral message includes enough information to permit the second node to communicate at least a portion of the message to an ephemeral key server and for the ephemeral key server to verify that the second node is an authorized decryption agent for the message.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Radia J. Perlman
  • Patent number: 7014051
    Abstract: A slide includes a fixed portion comprising a rack-mounting ear capable of being attached to a rack and a first connecting ear and a telescoping portion slidably engaged with the fixed portion and comprising a second connecting ear capable of being joined with the first connecting ear. The telescoping portion is capable of being attached to a component enclosure. A method includes attaching a fixed portion of a slide to a rack, attaching a telescoping portion of the slide to a component enclosure, and slidably engaging the telescoping portion with the fixed portion. The method further includes moving the telescoping portion relative to the fixed portion in a first direction to retract the component enclosure into the rack and joining a connecting ear of the telescoping portion and a connecting ear of the fixed portion.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Gary Rumney
  • Patent number: 7016981
    Abstract: A switching apparatus provides an address extension for an environment, such as I2C, that uses devices with a limited address configurability. The switching apparatus provides connection between a main bus and one or more secondary busses to which additional devices are connected. The switching apparatus detects an address on the main bus, and determines whether it is intended for a device on a secondary bus. If so, it connects the main bus to the proper secondary bus where the device in question is located. It then translates the address to an address within the limited configurability of the devices, and places the translated address on the secondary bus where the addressed device is located.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Joseph J. Ervin
  • Patent number: 7017159
    Abstract: Users of small footprint devices such as smart cellular phones, personal data assistants, etc. may create and store bookmarks referencing various types of objects and/or data sources. Each bookmark may comprise a Uniform Resource Locator (URL) which may be used to refer to the object/data source. The bookmark system may be open-ended, allowing virtually any type of object or data source to be bookmarked. The bookmarks may later be used by a user or application to reference the respective data source to perform some type of action on the data source, such as displaying or editing it. A lightweight application/service containment framework is described which enables services to run on small footprint devices. A bookmark service may cooperate with an activation framework capable of encapsulating various types of entities. In one embodiment, a bookmark service operates in conjunction together with the JavaBeans™ Activation Framework (JAF) to implement the bookmark functionality.
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Mark Baker
  • Patent number: 7016422
    Abstract: A method of transmitting and prioritizing signals is disclosed. Higher priority signals are switched while lower priority signals are delayed until the higher priority signals have completed switching. The method is used in networks where coupling and capacitance effects are possible.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Harsh D. Sharma, Nayon Tomsio
  • Patent number: 7016496
    Abstract: A system and method for delivering digital media content to a user over a network is disclosed. The illustrative embodiment of the present invention enables multiple types of electronic devices to access the same digital media content for the same end user through the use of a smart card equipped with a license for the digital media content. Depending on the format of the digital media content, devices such as phones, pagers, internet appliances or PDAs can be used to present the digital media content to a user, as can traditional consumer electronic devices such as DVD players and VCRs. The encrypted content may be freely transferred and stored without copyright concerns since the decryption key is generated by the smart card containing the license.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Mark J. Koch
  • Patent number: 7016976
    Abstract: A method of addressing an entry in a directory server including generating a unique identifier for the entry, creating an encoded address by encoding the unique identifier into a distinguished name, and specifying the entry using the encoded address for a plurality of operations. A method of addressing an entry in a directory server, including generating a unique identifier for the entry, creating an encoded address by encoding the unique identifier into a control, and specifying the entry using the encoded address for a plurality of operations. A unique identifier-based addressing system for a directory server, including a unique identifier generated for an entry and an encoded address created by encoding the unique identifier into a distinguished name. The entry is specified using the encoded address for a plurality of operations.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: John Merrells, Olga Natkovich, Gordon Good, Mark C. Smith
  • Patent number: 7017107
    Abstract: A storage system comprises a storage array controller and a storage array, which includes multiple disk drives and disk drive controllers. The storage array controller issues scrubbing operation commands to one or more of the disk drive controllers. In response, each disk drive controller that receives a scrubbing operation command reads data from within a data range from at least one of the disk drives, calculates a new checksum for the data, and compares the new checksum to a preexisting checksum for the data. If the new checksum doesn't equal the preexisting checksum, the data within the data range is determined to be erroneous.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Nisha D. Talagala, Randall D. Rettberg, Chia Y. Wu
  • Patent number: 7017086
    Abstract: A technique for adjusting a communication system involves a plurality of links where each link includes a data line adapted to transmit a data signal and a clock line adapted to transmit a clock signal. A test circuit connects to the plurality of links where the test circuit tests at least one of the plurality of links. The test circuit includes an adjustment circuit arranged to generate an adjustable clock signal from the clock signal of the one of the plurality of links based on an offset where the adjustment circuit adjusts a timing of the adjustable clock signal relative to the data signal of the one of the plurality of links. The test circuit is adapted to perform a round-robin testing of the plurality of the links.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Aninda K. Roy, Claude R. Gauthier, Brian W. Amick
  • Patent number: 7016928
    Abstract: A floating point operand testing circuit includes an analysis circuit and a result generator circuit coupled to the analysis circuit. The analysis circuit determines the status of a floating point operand based upon data within the operand. An operand buffer may supply the operand to the analysis circuit. The result generator circuit is responsive to at least one control signal and asserts a result signal if the floating point analysis circuit matches the floating point status to a predetermined format specified by the control signal. The result signal can condition the outcome of a floating point instruction. The result generator may also respond to multiple control signals asserted when testing a single operand for different formats, such as not-a-number (NaN), infinity, normalized, denormalized, invalid operation, overflow, underflow, division by zero, exact, and inexact.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Guy L. Steele, Jr.
  • Patent number: 7016966
    Abstract: Embodiments of a mechanism for providing results gates to clients in the distributed computing environment to be used by the clients to access results generated by services on behalf of the clients. A client generates a request message for a service. The request message is generated by a client method gate. The service then generates results in response to the message. A results gate is generated for accessing the results. A gate on the client generates the results gate. The results are then accessed through the results gate. The results are structured as an object (e.g. Java object), and the results gate an object proxy for the results object. The results gate is returned to the process as results of the method call made by the process. In one embodiment, the results gate is a method gate and provides a method interface to the results.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Thomas E. Saulpaugh, Gregory L. Slaughter, Bernard A. Traversat, Mohamed M. Abdelaziz
  • Patent number: 7016913
    Abstract: Provided are a method, system, data structures and article of manufacture for implementing an array of persistent elements. A class of the array of persistent elements has a constructor. A call is received from an application executing in a runtime environment to the constructor. The constructor is processed to create an empty array of persistent elements. A persistent element is included into the array of persistent elements within the runtime environment by storing persistent data of the added persistent element in a data record and the address of the data record at a corresponding index record.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Terence Leong, Julian S. Taylor
  • Patent number: 7016945
    Abstract: A method of entry distribution includes receiving requests by a chaining backend from an original client, forwarding requests from the chaining backend to a one of a plurality of remote servers, and returning results from the one of the plurality of remote servers to the original client. The chaining backend is a type of database plug-in that acts as a multiplexer including a directory information tree that provides the hierarchy of the plurality of remote servers.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Gilles Bellaton, Sylvain Duloutre, Mark C. Smith
  • Patent number: 7017074
    Abstract: A semiconductor device, such as a multiprocessor chip for a computer system, includes a total number of on-board components which is greater than the number of that component required by the system. The chip may be provided with multiple I/O controllers, e.g. more than one controller per I/O interface, and the I/O controllers can act as backups to one another, with failover logic controlling the backup process. In addition, the number of processors formed on the chip may be greater than the number required by the system, allowing multiple levels of redundancy and greater successful manufacturing yields.
    Type: Grant
    Filed: March 12, 2002
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Kenneth Okin
  • Patent number: 7016953
    Abstract: An apparatus for monitoring data flow in a web application includes a data collector which collects data about transactions on a server that hosts components of the web application. The transactions on the server are initiated through an HTTP request from a client. The apparatus further includes a graphical display which displays the collected data.
    Type: Grant
    Filed: December 6, 2000
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Ana H. von Klopp Lemon
  • Patent number: 7017088
    Abstract: A method of generating a test vector pattern for an array, including determining a failure of a test of the array, defining a type of test vector pattern to generate using a graphical user interface, generating the test vector pattern, and testing the array using the test vector pattern. A test vector pattern generation tool, including an array, a test vector pattern, and a graphical user interface generating the test vector pattern. The array is tested using the custom test vector pattern.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: March 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Hong S. Kim, Kuan-yu J. Lin