Patents Assigned to Sun Microsystems
  • Patent number: 7002599
    Abstract: Embodiments of the present invention are directed to a method and apparatus for hardware acceleration of clipping and graphical fill in display systems. In one embodiment, all display data is presented to the display system. The display system uses its hardware to clip the undesired data, if necessary, and display the desired data. If a sufficient amount of display data has the same value, the display system uses its hardware to fill the appropriate areas using the shared value. In one embodiment, the display system has one or more accelerating registers. In one embodiment, one or more accelerating registers are fill registers. As display data is read from memory, some of the information's color data is classified by the fill registers. In another embodiment, one or more accelerating registers are clipping registers. As display data arrives from each source, the information's display location is classified by the clipping registers.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: February 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Lawrence L. Butcher
  • Patent number: 7003540
    Abstract: A method for providing a floating point product consistent with the present invention includes multiplying a subprecise operand and a non-subprecise operand using a plurality of intermediate stages. The method further includes correcting an error introduced by the subprecise operand by performing an operation in conjunction with a one of the plurality of intermediate stages utilizing a compensating summand.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: February 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Guy L. Steele, Jr.
  • Patent number: 7003653
    Abstract: A method for rapidly mapping a bitmask returned by a Single Instruction Multiple Data (SIMD) computer compare instruction is provided. A user supplied partitioned mapping variable includes multiple mapping elements. Each of the multiple mapping elements is applied to the inputs of a different one of multiple digital multiplexers. The bitmask returned by the SIMD compare instruction is applied to the selects or all of the multiple digital multiplexers. Each multiplexer outputs one bit, as selected by the bitmask, from the respective mapping element applied to each multiplexer. The one bit outputs are accumulated in a mapped output variable as a mapped bitmask.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: February 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Lawrence Spracklen
  • Patent number: 7003521
    Abstract: Methods and apparatus for a scaleable locking convention are disclosed. According to one aspect of the present invention, a method for acquiring access to an object in an object-based system includes identifying a memory address value associated with the object, and identifying a first synchronization construct that is suitable for use in granting access to the object. The synchronization construct is arranged to be identified using at least part of the memory address value. The method also includes determining when the first synchronization construct is available to be acquired, e.g., by a thread, and associating the first synchronization construct with the object when the first synchronization construct is available. In one embodiment, the first synchronization construct is a non-nestable, global lock.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: February 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Dean R. E. Long
  • Patent number: 7003750
    Abstract: A topology based approach to shielding wire generation for an integrated circuit design. The present invention generates various templates by sizing one or more signal wire geometries. The various templates are then geometrically added to and/or subtracted from to generate shielding wire patterns. In some embodiments, the templates may be merged to prevent duplicate shielding wire generation between adjacent signal wires that violates design rules. In some embodiments, the topology based approach permits shielding wire generation based upon complex signal wire geometries, such as branched signal wire geometries. The present invention can be implemented in CAD software and in CAD software together with a small amount of custom software to generate design rule clean (DRC) shielding wire generation that utilizes both power and ground nets.
    Type: Grant
    Filed: August 1, 2002
    Date of Patent: February 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Thomas N. Valine
  • Patent number: 7003797
    Abstract: The present invention relates to secure PIN entry in a distributed network. According to one or more embodiments of the present invention, a client connected to a server contains logic that is used to keep the PIN within the network computer and not send it over the network. In one embodiment, the server sends an instruction to the networked computing device telling it to capture a PIN locally. This instruction causes the networked computer to enter a secure PIN entry mode which logically disconnects the keyboard from the server. Upon receipt of the instruction from the server, one embodiment of the present invention receives keyboard entries on the client computer and places them into a local buffer. The client continues buffering the keyboard entries until an indication that the process is complete. Upon completion of the keyboard entries, they are translated into ASCII characters by the client and sent from the local client buffer to the smart card where the PIN may be verified.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: February 21, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael S. Bender, Fabio Pistolesi
  • Patent number: 7000228
    Abstract: Techniques for online upgrading of software components are disclosed. The techniques are especially suited for online upgrading of container-based software components in object oriented computing environments. A multi-stage online upgrade system can facilitate online installation of the container-based software components (e.g., applications) in object oriented computing environments. Moreover, online software upgrades can be achieved without interrupting online services which are provided by the container-based software components. The multi-stage online upgrade system can be implemented so as to allow interaction with an upgrade management entity (e.g., an application developer or system administrator). This allows controlling and/or monitoring of the online upgrade operations.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Masood Seyed Mortazavi
  • Patent number: 6999979
    Abstract: In a garbage collector that employs the train algorithm, remembered sets are employed to record the locations of references to objects in a train car in objects outside the car. During each collection, remembered set entries are processed to find the locations of references into the cars yet to be collected. The found locations are stored in scratch-pad lists, and each entry in that list includes a mode indicator that specifies whether the entry represents a single reference location or the locations of more than one reference. One possible value of the mode indicator indicates that the entry consists of two computer words rather than one, the second computer word containing a list of offsets into a region specified by the first word. Another possible mode-indicator value indicates that a region contains references, but it does not specify where within the region those references occur.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Alexander T. Garthwaite
  • Patent number: 7000053
    Abstract: A computer system is adapted for dynamic replacement of a hot swap controller card. The computer system includes a circuit board, with the computer system comprising a first slot and a second slot coupled to the circuit board. The first slot includes a first connector and the second slot includes a second connector. The first and second connectors each have a column and row arrangement of connector-pins, with the first connector including first, second and third connector-pins and the second connector including fourth, fifth and sixth connector-pins. First, second, third, fourth, fifth and sixth signal lines are connected to the first through sixth connector-pins, respectively. A primary hot swap controller has a first means for simultaneously turning on/off a first plurality of switches, a second means for driving signal lines connected to the first, second, fourth, and fifth connector-pins, and a third means for storing a status information of the signal lines.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Raymond K. Ho, Victor E. Jochiong
  • Patent number: 6999982
    Abstract: A random number generation system, including a turbulent fluid source, a pressure sensor adapted to monitor a pressure of the turbulent fluid source, and a computation module operatively connected to the pressure sensor the module adapted to generate a numeric representation of the pressure.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Tim Dunn
  • Patent number: 6999980
    Abstract: In a computer system that uses a generational garbage collector in which objects are promoted from a “young” generation to an “old” generation, a compiler output designates certain dynamic-allocation instructions as being ones whose resultant allocated objects will be considered “pinned.” The compiler associates with such allocation instructions respective segments of the code following the instructions and objects allocated within one of those segments are considered to remain pinned until program execution passes beyond that segment. The garbage collector refrains from promoting any pinned object, and as a consequence, an instruction that writes a reference into an object field while that object is pinned does not need to be accompanied by a write barrier.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: David L. Detlefs, William D. Clinger
  • Patent number: 6999312
    Abstract: There is provided a computing apparatus. The computing apparatus has first and second computing elements and a heatsink thermally coupled to each of the first and second computing elements. A portion of the heatsink thermally coupled to the first computing element is thermally separated from a portion of the heatsink thermally coupled to the second computing element by a region having a reduced thermal conductivity.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Paul Jeffrey Garnett, Jay Kevin Osborn, Andrew Stephen Burnham
  • Patent number: 7000033
    Abstract: A method and system for mapping nodes in an M×N torus interconnection fabric of nodes is provided. The method includes generating an observed mapping of the nodes in the interconnection fabric showing a location of a first node relative to an x-axis of the fabric and relative to a y-axis of the fabric, comparing the observed mapping of the nodes to a set of expected mappings, and identifying the expected mapping which is most similar to the observed mapping.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Whay S. Lee
  • Patent number: 7000043
    Abstract: Mechanisms and techniques provide a system for controlling performance of a data communications device that operates an input output protocol and/or architecture such as Infiniband by setting a configuration parameter of the input output protocol to a first value. The configuration parameter describes, to the input output protocol operating within the device, a virtual physical connectivity characteristic of the communications interface of the device to at least one other device operating the input output protocol. The system operates the device to communicate data, over the communications interface, at a first performance level corresponding to the first value of the configuration parameter and changes the first value of the configuration parameter to a second value such that the input output protocol perceives a virtual change to the physical connectivity characteristic of the device without the device experiencing an actual change to its physical connectivity characteristic of the communications interface.
    Type: Grant
    Filed: September 18, 2002
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Peter D. Finch
  • Patent number: 7000235
    Abstract: Data services are managed by a three-tiered system. The lowest tier comprises management facade software running on each machine that converts a platform-dependent interface written with the low-level kernel routines that actually implements the data services to platform-independent method calls. The middle tier is a set of federated Java beans that communicate with the management facades and with the upper tier of the system. The upper tier of the inventive system comprises presentation programs that can be directly manipulated by management personnel to view and control the system.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Chhandomay Mandal, Mark J. Musante, Peter J. Wagener, Roberta A. Pokigo, Melora L. Goosey
  • Patent number: 6999372
    Abstract: A multi-port semiconductor memory device is provided with current limiting transistor devices interposed between the memory cell and the bit line transfer gates for multiple bit line pairs. Where each bit line pair represents a memory port that is connected to the memory cell during read and write operations, the current limiting transistor devices effectively reduce the current flow from non-writing bit lines, thereby improving memory writability. In addition, the current limiting transistor devices effectively reduce the current flow to non-reading bit lines, thereby improving memory stability.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Toshinari Takayanagi
  • Patent number: 7000229
    Abstract: A method and system for implementing a live operating system upgrade of a computer system. The method includes generating a first copy of a previous operating system environment of the computer system. The computer system is then booted to a subsequent operating system environment. A second copy of the previous operating system environment at the time of the booting is then generated. Additionally, a third copy of the subsequent operating system environment, at the time of the booting is generated. The copies function by ensuring the subsequent operating system environment is synchronized with the previous operating system environment by comparing the first copy, the second copy, and the third copy to detect any intervening changes and allow decisions to be made regarding such changes.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Gary Gere
  • Patent number: 7000182
    Abstract: An assistant for the creation of layouts/reports for databases is disclosed. A layout for a database is the arrangement of information for the database such as for data entry or screen viewing, and a report (or report format) for a database is the arrangement of information from the database for presentation of the data in a printed document or with on-line viewing. The assistant serves to automate in the creation of the layout/reports after an interview sequence with a user.
    Type: Grant
    Filed: August 20, 1999
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Stephen Iremonger, Jhansi Reddy, Tak Tsubota, Joanna Holsztynska, Christopher L. Crim, David Raffarin
  • Patent number: 6999087
    Abstract: A graphics system may include a frame buffer and a hardware accelerator. The frame buffer may include a sample buffer and a double-buffered display area. The hardware accelerator may be coupled to the frame buffer, and configured (a) to receive primitives, (b) to generate samples for the primitives based on a dynamically adjustable sample density value, (c) to write the samples into the sample buffer, (d) to read the samples from the sample buffer, (e) to filter the samples to generate pixels, (f) to store the pixels in a back buffer of the double-buffered display area. A host computer may be configured (e.g., by means of stored program instructions) to dynamically update programmable registers of the graphics system to reallocate the sample buffer in the frame buffer in response to user input specifying a change in one or more window size parameters.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael G. Lavelle, Justin Michael Mahan
  • Patent number: 7000008
    Abstract: Disclosed is a method, system, and program for providing data updates to a page, wherein the page includes multiple regions of dynamic content that may be separately updated independently of each other. The regions of the page are displayed within a presentation program executing on a client. A server transfers the page to the client over a network. The server detects state changes and queues information on the state changes. The server further generates an update package including content indicating the state changes and sends the update package to the client. The presentation program in the client renders the information on the state changes to the regions of the page including the dynamic content modified by the content indicating the state changes.
    Type: Grant
    Filed: April 16, 2001
    Date of Patent: February 14, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: David Bautista-Lloyd, Arieh Markel